STL13NM60N N-channel 600 V, 0.320 Ω, 10 A PowerFLAT™ (8x8) HV MDmesh™ II Power MOSFET Features Order code VDSS @ TJmax RDS(on) max ID STL13NM60N 650 V < 0.385 Ω 10 A (1) 3 3 3 "OTTOMVIEW ' $ 1. The value is rated according to Rthj-case ■ 100% avalanche tested ■ Low input capacitance and gate charge ■ Low gate input resistance 0OWER&,!4X(6 Application Switching applications Description Figure 1. This device is a N-channel Power MOSFETs made using the second generation of MDmesh™ technology. This revolutionary transistor associates a new vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. Internal schematic diagram $ ' 3 !-V Table 1. Device summary Order code Marking Package Packaging STL13NM60N 13NM60N PowerFLAT™ (8x8) HV Tape and reel May 2011 Doc ID 018870 Rev 1 1/14 www.st.com 14 Contents STL13NM60N Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/14 .............................................. 8 Doc ID 018870 Rev 1 STL13NM60N 1 Electrical ratings Electrical ratings Table 2. Symbol Absolute maximum ratings Parameter Value Unit VDS Drain-source voltage (VGS = 0) 600 V VGS Gate-source voltage ± 25 V Drain current (continuous) at TC = 25 °C 10 A ID (1) Drain current (continuous) at TC = 100 °C 6.5 A ID(2) Drain current (continuous) at TC = 25 °C 1.9 A ID(2) Drain current (continuous) at TC = 100 °C 1.1 A Drain current (pulsed) 7.6 A ID IDM (1) (2),(3) PTOT (3) Total dissipation at TC = 25 °C (steady state) 3 W PTOT(1) Total dissipation at TC = 25 °C (steady state) 90 W IAR Avalanche current, repetitive or notrepetitive (pulse width limited by Tj max) 3 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 93 mJ Peak diode recovery voltage slope 15 V/ns - 55 to 150 °C 150 °C Value Unit dv/dt (4) Tstg Tj Storage temperature Max. operating junction temperature 1. The value is rated according to Rthj-case 2. Pulse width limited by safe operating area 3. When mounted on FR-4 board of inch², 2oz Cu 4. ISD ≤ 10 A, di/dt ≤ 400 A/µs, VDSpeak ≤ V(BR)DSS, VDD = 80% V(BR)DSS Table 3. Symbol Thermal data Parameter Rthj-case Thermal resistance junction-case max 1.38 °C/W Rthj-amb(1) Thermal resistance junction-amb max 45 °C/W 1. When mounted on 1inch² FR-4 board, 2 oz Cu Doc ID 018870 Rev 1 3/14 Electrical characteristics 2 STL13NM60N Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4. Symbol V(BR)DSS On /off states Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 Min. Typ. Max. Unit 600 V IDSS VDS = Max rating Zero gate voltage drain current (VGS = 0) VDS = Max rating, TC=125 °C 1 100 µA µA IGSS Gate-body leakage current (VDS = 0) 100 nA 3 4 V 0.320 0.385 Ω Min. Typ. Max. Unit VGS = ± 25 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on resistance Table 5. Symbol 2 VGS = 10 V, ID = 5 A Dynamic Parameter Test conditions Input capacitance Output capacitance Reverse transfer capacitance VDS = 50 V, f = 1 MHz, VGS = 0 - 790 60 3.6 - pF pF pF Output equivalent capacitance VDS = 0 to 480 V, VGS = 0 - 135 - pF RG Intrinsic gate resistance f = 1 MHz open drain - 4.7 - Ω Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 480 V, ID = 10 A, VGS = 10 V (see Figure 14) - 30 4 15 - nC nC nC Ciss Coss Crss Coss eq.(1) 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDS. Table 6. Symbol td(on) tr td(off) tf 4/14 Switching times Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions VDD = 300 V, ID = 10 A, RG = 4.7 Ω, VGS = 10 V (see Figure 18) Doc ID 018870 Rev 1 Min. Typ. - 13 25 85 50 Max Unit - ns ns ns ns STL13NM60N Electrical characteristics Table 7. Source drain diode Symbol Parameter ISD ISDM (1) Source-drain current Source-drain current (pulsed) VSD (2) Forward on voltage trr Qrr IRRM trr Qrr IRRM Test conditions Min. Typ. Max. Unit - 10 40 A A ISD = 10 A, VGS = 0 - 1.6 V Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 10 A, di/dt = 100 A/µs VDD = 100 V (see Figure 15) - 340 2 18 ns µC A Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 10 A, di/dt = 100 A/µs VDD = 100 V, Tj = 150 °C (see Figure 15) - 290 190 17 ns µC A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Doc ID 018870 Rev 1 5/14 Electrical characteristics STL13NM60N 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance !-V )$ ! Zth PowerFLAT 8x8 HV K 4J # δ=0.5 4C # 3INGLE PULSE 0.2 AI O N -1 $3 /P ,IM ERAT ITE ION DB IN YM THIS AX AR 2 E 0.1 S MS MS 10 0.05 0.02 0.01 S Single pulse MS -2 Figure 4. 6$36 Output characteristics 6'36 6 6 Figure 6. -2 -3 tp (s) 10 10 Transfer characteristics !-V )$ ! 66 $3 -4 10 Figure 5. !-V )$ ! 10 -5 10 6 6$36 Normalized BVDSS vs temperature !-V "6$33 NORM Figure 7. 6'36 Static drain-source on resistance AM09779v1 RDS(on) (Ω) VGS=10V 0.335 0.330 )$M! 0.325 0.320 0.315 0.310 0.305 6/14 4* # 0.300 0 Doc ID 018870 Rev 1 1 2 3 4 5 6 7 8 9 10 ID(A) STL13NM60N Figure 8. Electrical characteristics Gate charge vs gate-source voltage Figure 9. !-V 6'3 6 6$3 6$$6 # P& )$! !-V #ISS Capacitance variations #OSS 1GN# Figure 10. Normalized gate threshold voltage vs temperature !-V 6'3TH NORM )! $ !-V 2$3ON NORM 6'3 6 )! $ #RSS 6$36 Figure 11. Normalized on resistance vs temperature 4* # 4* # Figure 12. Source-drain diode forward characteristics !-V 63$ 6 4* # 4* # 4* # )3$! Doc ID 018870 Rev 1 7/14 Test circuits 3 STL13NM60N Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF VGS IG=CONST VDD 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test switching and diode recovery times circuit A A D.U.T. FAST DIODE B B L A D G VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 17. Unclamped inductive waveform AM01471v1 Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/14 0 10% Doc ID 018870 Rev 1 AM01473v1 STL13NM60N 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Doc ID 018870 Rev 1 9/14 Package mechanical data Table 8. STL13NM60N PowerFLAT™ 8x8 HV mechanical data mm Dim. A Min. Typ. Max. 0.80 0.90 1.00 0.02 0.05 1.00 1.05 A1 b 0.95 c 0.10 D 8.00 E 8.00 D2 7.05 7.20 7.30 E2 4.15 4.30 4.40 e L 10/14 2.00 0.40 Doc ID 018870 Rev 1 0.50 0.60 STL13NM60N Package mechanical data Figure 19. PowerFLAT™ 8x8 HV drawing mechanical data BOTTOM VIEW b L e E2 PIN#1 ID 0.40 D D2 E INDEX AREA SIDE VIEW A A1 TOP VIEW SEATING PLANE 0.08 C AM05542v1 Doc ID 018870 Rev 1 11/14 Package mechanical data STL13NM60N Figure 20. PowerFLAT™ 8x8 HV recommended footprint 2.00 1.05 0.60 4.40 7.30 AM05543v1 12/14 Doc ID 018870 Rev 1 STL13NM60N 5 Revision history Revision history Table 9. Document revision history Date Revision 23-May-2011 1 Changes First release. Doc ID 018870 Rev 1 13/14 STL13NM60N Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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