STMICROELECTRONICS VN5E025AJ-E

VN5E025AJ-E
Single channel high-side driver with analog current sense
for automotive applications
Features
Max supply voltage
VCC
41 V
Operating voltage range
VCC
4.5 to 28 V
Max On-State resistance
RON
25 mΩ
Current limitation (typ)
ILIMH
60 A
Off state supply current
IS
2 µA(1)
PowerSSO-12
– Reverse battery protected
– Electrostatic discharge protection
1. Typical value with all loads connected.
■
■
■
General
– Inrush current active management by
power limitation
– Very low stand-by current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
– Very low current sense leakage
Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
currents range
– Current sense disable
– Off state openload detection
– Output short to VCC detection
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
– Over-temperature shutdown with
autorestart (thermal shutdown)
May 2010
Application
■
All types of resistive, inductive and capacitive
loads
■
Suitable as LED driver
Description
The VN5E025AJ-E is a single channel high-side
driver manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
PowerSSO-12 package. The VN5E025AJ-E is
designed to drive 12 V automotive grounded
loads delivering protection, diagnostics and easy
3 V and 5 V CMOS compatible interface with any
microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, over-temperature shut-off with autorestart and over-voltage active clamp. A dedicated
analog current sense pin is associated with every
output channel in order to provide Ehnanced
diagnostic functions including fast detection of
overload and short-circuit to ground through
power limitation indication, over-temperature
indication, short-circuit to VCC diagnosis and ONstate and OFF-state open load detection.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external
sense resistor with other similar devices
Doc ID 13106 Rev 4
1/37
www.st.com
1
Contents
VN5E025AJ-E
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolue maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24
3.1.2
Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . . 25
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3
MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1
3.5
4
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1
5
Short to VCC and OFF state open load detection . . . . . . . . . . . . . . . . . 27
PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2
PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/37
Doc ID 13106 Rev 4
VN5E025AJ-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching characteristics (VCC=13V, Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8V<VCC<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Openload detection (8V<VCC<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Doc ID 13106 Rev 4
3/37
List of figures
VN5E025AJ-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
4/37
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Openload Off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Delay response time between rising edge of ouput current and rising edge of current
sense (CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IOUT / ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overload or Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Intermittent Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
OFF-State Open Load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
TJ evolution in Overload or Short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input clamp level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
On state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
On state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Maximum turn off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 29
PowerSSO-12 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . 30
Thermal fitting model of a single channel HSD in PowerSSO-12 . . . . . . . . . . . . . . . . . . . 30
PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
PowerSSO-12 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Doc ID 13106 Rev 4
VN5E025AJ-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
VCC
Signal Clamp
Undervoltage
IN
Control & Diagnostic
Power
Clamp
DRIVER
VON
Limitation
Over
temp.
Current
Limitation
OFF State
Open load
CS_
DIS
VSENSEH
CS
Current
Sense
OUT
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
LOGIC
GND
Table 1.
Pin function
Name
VCC
OUTPUT
GND
INPUT
Function
Battery connection.
Power output.
Ground connection. Must be reverse battery protected by an external diode /
resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.
CURRENT SENSE Analog current sense pin, delivers a current proportional to the load current.
CS_DIS
Active high CMOS compatible pin, to disable the current sense pin.
Doc ID 13106 Rev 4
5/37
Block diagram and pin description
Figure 2.
VN5E025AJ-E
Configuration diagram (top view)
TAB = Vcc
Vcc
GND
INPUT
CURRENT_SENSE
CS_DIS
Vcc
Table 2.
6/37
12
11
10
9
8
7
1
2
3
4
5
6
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
Suggested connections for unused and not connected pins
Connection / pin
Current sense
N.C.
Output
Input
CS_DIS
Floating
Not allowed
X
X
X
X
To ground
Through 1kΩ
resistor
X
Through 22kΩ
resistor
Through 10kΩ
resistor
Through 10kΩ
resistor
Doc ID 13106 Rev 4
VN5E025AJ-E
2
Electrical specifications
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VCC
ICSD
VF
IOUT
OUTPUT
CS_DIS
VOUT
VCSD
IIN
VCC
INPUT
ISENSE
CURRENT SENSE
VIN
GND
VSENSE
IGND
Note:
VF = VOUT - VCC during reverse battery condition.
2.1
Absolue maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 3.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
41
V
-VCC
Reverse DC supply voltage
0.3
V
- IGND
DC reverse ground pin current
200
mA
Internally limited
A
20
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
200
mA
VCC-41
+VCC
V
V
140
mJ
IOUT
- IOUT
IIN
ICSD
DC output current
Reverse DC output current
-ICSENSE DC reverse CS pin current
VCSENSE Current sense maximum voltage
EMAX
Maximum switching energy (single pulse)
(L=0.8mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IOUT = IlimL(Typ.) )
Doc ID 13106 Rev 4
7/37
Electrical specifications
Table 3.
Absolute maximum ratings (continued)
Symbol
Value
Unit
VESD
Electrostatic discharge
(Human Body Model: R=1.5KΩ; C=100pF)
- INPUT
- CURRENT SENSE
- CS_DIS
- OUTPUT
- VCC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tj
Tstg
2.2
VN5E025AJ-E
Parameter
Thermal data
Table 4.
Symbol
Thermal data
Parameter
Rthj-case Thermal resistance junction-case
Rthj-amb Thermal resistance junction-ambient
8/37
Doc ID 13106 Rev 4
Max. value
Unit
1.4
°C/W
See Figure 36
°C/W
VN5E025AJ-E
2.3
Electrical specifications
Electrical characteristics
Values specified in this section are for 8V<VCC<28V; -40°C<Tj<150°C, unless otherwise
stated.
Table 5.
Power section
Symbol
Parameter
VCC
Operating supply voltage
VUSD
VUSDhyst
RON
Vclamp
IS
IL(off1)
VF
Test conditions
Min.
Typ.
4.5
13
28
V
Undervoltage shutdown
3.5
4.5
V
Undervoltage shutdown
hysteresis
0.5
On state resistance
IOUT= 3A; Tj=25°C
IOUT= 3A; Tj=150°C
IOUT= 3A; VCC=5V; Tj=25°C
Clamp voltage
IS= 20 mA
Supply current
Off State; VCC=13V; Tj=25°C;
VIN=VOUT=VSENSE=VCSD=0V
On State; VCC=13V; VIN=5V;
IOUT= 0A
VIN=VOUT=0V; VCC=13V; Tj=25°C
VIN=VOUT=0V; VCC=13V; Tj=125°C
Output - VCC diode
voltage
-IOUT= 2A; Tj= 150°C
0
0
V
25
50
35
mΩ
mΩ
mΩ
46
52
V
2(1)
5(1)
µA
1.5
3
mA
0.01
3
5
µA
0.7
V
41
Off state output current
Max. Unit
1. PowerMOS leakage included.
Table 6.
Symbol
Switching characteristics (VCC=13V, Tj=25°C)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-On delay time
RL= 4.3Ω (see Figure 6.)
15
µs
td(off)
Turn-Off delay time
RL= 4.3Ω (see Figure 6.)
40
µs
(dVOUT/dt)on Turn-On voltage slope
RL= 4.3Ω
See
Figure 26
V/µs
(dVOUT/dt)off Turn-Off voltage slope
RL= 4.3Ω
See
Figure 28
V/µs
WON
Switching energy losses
during twon
RL= 4.3Ω (see Figure 6.)
0.4
mJ
WOFF
Switching energy losses
during twoff
RL= 4.3Ω (see Figure 6.)
0.5
mJ
Doc ID 13106 Rev 4
9/37
Electrical specifications
Table 7.
Symbol
VN5E025AJ-E
Logic inputs
Parameter
Test conditions
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current VIN= 2.1V
VI(hyst)
VICL
ICSDL
Low level CS_DIS
current
VCSDH
CS_DIS high level
voltage
ICSDH
High level CS_DIS
current
VCSD(hyst)
CS_DIS hysteresis
voltage
Symbol
0.9
V
µA
2.1
V
7
V
V
0.9
V
-0.7
1
µA
2.1
V
10
0.25
CS_DIS clamp voltage
7
V
V
-0.7
Protection and diagnostics (1)
Parameter
Test conditions
IlimL
Short circuit current
during thermal cycling
VCC= 13V; TR<Tj<TTSD
TTSD
Shutdown temperature
TR
Reset temperature
TRS
Thermal reset of status
Min.
Typ.
Max.
Unit
43
60
85
85
A
A
15
150
175
A
200
TRS + 1 TRS + 5
135
Thermal hysteresis
(TTSD-TR)
Turn-Off output voltage
clamp
IOUT= 2A; VIN=0; L= 6mH
Output voltage drop
limitation
IOUT= 0.1A
Tj= -40°C...150°C
(see Figure 8)
Doc ID 13106 Rev 4
°C
°C
°C
7
°C
VCC-41 VCC-46 VCC-52
V
25
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device operates under
abnormal conditions this software must limit the duration and number of activation cycles.
10/37
µA
V
5.5
ICSD=1mA
ICSD= -1mA
µA
V
VCSD= 2.1V
VCC= 13V
5V<VCC<28V
VON
Unit
1
5.5
VCSD= 0.9V
DC short circuit current
VDEMAG
Max.
10
IIN= 1mA
IIN= -1mA
IlimH
THYST
Typ.
0.25
Input clamp voltage
CS_DIS low level
voltage
Table 8.
VIN= 0.9V
Input hysteresis
voltage
VCSDL
VCSCL
Min.
VN5E025AJ-E
Electrical specifications
Table 9.
Symbol
Current sense (8V<VCC<18V)
Parameter
Test conditions
KLED
IOUT/ISENSE
IOUT= 0.05A, VSENSE=0.5V,
VCSD=0V
Tj= -40°C...150°C
K0
IOUT/ISENSE
IOUT= 0.5A; VSENSE=0.5V;
VCSD=0V;
Tj= -40°C...150°C
IOUT/ISENSE
IOUT= 2A; VSENSE=4V; VCSD=0V;
Tj= -40°C...150°C
Tj= 25°C...150°C
Current sense ratio
drift
IOUT=2A; VSENSE= 4V;
VCSD=0V;
TJ= -40 °C to 150 °C
IOUT/ISENSE
IOUT= 3A; VSENSE=4V; VCSD=0V;
Tj= -40°C...150°C
Tj=25°C...150°C
Current sense ratio
drift
IOUT=3 A; VSENSE= 4 V;
VCSD=0V;
TJ= -40 °C to 150 °C
IOUT/ISENSE
IOUT= 10A; VSENSE=4V; VCSD=0V;
Tj= -40°C...150°C
Tj=25°C...150°C
Current sense ratio
drift
IOUT= 10 A; VSENSE= 4 V;
VCSD=0V;
TJ= -40 °C to 150 °C
K1
dK1/K1(1)
K2
dK2/K2(1)
K3
dK3/K3(1)
ISENSE0
IOL
VSENSE
Analog sense
leakage current
Min.
Typ.
Max. Unit
1370 3180 4930
1990 3050 4120
2100 2860 3840
2220 2860 3500
-10
10
%
2300 2850 3520
2420 2850 3300
-7
7
%
2690 2830 3060
2700 2830 3020
-4
4
%
IOUT=0A; VSENSE=0V;
VCSD=5V; VIN=0V; Tj=-40°C...150°C
VCSD=0V; VIN=5V; Tj=-40°C...150°C
0
0
1
2
µA
µA
IOUT=2A; VSENSE=0V;
VCSD=5V; VIN=5V; Tj=-40°C...150°C
0
1
µA
30
mA
Open load ON state
current detection
threshold
VIN = 5V, 8V<VCC<18V
ISENSE= 5 µA
5
Max analog sense
output voltage
IOUT= 3A; VCSD= 0V
5
V
Analog sense output
VCC= 13V; RSENSE= 3.9KΩ
VSENSEH(2) voltage in fault
condition
8
Analog sense output
ISENSEH(2) current in fault
VCC= 13V; VSENSE= 5V
condition
9
Doc ID 13106 Rev 4
mA
11/37
Electrical specifications
Table 9.
Symbol
VN5E025AJ-E
Current sense (8V<VCC<18V) (continued)
Parameter
Test conditions
Min.
Typ.
Max. Unit
Delay response time VSENSE<4V, 0.5<Iout<10A
tDSENSE1H from falling edge of ISENSE=90% of ISENSE max
CS_DIS pin
(see Figure 4)
40
100
Delay response time VSENSE<4V, 0.5<Iout<10A
from rising edge of ISENSE=10% of ISENSE max
CS_DIS pin
(see Figure 4)
5
20
Delay response time VSENSE<4V, 0.5<Iout<10A
tDSENSE2H from rising edge of ISENSE=90% of ISENSE max
INPUT pin
(see Figure 4)
80
300
tDSENSE1L
Delay response time
between rising edge
ΔtDSENSE2H of output current
and rising edge of
current sense
tDSENSE2L
µs
VSENSE < 4V,
ISENSE = 90% of ISENSEMAX,
IOUT = 90% of IOUTMAX
IOUTMAX= 3A (see Figure 7)
110
Delay response time VSENSE<4V, 0.5<Iout<10A
from falling edge of ISENSE=10% of ISENSE max
INPUT pin
(see Figure 4)
80
250
1. Parameter guaranteed by design, it is not tested.
2. Fault condition includes: power limitation, overtemperature and open load OFF state detection.
Table 10.
Symbol
VOL
tDSTKON
12/37
Openload detection (8V<VCC<18V)
Parameter
Test conditions
Openload Off state
voltage detection
threshold
VIN = 0V
Output short circuit to
VCC detection delay at
turn off
See Figure 5.
Min.
Typ.
Max.
Unit
2
4
V
180
1200
µs
IL(off2)r
Off state output current at VIN=0V; VSENSE=0V
VOUT = 4V
VOUT rising from 0V to 4V
-120
0
µA
IL(off2)f
Off state output current at VIN=0V; VSENSE=VSENSEH
VOUT = 2V
VOUT falling from VCC to 2V
-50
90
µA
td_vol
Delay response from
output rising edge to
VSENSE rising edge in
open load
20
µs
VOUT= 4 V; VIN= 0V
VSENSE= 90% of VSENSEH
Doc ID 13106 Rev 4
VN5E025AJ-E
Electrical specifications
Figure 4.
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
tDSENSE2H
Figure 5.
tDSENSE1L
tDSENSE1H
tDSENSE2L
Openload Off-state delay timing
OUTPUT STUCK TO VCC
VIN
VOUT > VOL
VSENSEH
VCS
tDSTKON
Figure 6.
Switching characteristics
VOUT
tWon
tWoff
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
tr
10%
tf
t
INPUT
td(on)
td(off)
t
Doc ID 13106 Rev 4
13/37
Electrical specifications
Figure 7.
VN5E025AJ-E
Delay response time between rising edge of ouput current and rising
edge of current sense (CS enabled)
VIN
ΔtDSENSE2H
t
IOUT
IOUTMAX
90% IOUTMAX
t
ISENSE
ISENSEMAX
90% ISENSEMAX
t
Figure 8.
Output voltage drop limitation
Vcc-Vout
Tj=150oC
Tj=25oC
Tj=-40oC
Von
Von/Ron(T)
14/37
Doc ID 13106 Rev 4
Iout
VN5E025AJ-E
Electrical specifications
Figure 9.
IOUT / ISENSE vs IOUT
Iout / Isense
4200
max Tj = -40 °C to 150 °C
3700
3200
max Tj = 25 °C to 150 °C
typical value
2700
min Tj = 25 °C to 150 °C
2200
min Tj = -40 °C to 150 °C
1700
2
3
4
5
6
7
8
9
10
IOUT (A)
Figure 10. Maximum current sense ratio drift vs load current
dk/k(%)
10
5
0
-5
-10
2
3
4
5
6
7
8
9
10
IOUT (A)
Note:
Parameter guaranteed by design; it is not tested.
Doc ID 13106 Rev 4
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Electrical specifications
Table 11.
VN5E025AJ-E
Truth table
Input
Output
Sense (VCSD=0V)(1)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
Conditions
Overload
H
VSENSEH
Short circuit to GND
(power limitation)
L
H
L
L
0
VSENSEH
Open load OFF state
(with external pull-up)
L
H
VSENSEH
Short circuit to VCC
(external pull-up
disconnected)
L
H
H
H
VSENSEH
< Nominal
Negative output voltage
clamp
L
L
0
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
16/37
Doc ID 13106 Rev 4
VN5E025AJ-E
Electrical specifications
Table 12.
ISO 7637-2:
2004(E)
Test pulse
Electrical transient requirements
Test levels(1)
III
IV
1
-75V
-100V
2a
+37V
3a
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
Impedance
Min.
Max.
5000 pulses
0.5s
5s
2 ms, 10Ω
+50V
5000 pulses
0.2s
5s
50µs, 2Ω
-100V
-150V
1h
90ms
100ms
0.1µs, 50Ω
3b
+75V
+100V
1h
90ms
100ms
0.1µs, 50Ω
4
-6V
-7V
1 pulse
100ms, 0.01Ω
+65V
+87V
1 pulse
400ms, 2Ω
5b
(2)
ISO 7637-2:
2004E
Test pulse
III
VI
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
5b(2)
C
C
Class
Test level results
Contents
C
All functions of the device performed as designed after exposure to disturbance.
E
One or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
Doc ID 13106 Rev 4
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Electrical specifications
2.4
VN5E025AJ-E
Waveforms
Figure 11.
Normal operation
Normal operation
INPUT
Nominal load
Nominal load
IOUT
VSENSE
VCS_DIS
Figure 12. Overload or Short to GND
Overload or Short to GND
INPUT
ILimH >
Power Limitation
Thermal cycling
ILimL >
IOUT
VSENSE
VCS_DIS
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VN5E025AJ-E
Electrical specifications
Figure 13. Intermittent Overload
Intermittent Overload
INPUT
Overload
ILimH >
ILimL >
Nominal load
IOUT
VSENSEH>
VSENSE
VCS_DIS
Figure 14. OFF-State Open Load with external circuitry
OFF-State Open Load
with external circutry
INPUT
VOUT > VOL
VOUT
VOL
IOUT
VSENSEH >
tDSTK(on)
VSENSE
VCS_DIS
Doc ID 13106 Rev 4
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Electrical specifications
VN5E025AJ-E
Figure 15. Short to VCC
Short to VCC
Resistive
Short to VCC
Hard
Short to VCC
VOUT > VOL
VOL
VOUT
IOUT
tDSTK(on)
tDSTK(on)
VCS_DIS
Figure 16. TJ evolution in Overload or Short to GND
TJ evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients
TTSD
THYST
TR
TJ_START
TJ
ILimH >
Power Limitation
< ILimL
IOUT
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Doc ID 13106 Rev 4
VN5E025AJ-E
2.5
Electrical specifications
Electrical characteristics curves
Figure 17. Off state output current
Figure 18. High level input current
Iih (µA)
Iloff (nA)
5
1500
4,5
Off State
Vcc=13V
Vin=Vout=0V
1200
Vin=2.1V
4
3,5
900
3
600
2,5
2
300
1,5
1
0
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
100
125
150
175
100
125
150
175
150
175
Tc (°C)
Tc (°C)
Figure 19. Input clamp level
Figure 20. Input low level
Vicl (V)
Vil (V)
7
2
1,8
lin=1mA
6,8
1,6
1,4
6,6
1,2
6,4
0,8
1
0,6
6,2
0,4
0,2
6
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
Tc (°C)
Figure 21. Input high level
Figure 22. Input hysteresis voltage
Vihyst (V)
Vih (V)
4
1
0,9
3,5
0,8
3
0,7
2,5
0,6
0,5
2
0,4
1,5
0,3
1
0,2
0,5
0,1
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
Tc (°C)
Tc (°C)
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Electrical specifications
VN5E025AJ-E
Figure 23. On state resistance vs Tcase
Figure 24. On state resistance vs VCC
Ron (mOhm)
Ron (mOhm)
80
60
50
Iout= 3A
Vcc=13V
60
40
Tc=150°C
Tc=125°C
30
40
Tc=25°C
20
Tc=-40°C
20
10
0
0
-50
-25
0
25
50
75
100
125
150
0
175
5
10
15
20
25
30
35
40
150
175
150
175
Vcc (V)
Tc (°C)
Figure 25. Undervoltage shutdown
Figure 26. Turn-On voltage slope
Vusd (V)
(dVout/dt )On (V/ms)
8
700
7
600
Vcc=13V
RI=4.3 Ohm
6
500
5
400
4
300
3
200
2
100
1
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
Tc (°C)
Figure 27. ILIMH vs Tcase
Figure 28. Turn-Off voltage slope
Ilimh (A)
(dVout/dt )Off (V/ms)
80
400
350
Vcc=13V
Vcc=13V
RI= 4.3 Ohm
300
70
250
200
60
150
100
50
50
0
40
-50
-25
0
25
50
75
100
125
150
175
-50
22/37
-25
0
25
50
75
Tc (°C)
Tc (°C)
Doc ID 13106 Rev 4
100
125
VN5E025AJ-E
Electrical specifications
Figure 29. CS_DIS high level voltage
Figure 30. CS_DIS clamp voltage
Vcsdh (V)
Vcsdcl(V)
4
10
3,5
9
3
8
2,5
7
2
6
1,5
5
1
4
0,5
3
Iin = 1 mA
0
2
-50
-25
0
25
50
75
100
125
150
175
-50
Tc (°C)
-25
0
25
50
75
100
125
150
175
Tc (°C)
Figure 31. CS_DIS low level voltage
Vcsdl (V)
3
2,5
2
1,5
1
0,5
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Doc ID 13106 Rev 4
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Application information
3
VN5E025AJ-E
Application information
Figure 32. Application schematic
+5V
VCC
Rprot
CS_DIS
Dld
ΜCU
Rprot
IINPUT
OUTPUT
Rprot
CURRENT SENSE
GND
RGND
RSENSE
VGND
Cext
3.1
DGND
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1
Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following show how to dimension the RGND resistor:
1.
RGND ≤ 600mV / (IS(on)max)
2.
RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC<0 during reverse battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not shared by the device ground, then the
RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
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Doc ID 13106 Rev 4
VN5E025AJ-E
Application information
values. This shift varies depending on how many devices are ON in the case of several high
side drivers sharing the same RGND.
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
3.1.2
Solution 2: diode (DGND) in the ground line
Note that a resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device drives
an inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network produces a shift (≈600mV) in the input threshold
and in the status output values if the microprocessor ground is not common to the device
ground. This shift not varies if more than one HSD shares the same diode/resistor network.
3.2
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3
MCU I/O protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the µC I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHμC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak = - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 180kΩ
Recommended values: Rprot =10kΩ, CEXT=10nF.
Doc ID 13106 Rev 4
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Application information
3.4
VN5E025AJ-E
Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
●
Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a know ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V
minimum (see parameter VSENSE in Table 9: Current sense (8V<VCC<18V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8V<VCC<18V)).
●
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to Truth table):
–
Power limitation activation
–
Over-temperature
–
Short to VCC in OFF state
–
Open load in OFF state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 33. Current sense and diagnostic
VPU
VBAT
VCC
Main MOSn
41V
PU_CMD
Overtemperature
IOUT/KX
RPU
+
OL OFF
ISENSEH
VOL
Pwr_Lim
CS_DIS
OUTn
ILoff2r
ILoff2f
INPUTn
VSENSEH
CURRENT
SENSEn
RPROT
To uC ADC
26/37
RSENSE
GND
Load
RPD
VSENSE
Doc ID 13106 Rev 4
VN5E025AJ-E
3.4.1
Application information
Short to VCC and OFF state open load detection
Short to VCC
A short circuit between VCC and output is indicated by the relevant current sense pin set to
VSENSEH during the device off state. Small or no current is delivered by the current sense
during the on state depending on the nature of the short circuit.
OFF state open load with external circuitry
Detection of an open load in off mode requires an external pull-up resistor RPU connecting
the output to a positive supply voltage VPU.
It is preferable VPU to be switched off during the module stand-by mode in order to avoid the
overall stand-by current consumption to increase in normal conditions, i.e. when load is
connected.
An external pull down resistor RPD connected between output and GND is mandatory to
avoid misdetection in case of floating outputs in off state (see Figure 33: Current sense and
diagnostic).
RPD must be selected in order to ensure VOUT < VOLmin unless pulled up by the external
circuitry:
VOUT
Pull − up _ OFF
= RPD ⋅ I L ( off 2) f < VOL min = 2V
RPD ≤ 22 KΩ is recommended.
For proper open load detection in off state, the external pull-up resistor must be selected
according to the following formula:
VOUT
Pull − up _ ON
=
RPD ⋅ VPU − RPU ⋅ RPD ⋅ I L ( off 2) r
RPU + RPD
> VOL max = 4V
For the values of VOLmin ,VOLmax, IL(off2)r and IL(off2)f see Table 10: Openload detection
(8V<VCC<18V).
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Application information
3.5
VN5E025AJ-E
Maximum demagnetization energy (VCC = 13.5V)
Figure 34. Maximum turn off current versus inductance
100
A
B
C
I (A)
10
1
0,1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
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VN5E025AJ-E
Package and PC board thermal data
4
Package and PC board thermal data
4.1
PowerSSO-12 thermal data
Figure 35. PowerSSO-12 PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4
area= 77mm x 86mm, PCB thickness=1.6mm, Cu thickness=70µm (front and back side),
Copper areas: from minimum pad lay-out to 8cm2).
Figure 36. Rthj-amb vs PCB copper area in open box free air condition
RTHj_amb( ° C/ W)
65
60
55
50
45
40
35
30
0
2
4
6
8
10
PCB Cu heat sink area ( cm^ 2)
Doc ID 13106 Rev 4
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Package and PC board thermal data
VN5E025AJ-E
Figure 37. PowerSSO-12 thermal impedance junction ambient single pulse
ZTH ( ° C/ W)
100
Footprint
2 cm2
8 cm2
10
1
0,1
0,0001
0,001
0,01
0,1
1
Time ( s)
10
100
1000
Figure 38. Thermal fitting model of a single channel HSD in PowerSSO-12
Equation 1: pulse calculation formula:
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
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δ = tp ⁄ T
Doc ID 13106 Rev 4
VN5E025AJ-E
Package and PC board thermal data
Table 13.
Thermal parameter
Area/island (cm2)
Footprint
R1 (°C/W)
0.3
R2 (°C/W)
1.3
R3 (°C/W)
4
R4 (°C/W)
2
8
8
8
7
R5 (°C/W)
22
15
10
R6 (°C/W)
26
20
15
C1 (W.s/°C)
0.001
C2 (W.s/°C)
0.003
C3 (W.s/°C)
0.05
C4 (W.s/°C)
0.2
0.1
0.1
C5 (W.s/°C)
0.27
0.8
1
C6 (W.s/°C)
3
6
9
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Package and packing information
VN5E025AJ-E
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. ECOPACK® packages are lead-free. The category of Second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com.
5.2
PowerSSO-12 mechanical data
Figure 39. PowerSSO-12 package dimensions
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Package and packing information
Table 14.
PowerSSO-12 mechanical data
Dimension
Millimeters
Min.
Typ.
Max.
A
1.250
1.620
A1
0.000
0.100
A2
1.100
1.650
B
0.230
0.410
C
0.190
0.250
D
4.800
5.000
E
3.800
4.000
e
0.800
H
5.800
6.200
h
0.250
0.500
L
0.400
1.270
k
0º
8º
X
1.900
2.500
Y
3.600
4.200
ddd
0.100
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Package and packing information
5.3
VN5E025AJ-E
Packing information
Figure 40. PowerSSO-12 tube shipment (no suffix)
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
A
100
2000
532
1.85
6.75
0.6
All dimensions are in mm.
Figure 41. PowerSSO-12 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.05)
D1 (min)
F (± 0.1)
K (max)
P1 (± 0.1)
12
4
8
1.5
1.5
5.5
4.5
2
End
All dimensions are in mm.
Start
Top
cover
tape
No components
Components
No components
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
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500mm min
VN5E025AJ-E
6
Order codes
Order codes
Table 15.
Device summary
Package
PowerSSO-12
Order codes
Tube
Tape and reel
Root part number 2
VN5E025AJTR-E
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Revision history
7
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Revision history
Table 16.
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Document revision history
Date
Revision
Changes
24-Jan-2006
1
Initial release.
15-Jan-2007
2
Reformatted.
Section 4.1 restructured.
01-Apr-2008
3
Document reformatted and restructured.
Changed max. operating voltage value from 36V to 28V.
Changed Description on cover page.
Table 6.: Switching characteristics (VCC=13V, Tj=25°C): added
typical values.
Updated Table 9.: Current sense (8V<VCC<18V):
– changed VCC max. value from 16 V to 18 V
– added K, dK/K values
– added IOL parameter
– changed VSENSEH typical value from 9 V to 8 V.
– changed ISENSEH typical value from 8 mA to 9 mA.
– changed tDSENSE1H typical value from 50 µs to 40 µs.
– changed tDSENSE2L typical value from 100 µs to 80 µs.
– changed tDSENSE2H typical value from 70 µs to 80 µs
– added ΔtDSENSE2H parameter
Updated Table 10.: Openload detection (8V<VCC<18V):
– added IL(off2)r, IL(off2)f and td_vol parameters
Added Figure 9.: IOUT / ISENSE vs IOUT.
Added Figure 10.: Maximum current sense ratio drift vs load current
Added Section 2.4: Waveforms.
Added Section 2.5: Electrical characteristics curves.
Updated Section 3: Application information:
– added Section 3.4: Current sense and diagnostic
Added Section 4.1: PowerSSO-12 thermal data.
10-May-2010
4
Updated Figure 9: IOUT / ISENSE vs IOUT
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