STMICROELECTRONICS VND5160AJTR-E

VND5160AJ-E
Double channel high side driver with analog current sense
for automotive applications
Features
Max supply voltage
VCC
41 V
Operating voltage range
VCC
4.5 to 36V
Max on-state resistance (per ch.)
RON
160 mΩ
Current limitation (typ)
ILIMH
5A
Off state supply current
IS
2 µA(1)
PowerSSO-12
– Reverse battery protection (see Application
schematic)
– Electrostatic discharge protection
1. Typical value with all loads connected.
Application
■
General features
– Inrush current active management by
power limitation
– Very low stand-by current
– 3.0V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
European directive
■ Diagnostic functions
– Proportional load current sense
– High current sense precision for wide range
currents
– Current sense disable
– Thermal shutdown indication
– Very low current sense leakage
■ Protection
– Undervoltage shut-down
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of Vcc
– Thermal shut down
Table 1.
■
All types of resistive, inductive and capacitive
loads
■
Suitable as LED driver
Description
The VND5160AJ-E is a monolithic device made
using STMicroelectronics VIPower technology. It
is intended for driving resistive or inductive loads
with one side connected to ground. Active VCC pin
voltage clamp protects the device against low
energy spikes (see ISO7637 transient
compatibility table). This device integrates an
analog current sense which delivers a current
proportional to the load current (according to a
known ratio) when CS_DIS is driven low or left
open. When CS_DIS is driven high, the
CURRENT SENSE pin is in a high impedance
condition. Output current limitation protects the
device in overload condition. In case of long
overload duration, the device limits the dissipated
power to safe level up to thermal shut-down
intervention. Thermal shut-down with automatic
restart allows the device to recover normal
operation as soon as fault condition disappears.
Device summary
Order codes
Package
PowerSSO-12
February 2008
Tube
Tape and Reel
VND5160AJ-E
VND5160AJTR-E
Rev 5
1/31
www.st.com
31
Contents
VND5160AJ-E
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.1
4
6
2/31
3.1.1
Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 21
3.1.2
Solution 2 : diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 22
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.3
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.4
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 23
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.1
5
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 21
PowerSSO-12™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
VND5160AJ-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and N.C. pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC=13V, Tj=25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8V<VCC<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
PowerSSO-12™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
3/31
List of figures
VND5160AJ-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
4/31
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Iout/isense vs. Iout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
On state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
On state resistance vs. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
ILIMH vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Maximum turn-Off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 23
PowerSSO-12™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 24
PowerSSO-12™ thermal impedance junction ambient single pulse (one channel ON) . . . 25
Thermal fitting model of a double channel HSD in PowerSSO-12™ . . . . . . . . . . . . . . . . . 25
PowerSSO-12™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
PowerSSO-12™ tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
PowerSSO-12™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
VND5160AJ-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
VCC
UNDERVOLTAGE
VCC
CLAMP
OUTPUT1
PwCLAMP 1
GND
CURRENT
SENSE1
DRIVER 1
ILIM 1
INPUT1
LOGIC
VDSLIM 1
PwrLIM 1
PwCLAMP 2
DRIVER 2
OUTPUT2
ILIM 2
OVERTEMP. 1
INPUT2
VDSLIM 2
IOUT1
K1
CURRENT
SENSE2
OVERTEMP. 2
IOUT2
K2
PwrLIM 2
CS_DIS
Table 2.
Pin function
Name
VCC
OUTPUTn
GND
INPUTn
Function
Battery connection.
Power output.
Ground connection. Must be reverse battery protected by an external
diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.
CURRENT SENSEn Analog current sense pin, delivers a current proportional to the load current.
CS_DIS
Active high CMOS compatible pin, to disable the current sense pin.
5/31
Block diagram and pin description
Figure 2.
VND5160AJ-E
Configuration diagram (top view)
TAB = Vcc
GND
INPUT2
INPUT1
CURRENT SENSE1
CURRENT SENSE2
CS_DIS
N.C.
OUTPUT2
OUTPUT2
OUTPUT1
OUTPUT1
N.C.
12
11
10
9
8
7
1
2
3
4
5
6
PowerSSO-12
Note:
The above pin configuration reflects the changes notified with PCN-APG-BOD/07/2886. The
new pinout is backaward compatible with existing PCB layouts where pins #7 and 12 are
connected to Vcc. For new PCB designs, these pins should be left unconnected.
Table 3.
Suggested connections for unused and N.C. pins
Connection / Pin
Current Sense
N.C.
Output
Input
CS_DIS
Floating
N.R.(1)
X
X
X
X
To ground
Through 1kΩ resistor
X
N.R.(1)
1. Not recommended.
6/31
Through 10kΩ Through 10kΩ
resistor
resistor
VND5160AJ-E
2
Electrical specifications
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VCC
OUTPUTn
CS_DIS
VOUTn
ISENSEn
IINn
VINn
VCC
IOUTn
ICSD
VCSD
VFn(1)
CURRENT
SENSEn
INPUTn
VSENSEn
GND
IGND
Note:
VFn = VOUTn - VCC during reverse battery condition.
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 4.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
41
V
-VCC
Reverse DC supply voltage
0.3
V
- IGND
DC reverse ground pin current
200
mA
Internally limited
A
6
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
200
mA
VCC-41
+VCC
V
V
34
mJ
IOUT
- IOUT
IIN
ICSD
DC output current
Reverse DC output current
-ICSENSE DC reverse CS pin current
VCSENSE Current sense maximum voltage
EMAX
Maximum switching energy (single pulse)
(L=12mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IOUT = IlimL(Typ.) )
7/31
Electrical specifications
Table 4.
Absolute maximum ratings (continued)
Symbol
Value
Unit
VESD
Electrostatic discharge (Human Body Model: R=1.5KΩ;
C=100pF)
- INPUT
- CURRENT SENSE
- CS_DIS
- OUTPUT
- VCC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Max value
Unit
8
°C/W
See Figure 29
°C/W
Tj
Tstg
2.2
VND5160AJ-E
Parameter
Thermal data
Table 5.
Symbol
Thermal data
Parameter
Rthj-case Thermal resistance junction-case (MAX) (With one channel ON)
Rthj-amb
8/31
Thermal resistance junction-ambient (MAX)
VND5160AJ-E
2.3
Electrical specifications
Electrical characteristics
The values specified in this section are for 8V<VCC<36V; -40°C<Tj<150°C, unless otherwise
stated.
Table 6.
Power section
Symbol
Parameter
VCC
Operating supply voltage
VUSD
VUSDhyst
Test conditions
Min. Typ. Max. Unit
4.5
13
36
V
Undervoltage shutdown
3.5
4.5
V
Undervoltage shut-down
hysteresis
0.5
On state resistance (1)
IOUT= 0.5A; Tj= 25°C
IOUT= 0.5A; Tj= 150°C
IOUT= 0.5A; VCC= 5V; Tj= 25°C
Vclamp
Clamp voltage
IS= 20 mA
IS
Supply current
Off State; VCC= 13V; Tj= 25°C;
VIN=VOUT=VSENSE=VCSD=0V
On State; VCC=13V; VIN=5V; IOUT=0A
IL(off)
Off state output
current (1)
VIN=VOUT=0V; VCC=13V; Tj=25°C
VIN=VOUT=0V; VCC=13V; Tj=125°C
Output - VCC diode
voltage (1)
-IOUT= 0.6A; Tj=150°C
RON
VF
41
0
0
V
160
320
210
mΩ
mΩ
mΩ
46
52
V
2(2)
3
5(2)
6
µA
mA
0.01
3
5
µA
0.7
V
1. For each channel.
2. PowerMOS leakage included.
Table 7.
Symbol
Switching (VCC=13V, Tj=25°C)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn- On delay time
RL= 26Ω (see Figure 8.)
10
µs
td(off)
Turn- Off delay time
RL= 26Ω (see Figure 8.)
15
µs
(dVOUT/dt)on
Turn- On voltage
slope
RL= 26Ω
See
Figure 20.
V/µs
(dVOUT/dt)off
Turn- Off voltage
slope
RL= 26Ω
See
Figure 22.
V/µs
WON
Switching energy
losses during twon
RL= 26Ω (see Figure 8.)
0.03
mJ
WOFF
Switching energy
losses during twoff
RL= 26Ω (see Figure 8.)
0.02
mJ
9/31
Electrical specifications
Table 8.
Symbol
VND5160AJ-E
Logic input
Parameter
Test conditions
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
Min.
VIN= 0.9V
ICSDL
Low level CS_DIS current
VCSDH
CS_DIS high level voltage
ICSDH
High level CS_DIS current
Table 9.
Symbol
V
µA
2.1
V
7
V
V
0.9
V
-0.7
1
µA
2.1
V
VCSD= 2.1V
10
0.25
7
V
V
-0.7
Protection and diagnostics(1)
Parameter
Test conditions
DC short circuit current
VCC= 13V
5V<VCC<36V
IlimL
Short circuit current
thermal cycling
VCC= 13V; TR<Tj<TTSD
TTSD
Shutdown temperature
during
TR
Reset temperature
TRS
Thermal reset of STATUS
Min.
Typ.
Max.
Unit
3.8
5
7.5
7.5
A
A
2
150
175
A
200
TRS + 1 TRS + 5
135
Thermal hysteresis (TTSD-TR)
°C
°C
°C
7
°C
VDEMAG Turn-Off output voltage clamp
IOUT= 1A; VIN= 0;
L= 20mH
VCC-41 VCC-46 VCC-52
V
Output voltage drop
limitation
IOUT= 0.03A;
Tj= -40°C...150°C
(see Figure 9.)
25
mV
VON
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/31
µA
V
5.5
ICSD= 1mA
ICSD= -1mA
CS_DIS clamp voltage
µA
V
5.5
VCSD= 0.9V
IlimH
THYST
0.9
0.25
VCSD(hyst) CS_DIS hysteresis voltage
VCSCL
Unit
10
IIN= 1mA
IIN= -1mA
CS_DIS low level voltage
Max.
1
VIN= 2.1V
Input clamp voltage
VCSDL
Typ.
VND5160AJ-E
Electrical specifications
Table 10.
Symbol
K0
K1
dK1/K1
(1)
K2
dK2/K2(1)
K3
dK3/K3(1)
Current sense (8V<VCC<16V)
Parameter
Test conditions
Min. Typ. Max. Unit
IOUT/ISENSE
IOUT= 0.025A; VSENSE= 0.5V; VCSD=0V;
260
Tj= -40°C...150°C
IOUT/ISENSE
IOUT= 0.35A; VSENSE=0.5V; VCSD=0V;
Tj= -40°C...150°C
IOUT=0.35A; VSENSE=0.5V; VCSD=0V;
Tj= 25°C...150°C
IOUT= 0.35A; VSENSE= 0.5V;
Current sense ratio
VCSD=0V;
drift
TJ= -40 °C to 150 °C
IOUT/ISENSE
IOUT= 0.5A; VSENSE= 4V; VCSD= 0V;
Tj= -40°C...150°C
IOUT= 0.5A; VSENSE= 4V; VCSD= 0V;
Tj= 25°C...150°C
IOUT= 0.5 A; VSENSE= 4 V;
Current sense ratio
VCSD= 0V;
drift
TJ= -40 °C to 150 °C
IOUT/ISENSE
IOUT= 1.5A; VSENSE=4V; VCSD=0V;
Tj= -40°C...150°C
IOUT=1.5A; VSENSE=4V; VCSD=0V;
Tj= 25°C...150°C
IOUT= 1.5 A; VSENSE= 4 V;
Current sense ratio
VCSD=0V;
drift
TJ= -40 °C to 150 °C
500
750
320
450
590
360
450
540
-13
+13
360
440
540
380
440
510
-8
+8
410
440
480
420
440
460
%
%
-4
+4
%
IOUT=0A; VSENSE=0V;
VCSD=5V; VIN=0V; Tj=-40°C...150°C
VCSD=0V; VIN=5V; Tj=-40°C...150°C
0
0
1
2
µA
µA
IOUT=0.6A; VSENSE=0V;
VCSD=5V; VIN=5V; Tj= -40°C...150°C
0
1
µA
Openload ON state
current detection
threshold
VIN = 5V, ISENSE= 5 µA
1
5
mA
VSENSE
Max analog
senseoutput
voltage
IOUT=1.5A; VCSD=0V;
5
VSENSEH
Analog sense
output voltage in
overtemperature
condition
VCC=13V; RSENSE= 3.9KΩ;
9
V
ISENSEH
Analog sense
output current in
overtemperature
condition
VCC=13V; VSENSE= 5V;
8
mA
ISENSE0
IOL
Analog sense
leakage current
V
11/31
Electrical specifications
Table 10.
Symbol
VND5160AJ-E
Current sense (8V<VCC<16V) (continued)
Parameter
Test conditions
Min. Typ. Max. Unit
tDSENSE1H
Delay response
time from falling
edge of CS_DIS
pin
VSENSE<4V, 0.08A<Iout<1.5A
ISENSE=90% of ISENSE max
(see Figure 4.)
50
100
µs
tDSENSE1L
Delay response
time from rising
edge of CS_DIS
pin
VSENSE<4V, 0.08A<Iout<1.5A
ISENSE=10% of ISENSE max
(see Figure 4.)
5
20
µs
tDSENSE2H
Delay response
time from rising
edge of INPUT pin
VSENSE<4V, 0.08A<Iout<1.5A
ISENSE=90% of ISENSE max
(see Figure 4.)
80
150
µs
20
µs
250
µs
Delay response
time between rising
edge of output
∆tDSENSE2H
current and rising
edge of current
sense
tDSENSE2L
Delay response
time from falling
edge of INPUT pin
VSENSE < 4V,
ISENSE = 90% of ISENSEMAX,
IOUT = 90% of IOUTMAX
IOUTMAX=2A (see Figure 5)
VSENSE<4V, 0.08A<Iout<1.5A
ISENSE=10% of ISENSE max
(see Figure 4.)
100
1. Parameter guaranteed by design; it is not tested.
Figure 4.
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
tDSENSE2H
12/31
tDSENSE1L
tDSENSE1H
tDSENSE2L
VND5160AJ-E
Electrical specifications
Figure 5.
Delay response time between rising edge of ouput current and rising
edge of current sense (CS enabled)
VIN
∆tDSENSE2H
t
IOUT
IOUTMAX
90% IOUTMAX
t
ISENSE
ISENSEMAX
90% ISENSEMAX
t
13/31
Electrical specifications
Figure 6.
VND5160AJ-E
Iout/ Isense vs. Iout (see Table 10 for details)
Iout / Isense
700
650
600
max Tj = -40 °C to 150 °C
550
500
max Tj = 25 °C to 150 °C
450
typical value
min Tj = 25 °C to 150 °C
400
350
min Tj = -40 °C to 150 °C
300
250
200
0,35
0,58
0,81
1,04
1,27
IOUT (A)
Figure 7.
Maximum current sense ratio drift vs load current
dk/k(%)
15
10
5
0
-5
-10
-15
0,1
0,3
0,5
0,7
0,9
IOUT (A)
Note:
14/31
Parameter guaranteed by design; it is not tested.
1,1
1,3
1,5
1,7
1,5
VND5160AJ-E
Electrical specifications
Table 11.
Truth table
INPUT
OUTPUT
SENSE (VCSD=0V)(1)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
L
H
H
L
L
L
0
0 if Tj < TTSD
VSENSEH if Tj > TTSD
Short circuit to VCC
L
H
H
H
0
< Nominal
Negative output voltage clamp
L
L
0
Conditions
Short circuit to GND
(Rsc ≤10 mΩ)
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
Figure 8.
Switching characteristics
VOUT
tWoff
tWon
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
tr
tf
t
INPUT
td(on)
td(off)
t
Figure 9.
Output voltage drop limitation
Vcc-Vout
Tj=150oC
Tj=25oC
Tj=-40oC
Von
Iout
Von/Ron(T)
15/31
Electrical specifications
Table 12.
ISO 7637-2:
2004(E)
VND5160AJ-E
Electrical transient requirements
Test levels (1)
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
impedance
5000
pulses
0.5 s
5s
2 ms, 10 Ω
+50V
5000
pulses
0.2 s
5s
50 µs, 2 Ω
-100V
-150V
1h
90 ms
100 ms
0.1 µs, 50 Ω
3b
+75V
+100V
1h
90 ms
100 ms
0.1 µs, 50 Ω
4
-6V
-7V
1 pulse
100 ms, 0.01
Ω
5b (2)
+65V
+87V
1 pulse
400 ms, 2 Ω
Test pulse
III
IV
1
-75V
-100V
2a
+37V
3a
Test level results(1)
ISO 7637-2:
2004(E)
Test pulse
III
IV
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
5b (2)
C
C
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
16/31
Class
Contents
C
All functions of the device are performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
VND5160AJ-E
Electrical specifications
Figure 10. Waveforms
NORMAL OPERATION
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
SHORT TO VCC
INPUT
CS_DIS
LOAD VOLTAGE
LOAD CURRENT
SENSE CURRENT
<Nominal
<Nominal
OVERLOAD OPERATION
Tj
TR TTSD
TRS
INPUT
CS_DIS
ILIMH
ILIML
LOAD CURRENT
VSENSEH
SENSE CURRENT
current power
limitation limitation
thermal cycling
SHORTED LOAD
NORMAL LOAD
17/31
Electrical specifications
2.4
VND5160AJ-E
Electrical characteristics curves
Figure 11. Off state output current
Figure 12. High level input current
Iloff (uA)
Iih (uA)
0.3
5
4.5
0.25
Off State
Vcc=13V
Vin=Vout=0V
0.2
Vin=2.1V
4
3.5
3
0.15
2.5
2
0.1
1.5
1
0.05
0.5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C )
50
75
100
125
150
175
100
125
150
175
150
175
Tc (°C )
Figure 13. Input clamp voltage
Figure 14. Input low level
Vicl (V)
Vil (V)
7
2
6.8
1.8
lin=1mA
6.6
1.6
6.4
1.4
6.2
1.2
6
1
5.8
0.8
5.6
0.6
5.4
0.4
5.2
0.2
5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C )
50
75
Tc (°C )
Figure 15. Input high level
Figure 16. Input hysteresis voltage
Vih (V)
Vihyst (V)
4
1
0.9
3.5
0.8
3
0.7
2.5
0.6
0.5
2
0.4
1.5
0.3
1
0.2
0.5
0.1
0
0
-50
-25
0
25
50
75
Tc (°C )
18/31
100
125
150
175
-50
-25
0
25
50
75
Tc (°C )
100
125
VND5160AJ-E
Electrical specifications
Figure 17. On state resistance vs. Tcase
Figure 18. On state resistance vs. VCC
Ron (mOhm)
R on (mOhm)
300
300
280
275
Iout=0.5A
Vcc=13V
260
250
240
Tc=150°C
225
Tc=125°C
220
200
200
175
180
160
150
140
125
120
100
100
Tc=25°C
Tc=-40°C
75
80
-50
-25
0
25
50
75
100
125
150
0
175
5
10
15
20
25
30
35
40
150
175
150
175
Vcc (V)
Tc (°C )
Figure 19. Undervoltage shutdown
Figure 20. Turn-On voltage slope
Vusd (V)
(dVout/dt)on (V/ms)
16
1000
900
14
Vcc=13V
RI=26Ohm
800
12
700
10
600
500
8
400
6
300
4
200
2
100
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C )
50
75
100
125
Tc (°C )
Figure 21. ILIMH vs. Tcase
Figure 22. Turn-Off voltage slope
Ilimh (A)
(dVout/dt)off (V/ms)
16
1000
900
14
Vcc=13V
Vcc=13V
RI=26Ohm
800
12
700
10
600
500
8
400
6
300
4
200
2
100
0
0
-50
-25
0
25
50
75
Tc (°C )
100
125
150
175
-50
-25
0
25
50
75
100
125
Tc (°C )
19/31
Electrical specifications
VND5160AJ-E
Figure 23. CS_DIS high level voltage
Figure 24. CS_DIS clamp voltage
Vcsdh (V)
Vcsdcl (V)
4
8
3.5
7.5
3
7
2.5
6.5
2
6
1.5
5.5
1
5
0.5
4.5
Icsd=1mA
0
4
-50
-25
0
25
50
75
100
125
150
175
Tc (°C )
Vcsdl (V)
4
3.5
3
2.5
2
1.5
1
0.5
0
-25
0
25
50
75
Tc (°C )
20/31
-25
0
25
50
75
Tc (°C )
Figure 25. CS_DIS low level voltage
-50
-50
100
125
150
175
100
125
150
175
VND5160AJ-E
3
Application information
Application information
Figure 26. Application schematic
+5V
VCC
Rprot
CS_DIS
Dld
µC
Rprot
IINPUT
OUTPUT
Rprot
CURRENT SENSE
GND
CEXT
RSENSE
VGND
RGND
DGND
Note:
Channel 2 has the same internal circuit as channel 1.
3.1
GND protection network against reverse battery
3.1.1
Solution 1 : resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1.
RGND ≤600mV / (IS(on)max).
2.
RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power Dissipation in RGND (when VCC<0: during reverse battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Solution 2 (see below).
21/31
Application information
3.1.2
VND5160AJ-E
Solution 2 : diode (DGND) in the ground line
A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈ 600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
3.2
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3
MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the MCU I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of MCU and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of MCU
I/Os.
-VCCpeak/Ilatchup ≤Rprot ≤(VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤Rprot ≤180kΩ.
Recommended values: Rprot =10kΩ, CEXT=10nF.
22/31
VND5160AJ-E
3.4
Application information
Maximum demagnetization energy (VCC = 13.5V)
Figure 27. Maximum turn-Off current versus inductance (for each channel)
10
A
B
C
I (A)
1
0,1
0,1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0 Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
23/31
Package and PC board thermal data
VND5160AJ-E
4
Package and PC board thermal data
4.1
PowerSSO-12™ thermal data
Figure 28. PowerSSO-12™ PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4
area= 77mm x 86mm, PCB thickness=1.6mm, Cu thickness=70µm (front and back side),
Copper areas: from minimum pad lay-out to 8cm2).
Figure 29. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON)
RTHj_amb(°C/W)
70
65
60
55
50
45
40
0
2
4
6
PCB Cu heatsink area (cm^2)
24/31
8
10
VND5160AJ-E
Package and PC board thermal data
Figure 30. PowerSSO-12™ thermal impedance junction ambient single pulse (one
channel ON)
ZTH (°C/W)
100
Footprint
2 cm2
8 cm2
10
1
0,001
0,01
0,1
1
Time (s)
10
100
1000
Equation 1: pulse calculation formula
Z
THδ
= R
TH
⋅ δ+Z
THtp
( 1 – δ)
where δ = tP/T
Figure 31. Thermal fitting model of a double channel HSD in PowerSSO-12™ (a)
a. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
25/31
Package and PC board thermal data
Table 13.
26/31
VND5160AJ-E
Thermal parameters
Area/island (cm2)
Footprint
R1= R7 (°C/W)
1.2
R2= R8 (°C/W)
6
R3 (°C/W)
3
R4 (°C/W)
2
8
8
8
7
R5 (°C/W)
22
15
10
R6 (°C/W)
26
20
15
C1= C7 (W.s/°C)
0.0008
C2= C8 (W.s/°C)
0.0016
C3 (W.s/°C)
0.0166
C4 (W.s/°C)
0.2
0.1
0.1
C5 (W.s/°C)
0.27
0.8
1
C6 (W.s/°C)
3
6
9
VND5160AJ-E
Package and packing information
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second-level interconnect. The category of
Second-Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97.
The maximum ratings related to soldering conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
5.2
Package mechanical data
Figure 32. PowerSSO-12™ package dimensions
27/31
Package and packing information
Table 14.
VND5160AJ-E
PowerSSO-12™ mechanical data
Millimeters
Symbol
Min.
Max.
A
1.250
1.620
A1
0.000
0.100
A2
1.100
1.650
B
0.230
0.410
C
0.190
0.250
D
4.800
5.000
E
3.800
4.000
e
0.800
H
5.800
6.200
h
0.250
0.500
L
0.400
1.270
k
0°
8°
X
2.200
2.800
Y
2.900
3.500
ddd
28/31
Typ.
0.100
VND5160AJ-E
5.3
Package and packing information
Packing information
Figure 33. PowerSSO-12™ tube shipment (no suffix)
B
C
A
Base Q.ty
100
Bulk Q.ty
2000
Tube length (± 0.5)
532
A
1.85
B
6.75
C (± 0.1)
0.6
All dimensions are in mm.
Figure 34. PowerSSO-12™ tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.05)
D1 (min)
F (± 0.1)
K (max)
P1 (± 0.1)
12
4
8
1.5
1.5
5.5
4.5
2
End
All dimensions are in mm.
Start
Top
cover
tape
No components Components
500mm min
No components
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
29/31
Revision history
6
VND5160AJ-E
Revision history
Table 15.
Document revision history
Date
Revision
13-Sep-2004
1
Initial release.
10-Apr-2006
2
Layout changed.
Major update to Section 2: Electrical specifications.
3
Reformatted.
Contents, List of tables and List of figures added.
Added Section 3.4: Maximum demagnetization energy
(VCC = 13.5V).
ECOPACK® package information added.
10-Dec-2007
4
Document reformatted and restructured.
Updated Figure 2: Configuration diagram (top view) : pins 7-12 left
unconnected (N.C) and added note.
Table 4: Absolute maximum ratings : corrected EMAX value from 14
to 34 mJ.
Added Figure 5: Delay response time between rising edge of ouput
current and rising edge of current sense (CS enabled).
Updated Figure 6: Iout/ Isense vs. Iout (see Table 10 for details).
Added Figure 7: Maximum current sense ratio drift vs load current.
Updated Table 10: Current sense (8V<VCC<16V) :
– changed tDSENSE2H max value from 300 µs to 150 µs.
– added dk1/k1, dk2/k2, dk3/k3, ∆tDSENSE2H , IOL parameters.
Table 12: Electrical transient requirements : updated test level values
III and IV for test pulse 5b and notes.
Updated Section 4.1: PowerSSO-12™ thermal data:
– changed Figure 29: Rthj-amb vs. PCB copper area in open box
free air condition (one channel ON).
– changed Figure 30: PowerSSO-12™ thermal impedance junction
ambient single pulse (one channel ON).
– Figure 31: Thermal fitting model of a double channel HSD in
PowerSSO-12™: added note.
– updated Table 13: Thermal parameters:
R3 value changed from 7 to 3 °C/W.
R4 values changed from 10 /10 /9 to 8 /8 /7 °C/W.
C3 value changed from 0.05 to 0.0166 W.s/°C.
12-Feb-2008
5
Corrected typing error in Table 10: Current sense (8V<VCC<16V) :
changed IOL test condition from VIN = 0V to VIN = 5V.
01-Mar-2007
30/31
Changes
VND5160AJ-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2008 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
31/31