STMICROELECTRONICS VNQ5E160AK-E

VNQ5E160AK-E
Quad channel high side driver with analog current sense
for automotive applications
Features
Max supply voltage
VCC
41V
Operating voltage range
VCC
4.5 to 28 V
Max on-state resistance (per ch.)
RON
160 mΩ
Current limitation (typ)
ILIMH
10 A
Off state supply current
IS
2 µA(1)
1. Typical value with all loads connected.
■
■
■
General
– Inrush current active management by
power limitation
– Very low stand-by current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
– Very low current sense leakage
Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
currents range
– Current sense disable
– Off state openload detection
– Output short to Vcc detection
– Thermal shutdown indication
– Overload and short to ground (power
limitation) indication
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
– Over-temperature shutdown with
autorestart (thermal shutdown)
– Reverse battery protected (see Figure 32)
March 2009
PowerSSO-24
– Electrostatic discharge protection
Application
■
All types of resistive, inductive and capacitive
loads
■
Suitable as LED driver
Description
The VNQ5E160AK-E is a double channel highside driver manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
PowerSSO-24 package. The VNQ5E160AK-E is
designed to drive 12V automotive grounded loads
delivering protection, diagnostics and easy 3V
and 5V CMOS compatible interface with any
microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, over-temperature shut-off with
auto-restart and over-voltage active clamp. A
dedicated analog current sense pin is associated
with every output channel in order to provide
Ehnanced diagnostic functions including fast
detection of overload and short-circuit to ground
through power limitation indication, overtemperature indication, short-circuit to Vcc
diagnosis and on & off state open load detection.
The current sensing and diagnostic feedback of
the whole device can be disabled by pulling the
CS_DIS pin high to allow sharing of the external
sense resistor with other similar devices.
Rev 2
1/37
www.st.com
1
Contents
VNQ5E160AK-E
Contents
1
Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1
Solution 1 : resistor in the ground line (RGND only) . . . . . . . . . . . . . . . 24
3.1.2
Solution 2 : diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 25
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4.1
3.5
4
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1
5
Short to VCC and off state open load detection . . . . . . . . . . . . . . . . . . 27
PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1
ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2
PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/37
VNQ5E160AK-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8V<VCC<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Openload detection (8V<VCC<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
3/37
List of figures
VNQ5E160AK-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
4/37
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Openload off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Iout/ Isense vs. Iout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Off-state open load with external circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
On state resistance vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
On state resistance vs. VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
ILIMH vs. Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28
PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 29
PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 30
Thermal fitting model of a double channel hsd in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 30
PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
VNQ5E160AK-E
Block diagram and pin configuration
Figure 1.
Block diagram
VCC
Signal Clamp
Undervoltage
IN1
Control & Diagnostic 1
Power
Clamp
DRIVER
IN2
VON
Limitation
CH 1
IN3
Over
temp.
IN4
Current
Limitation
OFF State
Open load
CS_
DIS
VSENSEH
CS1
CONTROL & DIAGNOSTIC
Channels 2, 3 & 4
1
Block diagram and pin configuration
Current
Sense
CH 4
CH 3
OUT4
OUT3
CH 2
CS2
OUT2
OUT1
CS3
LOGIC
CS4
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
GND
Table 1.
Pin functions
Name
VCC
OUTPUTn
GND
INPUTn
CURRENT
SENSEn
CS_DIS
Function
Battery connection
Power output
Ground connection. Must be reverse battery protected by an external
diode/resistor network
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state
Analog current sense pin, delivers a current proportional to the load current
Active high CMOS compatible pin, to disable the current sense pin
5/37
Block diagram and pin configuration
Figure 2.
VNQ5E160AK-E
Configuration diagram (top view)
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT3
OUTPUT3
OUTPUT3
OUTPUT4
OUTPUT4
OUTPUT4
VCC
GND
INPUT1
CURRENT SENSE1
INPUT2
CURRENT SENSE2
INPUT3
CURRENT SENSE3
INPUT4
CURRENT SENSE4
CS_DIS.
VCC
TAB = VCC
Table 2.
6/37
Suggested connections for unused and not connected pins
Connection / pin
Current Sense
N.C.
Output
Input
CS_DIS
Floating
Not allowed
X
X
X
X
To ground
Through 1 kΩ
resistor
X
Not allowed
Through 10
kΩ resistor
Through 10 kΩ
resistor
VNQ5E160AK-E
2
Electrical specifications
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VCC
OUTPUTn
CS_DIS
VOUTn
ISENSEn
IINn
VINn
VCC
IOUTn
ICSD
VCSD
VFn
CURRENT
SENSEn
INPUTn
VSENSEn
GND
IGND
Note:
VFn = VOUTn - VCC during reverse battery condition.
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program
and other relevant quality document.
Table 3.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
41
V
-VCC
Reverse DC supply voltage
0.3
V
-IGND
DC reverse ground pin current
200
mA
IOUT
DC output current
Internally limited
A
-IOUT
Reverse DC output current
6
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
200
mA
VCC-41
+VCC
V
V
34
mJ
IIN
ICSD
-ICSENSE DC reverse CS pin current
VCSENSE Current sense maximum voltage
EMAX
Maximum switching energy (single pulse)
(L= 12 mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IOUT = IlimL(Typ.) )
7/37
Electrical specifications
Table 3.
VNQ5E160AK-E
Absolute maximum ratings (continued)
Symbol
Value
Unit
VESD
Electrostatic discharge
(human body model: R= 1.5 KΩ; C= 100 pF)
- Input
- Current sense
- CS_DIS
- Output
- VCC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tj
Tstg
2.2
Thermal data
Table 4.
Symbol
8/37
Parameter
Thermal data
Parameter
Rthj-case
Thermal resistance junction-case (max)
(with one channel ON)
Rthj-amb
Thermal resistance junction-ambient (max)
Max. value
Unit
8
°C/W
See Figure 36. in the
thermal section
°C/W
VNQ5E160AK-E
2.3
Electrical specifications
Electrical characteristics
Values specified in this section are for 8V<VCC<28V, -40°C< Tj <150°C, unless otherwise
stated.
Table 5.
Power section
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
4.5
13
28
V
4.5
V
VCC
Operating supply voltage
VUSD
Undervoltage shutdown
3.5
VUSDhyst
Undervoltage shutdown
hysteresis
0.5
RON
Vclamp
IS
IL(off1)
VF
On state resistance
(2)
Clamp voltage
Off state output
IOUT= 1A; Tj= 25°C
160
IOUT= 1A; Tj= 150°C
320
IOUT= 1A; VCC= 5V; Tj= 25°C
210
IS= 20 mA
Supply current
current (2)
Output - VCC diode
voltage(2)
V
41
mΩ
46
52
V
Off State; VCC= 13 V; Tj= 25°C;
VIN=VOUT=VSENSE=VCSD= 0 V
2 (1)
5(1)
µA
On State; VCC= 13V; VIN= 5 V;
IOUT= 0A
8
14
mA
0.01
3
VIN=VOUT= 0 V; VCC= 13 V;
Tj= 25°C
0
VIN=VOUT= 0 V; VCC= 13 V;
Tj= 125 °C
0
µA
5
-IOUT=1A; Tj=150°C
0.7
V
Max.
Unit
1. PowerMOS leakage included.
2. For each channel.
Table 6.
Symbol
Switching (VCC = 13V; Tj = 25°C)
Parameter
Test conditions
Min.
Typ.
td(on)
Turn-on delay time
RL= 13 Ω (see Figure 6.)
20
µs
td(off)
Turn-off delay time
RL= 13 Ω (see Figure 6.)
10
µs
(dVOUT/dt)on Turn-on voltage slope RL= 13 Ω
See
Figure 26.
V/µs
(dVOUT/dt)off Turn-off voltage slope RL= 13 Ω
See
Figure 28.
V/µs
WON
Switching energy
losses during twon
RL= 13 Ω (see Figure 6.)
0.05
mJ
WOFF
Switching energy
losses during twoff
RL= 13 Ω (see Figure 6.)
0.03
mJ
9/37
Electrical specifications
Table 7.
Symbol
VNQ5E160AK-E
Logic Inputs
Parameter
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
Test conditions
VIN= 0.9V
IIN= 1mA
Unit
0.9
V
1
µA
2.1
V
10
ICSDL
Low level CS_DIS current
VCSDH
CS_DIS high level voltage
ICSDH
High level CS_DIS current
VCSD(hyst)
CS_DIS hysteresis voltage
7
V
-0.7
0.9
VCSD= 0.9V
µA
2.1
V
10
0.25
µA
V
5.5
7
V
ICSD= -1mA
-0.7
Protections and diagnostics (1)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
IlimH
DC short circuit current
VCC= 13V
5V<VCC<28V
7
10
14
14
A
A
IlimL
Short circuit current
during thermal cycling
VCC= 13V; TR<Tj<TTSD
TTSD
Shutdown temperature
TR
Reset temperature
TRS
Thermal reset of
STATUS
THYST
VDEMAG
VON
150
Output voltage drop
limitation
175
A
200
TRS + 1 TRS + 5
°C
7
IOUT= 1A; VIN= 0; L= 20mH
IOUT= 0.03A;
Tj= -40°C...150°C
(see Figure 8.)
°C
°C
135
Thermal hysteresis
(TTSD-TR)
Turn-off output voltage
clamp
2.5
VCC-41 VCC-46
°C
VCC-52
25
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/37
V
1
VCSD= 2.1V
ICSD= 1mA
µA
V
5.5
IIN= -1mA
CS_DIS low level voltage
Table 8.
Max.
0.25
Input clamp voltage
CS_DIS clamp voltage
Typ.
VIN= 2.1V
VCSDL
VCSCL
Min.
V
mV
VNQ5E160AK-E
Electrical specifications
Table 9.
Symbol
K0
K1
dK1/K1(1)
K2
dK2/K2(1)
K3
dK3/K3(1)
ISENSE0
Current sense (8V<VCC<18V)
Parameter
IOUT/ISENSE
IOUT/ISENSE
Test conditions
Min.
Typ.
Max.
IOUT= 0.025 A;
VSENSE= 0.5 V; VCSD= 0 V;
Tj= -40°C...150°C
330
600
870
IOUT= 0.35A;
VSENSE= 0.5 V; VCSD= 0 V;
Tj= -40°C...150°C
Tj= 25°C...150°C
345
395
475
475
600
555
IOUT= 0.35 A;
Current sense ratio drift VSENSE= 0.5 V; VCSD= 0 V;
Tj= -40°C...150°C
IOUT/ISENSE
IOUT= 0.5A;
VSENSE=4V; VCSD= 0 V;
Tj=-40°C...150°C
Tj= 25°C...150°C
IOUT= 0.5 A;
Current sense ratio drift VSENSE= 4 V; VCSD= 0 V;
Tj= -40°C...150°C
IOUT/ISENSE
IOUT= 1.5 A;
VSENSE= 4 V; VCSD= 0 V;
Tj= -40°C...150°C
Tj= 25°C...150°C
IOUT= 1.5 A;
Current sense ratio drift VSENSE= 4 V; VCSD= 0 V;
Tj= -40°C...150°C
Analog sense leakage
current
- 12
375
415
12
470
470
-8
425
435
6
IOUT= 0 A; VSENSE= 0 V;
VCSD= 5 V; VIN= 0 V;
Tj= -40°C...150°C
0
1
IOUT= 0 A; VSENSE= 0 V;
VCSD= 0 V; VIN= 5 V;
Tj= -40°C...150°C
0
2
IOUT= 1A; VSENSE= 0V;
VCSD= 5V; VIN= 5V;
Tj= -40°C...150°C
0
1
5
Openload on state
current detection
threshold
VIN = 5V,
ISENSE= 5 µA
1
VSENSE
Max analog sense
output voltage
IOUT= 1.5 A; VCSD= 0 V
5
VSENSEH
Analog sense output
voltage in fault
condition(2)
VCC= 13 V; RSENSE= 3.9 KΩ;
%
505
495
-6
IOL
%
565
525
8
465
465
Unit
%
µA
mA
V
8
V
11/37
Electrical specifications
Table 9.
Symbol
VNQ5E160AK-E
Current sense (8V<VCC<18V) (continued)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
ISENSEH(2)
Analog sense output
current in fault
condition(2)
VCC= 13V; VSENSE= 5 V;
9
tDSENSE1H
Delay response time
from falling edge of
CS_DIS pin
VSENSE<4V, 0.025A<Iout<1.5A
ISENSE=90% of ISENSEMAX
(see Figure 4)
40
100
µs
tDSENSE1L
Delay response time
from rising edge of
CS_DIS pin
VSENSE<4V, 0.025A<Iout<1.5A
ISENSE=10% of ISENSEMAX
(see Figure 4)
5
20
µs
tDSENSE2H
Delay response time
from rising edge of
INPUT pin
VSENSE<4V, 0.025A<Iout<1.5A
ISENSE=90% of ISENSEMAX
(see Figure 4.)
120
300
µs
110
µs
250
µs
Max.
Unit
2
4
V
180
1200
µs
Delay response time
between rising edge of
ΔtDSENSE2H
output current and rising
edge of current sense
tDSENSE2L
Delay response time
from falling edge of
INPUT pin
VSENSE < 4V,
ISENSE = 90% of ISENSEMAX,
IOUT = 90% of IOUTMAX
IOUTMAX=1.5A (see Figure 7)
VSENSE<4V, 0.025A<Iout<1.5A
ISENSE=10% of ISENSEMAX
(see Figure 4.)
80
mA
1. Parameter guaranteed by design; it is not tested
2. Fault condition includes: power limitation, overtemperature and open load off state detection.
Table 10.
Symbol
VOL
12/37
Openload detection (8V<VCC<18V)
Parameter
Test conditions
Openload off state
voltage detection
threshold
Min.
Typ.
tDSTKON
Output short circuit to
VCC detection delay at
turn off
IL(off2)r
Off state output current
at VOUT = 4V
VIN= 0 V; VSENSE= 0 V
VOUT rising from 0 V to 4 V
-120
0
µA
IL(off2)f
Off state output current
at VOUT = 2V
VIN= 0 V; VSENSE= VSENSEH
VOUT falling from VCC to 2V
-50
90
µA
td_vol
Delay response from
output rising edge to
VSENSE rising edge in
openload
VOUT= 4 V; VIN= 0 V
VSENSE= 90% of VSENSEH
20
µs
See Figure 5.
VNQ5E160AK-E
Figure 4.
Electrical specifications
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
tDSENSE2H
Figure 5.
tDSENSE1L
tDSENSE1H
tDSENSE2L
Openload off-state delay timing
OUTPUT STUCK TO VCC
VIN
VOUT > VOL
VSENSEH
VCS
tDSTKON
Figure 6.
Switching characteristics
VOUT
tWon
tWoff
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
tr
10%
tf
t
INPUT
td(on)
td(off)
t
13/37
Electrical specifications
Figure 7.
VNQ5E160AK-E
Delay response time between rising edge of ouput current and rising
edge of current sense (CS enabled)
VIN
ΔtDSENSE2H
t
IOUT
IOUTMAX
90% IOUTMAX
t
ISENSE
ISENSEMAX
90% ISENSEMAX
t
Figure 8.
Output voltage drop limitation
Vcc-Vout
Tj=150oC
Tj=25oC
Tj=-40oC
Von
Von/Ron(T)
14/37
Iout
VNQ5E160AK-E
Electrical specifications
Figure 9.
Iout/ Isense vs. Iout
Iout / Isense
700
650
600
max Tj = -40 °C to 150 °C
550
500
max Tj = 25 °C to 150 °C
typical value
450
min Tj = 25 °C to 150 °C
400
350
min Tj = -40 °C to 150 °C
300
250
200
0,35
0,58
0,81
1,04
1,27
1,5
IOUT (A)
Figure 10. Maximum current sense ratio drift vs load current
dk/k(%)
15
10
5
0
-5
-10
-15
0,35
0,58
0,81
1,04
1,27
1,5
IOUT (A)
Note:
Parameter guaranteed by design; it is not tested.
15/37
Electrical specifications
Table 11.
VNQ5E160AK-E
Truth table
Input
Output
Sense (VCSD=0V)(1)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
Conditions
Overload
H
VSENSEH
Short circuit to GND
(power limitation)
L
H
L
L
0
VSENSEH
Open load off state
(with external pull up)
L
H
VSENSEH
Short circuit to VCC
(external pull up
disconnected)
L
H
H
H
VSENSEH
< Nominal
Negative output voltage
clamp
L
L
0
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
16/37
VNQ5E160AK-E
Electrical specifications
Table 12.
ISO 7637-2:
2004(E)
Test pulse
Electrical transient requirements (part 1)
Test levels(1)
III
IV
1
-75V
-100V
2a
+37V
3a
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
Impedance
Min.
Max.
5000 pulses
0.5s
5s
2 ms, 10Ω
+50V
5000 pulses
0.2s
5s
50µs, 2Ω
-100V
-150V
1h
90ms
100ms
0.1µs, 50Ω
3b
+75V
+100V
1h
90ms
100ms
0.1µs, 50Ω
4
-6V
-7V
1 pulse
100ms, 0.01Ω
+65V
+87V
1 pulse
400ms, 2Ω
5b
(2)
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 13.
Electrical transient requirements (part 2)
ISO 7637-2:
2004E
Test pulse
III
VI
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
C
C
(1)
5b
Test level results
1. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 14.
Class
Electrical transient requirements (part 3)
Contents
C
All functions of the device performed as designed after exposure to disturbance.
E
One or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
17/37
Electrical specifications
2.4
VNQ5E160AK-E
Waveforms
Figure 11.
Normal operation
Normal operation
INPUT
Nominal load
Nominal load
IOUT
VSENSE
VCS_DIS
Figure 12. Overload or short to GND
Overload or Short to GND
INPUT
ILimH >
Power Limitation
Thermal cycling
ILimL >
IOUT
VSENSE
VCS_DIS
18/37
VNQ5E160AK-E
Electrical specifications
Figure 13. Intermittent overload
Intermittent Overload
INPUT
Overload
ILimH >
ILimL >
Nominal load
IOUT
VSENSEH>
VSENSE
VCS_DIS
Figure 14. Off-state open load with external circuitry
OFF-State Open Load
with external circuitry
INPUT
VOUT > VOL
VOUT
VOL
IOUT
VSENSEH >
tDSTK(on)
VSENSE
VCS_DIS
19/37
Electrical specifications
VNQ5E160AK-E
Figure 15. Short to VCC
Short to VCC
Resistive
Short to VCC
Hard
Short to VCC
VOUT > VOL
VOL
VOUT
IOUT
tDSTK(on)
tDSTK(on)
VCS_DIS
Figure 16. TJ evolution in overload or short to GND
TJ evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients
TTSD
THYST
TR
TJ_START
TJ
ILimH >
Power Limitation
< ILimL
IOUT
20/37
VNQ5E160AK-E
2.5
Electrical specifications
Electrical characteristics curves
Figure 17. Off state output current
Figure 18. High level input current
Iloff (mA)
Iih (µA)
200
5
4,5
Vin= 2.1 V
Off State
Vcc=13V
Vin=Vout=0V
150
4
3,5
3
100
2,5
2
1,5
50
1
0,5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
150
175
150
175
150
175
Tc (°C)
Figure 19. Input clamp voltage
Figure 20. Input low level voltage
Vicl (V)
Vil (V)
7
2
6,8
1,8
lin= 1 mA
6,6
1,6
6,4
1,4
6,2
1,2
6
1
5,8
0,8
5,6
0,6
5,4
0,4
5,2
0,2
5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
Tc (°C)
Figure 21. Input high level voltage
Figure 22. Input hysteresis voltage
Vih (V)
Vihyst (V)
1
4
0,9
3,5
0,8
3
0,7
2,5
0,6
0,5
2
0,4
1,5
0,3
1
0,2
0,5
0,1
0
0
-50
-25
0
25
50
75
Tc (°C)
100
125
150
175
-50
-25
0
25
50
75
100
125
Tc (°C)
21/37
Electrical specifications
VNQ5E160AK-E
Figure 23. On state resistance vs. Tcase
Figure 24. On state resistance vs. VCC
Ron (Ohm)
Ron (Ohm)
300
300
Tc=150°C
Iout= 1A
Vcc= 13V
250
250
Tc=125°C
200
200
150
Tc=25°C
150
100
100
Tc=-40°C
50
-50
-25
0
25
50
75
100
125
150
175
0
5
10
15
Tc (°C)
20
25
30
35
Vcc (V)
Figure 25. Undervoltage shutdown
Figure 26. Turn-on voltage slope
Vusd (V)
(dVout/dt )On (V/ms)
8
1000
900
Vcc= 13 V
RI= 13 Ohm
800
6
700
600
500
4
400
300
2
200
100
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
150
175
150
175
Tc (°C)
Figure 27. ILIMH vs. Tcase
Figure 28. Turn-off voltage slope
Ilimh (A)
(dVout/dt )Off (V/ms)
14
1200
1100
Vcc= 13 V
12
Vcc= 13 V
RI= 13 Ohm
1000
900
10
800
700
8
600
6
500
-50
-25
0
25
50
Tc (°C)
22/37
75
100
125
150
-50
-25
0
25
50
75
Tc (°C)
100
125
VNQ5E160AK-E
Electrical specifications
Figure 29. CS_DIS high level voltage
Figure 30. CS_DIS clamp voltage
Vcsdh (V)
Vcsdcl(V)
4
10
3,5
9
Iin = 1 mA
3
8
2,5
7
2
6
1,5
5
1
4
0,5
0
3
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Figure 31. CS_DIS low level voltage
Vcsdl (V)
3
2,5
2
1,5
1
0,5
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
23/37
Application information
3
VNQ5E160AK-E
Application information
Figure 32. Application schematic
+5V
VCC
Rprot
CS_DIS
Dld
ΜCU
Rprot
INPUT
OUTPUT
Rprot
CURRENT SENSE
GND
RSENSE
VGND
CEXT
RGND
DGND
Note:
Channel 2, 3, 4 have the same internal circuit as channel 1.
3.1
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1
Solution 1 : resistor in the ground line (RGND only)
This can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1.
RGND ≤ 600mV / (IS(on)max)
2.
RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC<0: during reverse battery situations) is:
Equation 1
PD= (-VCC)2/RGND
24/37
VNQ5E160AK-E
Application information
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are on in the case of several
high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Section 3.1.2: Solution 2 : diode (DGND) in
the ground line.
3.1.2
Solution 2 : diode (DGND) in the ground line
A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈600mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
3.2
Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3
MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:
Equation 2
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHμC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak = - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 180kΩ
Recommended values: Rprot =10kΩ, CEXT=10nF.
25/37
Application information
3.4
VNQ5E160AK-E
Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
●
Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a know ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V
minimum (see parameter VSENSE in Table 9: Current sense (8V<VCC<18V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8V<VCC<18V)).
●
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to Truth table):
–
Power limitation activation
–
Over-temperature
–
Short to VCC in off state
–
Open load in off state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
Figure 33. Current sense and diagnostic
VPU
VBAT
VCC
Main MOSn
41V
PU_CMD
Overtemperature
IOUT/KX
RPU
+
OL OFF
ISENSEH
VOL
Pwr_Lim
CS_DIS
OUTn
ILoff2r
ILoff2f
INPUTn
VSENSEH
CURRENT
SENSEn
RPROT
To uC ADC
26/37
RSENSE
GND
Load
RPD
VSENSE
VNQ5E160AK-E
3.4.1
Application information
Short to VCC and off state open load detection
Short to VCC
A short circuit between VCC and output is indicated by the relevant current sense pin set to
VSENSEH during the device off state. Small or no current is delivered by the current sense
during the on state depending on the nature of the short circuit.
Off state open load with external circuitry
Detection of an open load in off mode requires an external pull-up resistor RPU connecting
the output to a positive supply voltage VPU.
It is preferable VPU to be switched off during the module stand-by mode in order to avoid the
overall stand-by current consumption to increase in normal conditions, i.e. when load is
connected.
An external pull down resistor RPD connected between output and GND is mandatory to
avoid misdetection in case of floating outputs in off state (see Figure 33: Current sense and
diagnostic).
RPD must be selected in order to ensure VOUT < VOLmin unless pulled up by the external
circuitry:
Equation 3
VOUT
Pull − up _ OFF
= RPD ⋅ I L ( off 2) f < VOL min = 2V
RPD ≤ 22 KΩ is recommended.
For proper open load detection in off state, the external pull-up resistor must be selected
according to the following formula:
Equation 4
VOUT
Pull − up _ ON
=
RPD ⋅ VPU − RPU ⋅ RPD ⋅ I L ( off 2) r
RPU + RPD
> VOL max = 4V
For the values of VOLmin ,VOLmax, IL(off2)r and IL(off2)f see Table 10: Openload detection
(8V<VCC<18V).
27/37
Application information
3.5
VNQ5E160AK-E
Maximum demagnetization energy (VCC = 13.5V)
Figure 34. Maximum turn-off current versus inductance (for each channel)
100
10
A
C
B
I (A)
1
0,1
0,1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0 Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
28/37
VNQ5E160AK-E
Package and PC board thermal data
4
Package and PC board thermal data
4.1
PowerSSO-24 thermal data
Figure 35. PowerSSO-24 PC board
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4
area= 77 mm x 86 mm, PCB thickness=1.6 mm, Cu thickness=70 mm (front and back side),
Copper areas: from minimum pad lay-out to 8 cm2).
Figure 36. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON)
RTHj_amb(°C/W)
60
55
50
45
40
35
30
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
29/37
Package and PC board thermal data
VNQ5E160AK-E
Figure 37. PowerSSO-24 thermal impedance junction ambient single pulse (one
channel ON)
ZTH (°C/W)
1000
100
Footprint
2 cm2
8 cm2
10
1
0.1
0.0001
0.001
0.01
0.1
1
Time (s)
10
100
1000
Figure 38. Thermal fitting model of a double channel hsd in PowerSSO-24 (a)
30/37
VNQ5E160AK-E
Package and PC board thermal data
Equation 5: pulse calculation formula:
Z
THδ
= R
TH
⋅δ+Z
THtp
(1 – δ)
where δ = tP/T
Table 15.
Thermal parameters
Area/island (cm2)
Footprint
R1 = R7 = R9 = R11 (°C/W)
1.2
R2 = R8 = R10 = R12 (°C/W)
6
R3 (°C/W)
6
R4 (°C/W)
7.7
R5 (°C/W)
2
8
9
9
8
R6 (°C/W)
28
17
10
C1 = C7 = C9 = C11 (W.s/°C)
0.0008
C2 = C8 = C10 = C12 (W.s/°C)
0.0016
C3 (W.s/°C)
0.025
C4 (W.s/°C)
0.75
C5 (W.s/°C)
1
4
9
C6 (W.s/°C)
2.2
5
17
a. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
31/37
Package and packing information
5
Package and packing information
5.1
ECOPACK®
VNQ5E160AK-E
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
PowerSSO-24 mechanical data
Figure 39. PowerSSO-24 package dimensions
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VNQ5E160AK-E
Package and packing information
PowerSSO-24 mechanical data(1) (2)
Table 16.
Millimeters
Symbol
Min.
Typ.
A
Max.
2.45
A2
2.15
2.35
a1
0
0.1
b
0.33
0.51
c
0.23
0.32
D(3)
10.10
10.50
E(3)
7.40
7.60
e
0.8
e3
8.8
F
2.3
G
H
0.1
10.1
10.5
h
0.4
k
0°
8°
L
0.6
1
O
1.2
Q
0.8
S
2.9
T
3.65
U
1.0
N
10°
X
4.1
4.7
Y
6.5
7.1
1. No intrusion allowed inwards the leads.
2. Flash or bleeds on exposed die pad shall not exceed 0.5 mm per side
3. “D and E” do not include mold flash or protusions.
Mold flash or protusions shall not exceed 0.15 mm per side
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Package and packing information
5.3
VNQ5E160AK-E
Packing information
Figure 40. PowerSSO-24 tube shipment (no suffix)
C
Base q.ty
Bulk q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
B
49
1225
532
3.5
13.8
0.6
All dimensions are in mm.
A
Figure 41. PowerSSO-24 tape and reel shipment (suffix “TR”)
Reel dimensions
Base q.ty
Bulk q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
24.4
100
30.4
Tape dimensions
According to Electronic Industries Association
(EIA) standard 481 rev. A, Feb 1986
Tape width
Tape hole spacing
Component spacing
Hole diameter
Hole diameter
Hole position
Compartment depth
Hole spacing
W
P0 (± 0.1)
P
D (± 0.05)
D1 (min)
F (± 0.1)
K (max)
P1 (± 0.1)
24
4
12
1.55
1.5
11.5
2.85
2
End
All dimensions are in mm.
Start
Top
cover
tape
No components Components
500mm min
No components
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
34/37
VNQ5E160AK-E
6
Order codes
Order codes
Table 17.
Device summary
Order codes
Package
PowerSSO-24
Tube
Tape and reel
VNQ5E160AK-E
VNQ5E160AKTR-E
35/37
Revision history
7
VNQ5E160AK-E
Revision history
Table 18.
Document revision history
Date
Revision
05-Jun-2007
1
Initial release.
2
Document restructured.
Updated Table 9: Current sense (8V<VCC<18V):
– added k0, k1, k2, k3, dk1/k1, dk2/k2, dk3/k3, ΔtDSENSE2H
parameters values
Updated Table 10: Openload detection (8V<VCC<18V):
– added IL(off2)r, IL(off2)f and td_vol parameters
Added Figure 9.: Iout/ Isense vs. Iout.
Added Figure 10.: Maximum current sense ratio drift vs load current
Added Section 2.4: Waveforms.
Added Section 2.5: Electrical characteristics curves.
Updated Chapter 3: Application information:
– added Section 3.4: Current sense and diagnostic
Added Chapter 4: Package and PC board thermal data:
Updated Table 16: PowerSSO-24 mechanical data
17-Mar-2009
36/37
Changes
VNQ5E160AK-E
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