TC7106/A/TC7107/A 3-1/2 Digit Analog-to-Digital Converters Features General Description • Internal Reference with Low Temperature Drift - TC7106/7: 80ppm/°C Typical - TC7106A/7A: 20ppm/°C Typical • Drives LCD (TC7106) or LED (TC7107) Display Directly • Zero Reading with Zero Input • Low Noise for Stable Display • Auto-Zero Cycle Eliminates Need for Zero Adjustment • True Polarity Indication for Precision Null Applications • Convenient 9V Battery Operation (TC7106A) • High Impedance CMOS Differential Inputs: 1012Ω • Differential Reference Inputs Simplify Ratiometric Measurements • Low Power Operation: 10mW The TC7106A and TC7107A 3-1/2 digit direct display drive analog-to-digital converters allow existing 7106/ 7107 based systems to be upgraded. Each device has a precision reference with a 20ppm/°C max temperature coefficient. This represents a 4 to 7 times improvement over similar 3-1/2 digit converters. Existing 7106 and 7107 based systems may be upgraded without changing external passive component values. The TC7107A drives common anode light emitting diode (LED) displays directly with 8mA per segment. A low cost, high resolution indicating meter requires only a display, four resistors, and four capacitors.The TC7106A low power drain and 9V battery operation make it suitable for portable applications. Applications • Thermometry • Bridge Readouts: Strain Gauges, Load Cells, Null Detectors • Digital Meters: Voltage/Current/Ohms/Power, pH • Digital Scales, Process Monitors • Portable Instrumentation The TC7106A/TC7107A reduces linearity error to less than 1 count. Rollover error – the difference in readings for equal magnitude, but opposite polarity input signals, is below ±1 count. High impedance differential inputs offer 1pA leakage current and a 1012Ω input impedance. The differential reference input allows ratiometric measurements for ohms or bridge transducer measurements. The 15µVP–P noise performance ensures a “rock solid” reading. The auto-zero cycle ensures a zero display reading with a zero volts input. Device Selection Table Package Code Package Pin Layout Temperature Range CPI 40-Pin PDIP Normal 0°C to +70°C IPL 40-Pin PDIP Normal -25°C to +85°C IJL 40-Pin CERDIP Normal -25°C to +85°C CKW 44-Pin PQFP Formed Leads 0°C to +70°C CLW 44-Pin PLCC — 0°C to +70°C 2002 Microchip Technology Inc. DS21455B-page 1 TC7106/A/TC7107/A Package Type 40-Pin PDIP 1's 10's 100's 1000's 40-Pin CERDIP 40 OSC1 OSC1 1 39 OSC2 OSC2 2 3 38 OSC3 OSC3 3 38 C1 4 37 TEST TEST 4 37 B1 A1 5 36 VREF+ VREF+ 5 36 A1 F1 6 35 VREF- VREF- 6 35 G1 7 34 CREF+ CREF+ 7 E1 8 33 CREF- CREF- D2 9 V+ 1 D1 2 C1 B1 Normal Pin Configuration TC7106ACPL TC7107AIPL 8 ANALOG 9 COMMON VIN+ 10 Reverse Configuration 40 V+ 39 D1 34 G1 TC7106AIJL TC7107AIJL 33 E1 C2 10 32 ANALOG COMMON 31 VIN+ B2 11 30 VIN- VIN- 11 30 B2 A2 29 CAZ CAZ 12 29 A2 12 F2 13 28 VBUFF E2 27 VINT 14 VBUFF 13 32 D2 31 C2 28 27 E2 26 V- V- 15 26 D3 B3 16 25 G2 G2 16 25 B3 F3 17 24 C3 C3 17 24 E3 18 23 A3 A3 18 23 E3 AB4 19 22 G3 G3 19 21 BP/GND (7106A/7107A) POL 20 (Minus Sign) 100's 10's F2 VINT 14 D3 15 100's 1's F1 100's F3 22 AB4 1000's 21 POL (Minus Sign) BP/GND 20 (7106A/7107A) B1 C1 D1 V+ NC OSC1 OSC2 OSC3 TEST REF HI REF HI REF LO CREF CREF COM IN HI IN LO A/Z BUFF INT V- 44-Pin PQFP A1 44-Pin PLCC 6 5 4 3 2 1 44 43 42 41 40 44 43 42 41 40 39 38 37 36 35 34 F1 7 39 REF LO NC 1 33 NC G1 8 38 CREF NC 2 32 G2 E1 9 37 CREF TEST 3 31 C3 D2 10 36 COMMON OSC3 4 30 A3 C2 11 35 IN HI NC 5 29 G3 NC 12 34 NC OSC2 6 28 BP/GND B2 13 33 IN LO OSC1 7 27 POL A2 14 32 A/Z V+ 8 26 AB4 F2 15 31 BUFF D1 9 25 E3 E2 16 30 INT C1 10 24 F3 D3 17 29 V- B1 11 23 B3 18 19 20 21 22 23 24 25 26 27 28 12 13 14 15 16 17 18 19 20 21 22 F3 E3 AB4 POL NC BP/GND G3 A3 C3 G2 A1 F1 G1 E1 D2 C2 B2 A2 F2 E2 D3 TC7106ACKW TC7107ACKW B3 TC7106ACLW TC7107ACLW DS21455B-page 2 2002 Microchip Technology Inc. TC7106/A/TC7107/A Typical Application 0.1µF 1MΩ + Analog Input – 31 34 33 CREF+ CREF- VIN+ 2 - 19 22 - 25 30 VIN- POL 32 ANALOG COMMON 0.01µF 28 47kΩ 27 BP V+ Segment Drive 20 21 Minus Sign Backplane Drive 1 TC7106/A TC7107/A 24kΩ + VBUFF VREF VREF+ 36 0.47µF 29 0.22µF LCD Display (TC7106/A) or Common Node w/ LED Display (TC7107/A) CAZ 1kΩ 9V VREF- 35 100mV VINT VOSC2 OSC3 OSC1 39 38 COSC 40 ROSC 100pF 26 To Analog Common (Pin 32) 3 Conversions/Sec 200mV Full Scale 100kΩ 2002 Microchip Technology Inc. DS21455B-page 3 TC7106/A/TC7107/A 1.0 ELECTRICAL CHARACTERISTICS *Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings* TC7106A Supply Voltage (V+ to V-) ....................................... 15V Analog Input Voltage (either Input) (Note 1) ... V+ to VReference Input Voltage (either Input) ............ V+ to VClock Input ................................................... Test to V+ Package Power Dissipation (TA ≤ 70°C) (Note 2): 40-Pin CERDIP .......................................2.29W 40-Pin PDIP ............................................1.23W 44-Pin PLCC ...........................................1.23W 44-Pin PQFP ...........................................1.00W Operating Temperature Range: C (Commercial) Devices .............. 0°C to +70°C I (Industrial) Devices ................ -25°C to +85°C Storage Temperature Range .............. -65°C to +150°C TC7107A Supply Voltage (V+) ...............................................+6V Supply Voltage (V-)..................................................-9V Analog Input Voltage (either Input) (Note 1) ... V+ to VReference Input Voltage (either Input) ............ V+ to VClock Input ..................................................GND to V+ Package Power Dissipation (TA ≤ 70°C) (Note 2): 40-Pin CERDip ........................................2.29W 40-Pin PDIP ............................................1.23W 44-Pin PLCC ...........................................1.23W 44-Pin PQFP ...........................................1.00W Operating Temperature Range: C (Commercial) Devices .............. 0°C to +70°C I (Industrial) Devices ................ -25°C to +85°C Storage Temperature Range .............. -65°C to +150°C TC7106/A AND TC7107/A ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise noted, specifications apply to both the TC7106/A and TC7107/A at TA = 25°C, fCLOCK = 48kHz. Parts are tested in the circuit of the Typical Operating Circuit. Symbol ZIR R/O Note 1: 2: 3: 4: Parameter Min Typ Max Unit Test Conditions Zero Input Reading -000.0 ±000.0 +000.0 Ratiometric Reading 999 999/1000 1000 Rollover Error (Difference in Reading for Equal Positive and Negative Reading Near Full Scale) -1 ±0.2 +1 Counts VIN- = + VIN+ ≅ 200mV Linearity (Max. Deviation from Best Straight Line Fit) -1 ±0.2 +1 Counts Full Scale = 200mV or Full Scale = 2.000V Digital VIN = 0.0V Reading Full Scale = 200.0mV Digital VIN = VREF Reading VREF = 100mV Input voltages may exceed the supply voltages, provided the input current is limited to ±100µA. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board. Refer to “Differential Input” discussion. Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV. DS21455B-page 4 2002 Microchip Technology Inc. TC7106/A/TC7107/A TC7106/A AND TC7107/A ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: Unless otherwise noted, specifications apply to both the TC7106/A and TC7107/A at TA = 25°C, fCLOCK = 48kHz. Parts are tested in the circuit of the Typical Operating Circuit. Symbol Parameter Min Typ Max Unit Test Conditions CMRR Common Mode Rejection Ratio (Note 3) — 50 — µV/V VCM = ±1V, VIN = 0V, Full Scale = 200.0mV eN Noise (Peak to Peak Value not Exceeded 95% of Time) — 15 — µV VIN = 0V Full Scale - 200.0mV IL Leakage Current at Input — 1 10 pA VIN = 0V Zero Reading Drift — 0.2 1 µV/°C VIN = 0V “C” Device = 0°C to +70°C — 1.0 2 µV/°C VIN = 0V “I” Device = -25°C to +85°C — 1 5 ppm/°C VIN = 199.0mV, “C” Device = 0°C to +70°C (Ext. Ref = 0ppm°C) — — 20 ppm/°C VIN = 199.0mV “I” Device = -25°C to +85°C TCSF Scale Factor Temperature Coefficient IDD Supply Current (Does not include LED Current For TC7107/A) — 0.8 1.8 mA VIN = 0.8 VC Analog Common Voltage (with Respect to Positive Supply) 2.7 3.05 3.35 V 25kΩ Between Common and Positive Supply VCTC Temperature Coefficient of Analog Common (with Respect to Positive Supply) — — — — 25kΩ Between Common and Positive Supply 7106/7/A 7106/7 20 80 50 — ppm/°C ppm/°C 0°C ≤ TA ≤ +70°C (“C” Commercial Temperature Range Devices) 0°C ≤ TA ≤ +70°C (“I” Industrial Temperature Range Devices) VCTC Temperature Coefficient of Analog Common (with Respect to Positive Supply) — — 75 ppm/°C VSD TC7106A ONLY Peak to Peak Segment Drive Voltage 4 5 6 V V+ to V- = 9V (Note 4) VBD TC7106A ONLY Peak to Peak Backplane Drive Voltage 4 5 6 V V+ to V- = 9V (Note 4) TC7107A ONLY Segment Sinking Current (Except Pin 19) 5 8.0 — mA V+ = 5.0V Segment Voltage = 3V TC7107A ONLY Segment Sinking Current (Pin 19) 10 16 — mA V+ = 5.0V Segment Voltage = 3V Note 1: 2: 3: 4: Input voltages may exceed the supply voltages, provided the input current is limited to ±100µA. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board. Refer to “Differential Input” discussion. Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV. 2002 Microchip Technology Inc. DS21455B-page 5 TC7106/A/TC7107/A 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE Pin Number (40-Pin PDIP) Normal Pin No. (40-Pin PDIP) (Reversed Symbol 1 (40) V+ Positive supply voltage. 2 (39) D1 Activates the D section of the units display. 3 (38) C1 Activates the C section of the units display. 4 (37) B1 Activates the B section of the units display. 5 (36) A1 Activates the A section of the units display. 6 (35) F1 Activates the F section of the units display. 7 (34) G1 Activates the G section of the units display. 8 (33) E1 Activates the E section of the units display. 9 (32) D2 Activates the D section of the tens display. 10 (31) C2 Activates the C section of the tens display. Description 11 (30) B2 Activates the B section of the tens display. 12 (29) A2 Activates the A section of the tens display. 13 (28) F2 Activates the F section of the tens display. 14 (27) E2 Activates the E section of the tens display. 15 (26) D3 Activates the D section of the hundreds display. 16 (25) B3 Activates the B section of the hundreds display. 17 (24) F3 Activates the F section of the hundreds display. 18 (23) E3 Activates the E section of the hundreds display. 19 (22) AB4 Activates both halves of the 1 in the thousands display. 20 (21) POL Activates the negative polarity display. 21 (20) BP/GND 22 (19) G3 Activates the G section of the hundreds display. 23 (18) A3 Activates the A section of the hundreds display. 24 (17) C3 Activates the C section of the hundreds display. 25 (16) G2 Activates the G section of the tens display. 26 (15) V- Negative power supply voltage. 27 (14) VINT 28 (13) VBUFF Integration resistor connection. Use a 47kΩ resistor for a 200mV full scale range and a 47kΩ resistor for 2V full scale range. 29 (12) CAZ The size of the auto-zero capacitor influences system noise. Use a 0.47µF capacitor for 200mV full scale, and a 0.047µF capacitor for 2V full scale. See Section 7.1 on Auto-Zero Capacitor for more details. 30 (11) VIN - The analog LOW input is connected to this pin. 31 (10) VIN+ The analog HIGH input signal is connected to this pin. 32 (9) LCD Backplane drive output (TC7106A). Digital Ground (TC7107A). Integrator output. Connection point for integration capacitor. See INTEGRATING CAPACITOR section for more details. ANALOG This pin is primarily used to set the Analog Common mode voltage for battery operaCOMMON tion or in systems where the input signal is referenced to the power supply. It also acts as a reference voltage source. See Section 8.3 on ANALOG COMMON for more details. 33 (8) CREF- See Pin 34. 34 (7) CREF + A 0.1µF capacitor is used in most applications. If a large Common mode voltage exists (for example, the VIN- pin is not at analog common), and a 200mV scale is used, a 1µF capacitor is recommended and will hold the rollover error to 0.5 count. 35 (6) VREF- See Pin 36. DS21455B-page 6 2002 Microchip Technology Inc. TC7106/A/TC7107/A TABLE 2-1: PIN FUNCTION TABLE (CONTINUED) Pin Number (40-Pin PDIP) Normal Pin No. (40-Pin PDIP) (Reversed Symbol Description 36 (5) VREF+ The analog input required to generate a full scale output (1999 counts). Place 100mV between Pins 35 and 36 for 199.9mV full scale. Place 1V between Pins 35 and 36 for 2V full scale. See paragraph on Reference Voltage. 37 (4) TEST Lamp test. When pulled HIGH (to V+) all segments will be turned on and the display should read -1888. It may also be used as a negative supply for externally generated decimal points. See paragraph under TEST for additional information. 38 (3) OSC3 See Pin 40. 39 (2) OSC2 See Pin 40. 40 (1) OSC1 Pins 40, 39, 38 make up the oscillator section. For a 48kHz clock (3 readings per section), connect Pin 40 to the junction of a 100kΩ resistor and a 100pF capacitor. The 100kΩ resistor is tied to Pin 39 and the 100pF capacitor is tied to Pin 38. 2002 Microchip Technology Inc. DS21455B-page 7 TC7106/A/TC7107/A 3.0 DETAILED DESCRIPTION For a constant VIN: (All Pin designations refer to 40-Pin PDIP.) Dual Slope Conversion Principles The TC7106A and TC7107A are dual slope, integrating analog-to-digital converters. An understanding of the dual slope conversion technique will aid in following the detailed operation theory. The conventional dual slope converter measurement cycle has two distinct phases: • Input Signal Integration • Reference Voltage Integration (De-integration) The input signal being converted is integrated for a fixed time period (TSI). Time is measured by counting clock pulses. An opposite polarity constant reference voltage is then integrated until the integrator output voltage returns to zero. The reference integration time is directly proportional to the input signal (TRI). See Figure 3-1. FIGURE 3-1: FIGURE 3-2: + +/– Comparator – + Switch Driver Phase Control REF Voltage Clock Control Logic Polarity Control DISPLAY Integrator Output NORMAL MODE REJECTION OF DUAL SLOPE CONVERTER 30 C Integrator – TRI TSI The dual slope converter accuracy is unrelated to the integrating resistor and capacitor values as long as they are stable during a measurement cycle. An inherent benefit is noise immunity. Noise spikes are integrated or averaged to zero during the integration periods. Integrating ADCs are immune to the large conversion errors that plague successive approximation converters in high noise environments. Interfering signals with frequency components at multiples of the averaging period will be attenuated. Integrating ADCs commonly operate with the signal integration period set to a multiple of the 50/60Hz power line period (see Figure 3-2). BASIC DUAL SLOPE CONVERTER Analog Input Signal Fixed Signal Integrate Time VIN = VR Counter VIN ≈ VREF VIN ≈ 1/2 VREF Normal Mode Rejection (dB) 3.1 EQUATION 3-2: 20 10 T = Measured Period 0 0.1/T 1/T Input Frequency 10/T Variable Reference Integrate Time In a simple dual slope converter, a complete conversion requires the integrator output to “ramp-up” and “ramp-down.” A simple mathematical equation relates the input signal, reference voltage and integration time. EQUATION 3-1: 1 TSI VRTRI RC ∫ 0 VIN(t)dt = RC Where: VR = Reference voltage TSI = Signal integration time (fixed) TRI = Reference voltage integration time (variable). DS21455B-page 8 2002 Microchip Technology Inc. TC7106/A/TC7107/A 4.0 ANALOG SECTION In addition to the basic signal integrate and deintegrate cycles discussed, the circuit incorporates an auto-zero cycle. This cycle removes buffer amplifier, integrator, and comparator offset voltage error terms from the conversion. A true digital zero reading results without adjusting external potentiometers. A complete conversion consists of three cycles: an auto-zero, signal integrate and reference integrate cycle. 4.1 Auto-Zero Cycle During the auto-zero cycle, the differential input signal is disconnected from the circuit by opening internal analog gates. The internal nodes are shorted to analog common (ground) to establish a zero input condition. Additional analog gates close a feedback loop around the integrator and comparator. This loop permits comparator offset voltage error compensation. The voltage level established on CAZ compensates for device offset voltages. The offset error referred to the input is less than 10µV. The auto-zero cycle length is 1000 to 3000 counts. 4.2 Signal Integrate Cycle The auto-zero loop is entered and the internal differential inputs connect to VIN+ and VIN-. The differential input signal is integrated for a fixed time period. The TC7136/A signal integration period is 1000 clock periods or counts. The externally set clock frequency is divided by four before clocking the internal counters. The integration time period is: EQUATION 4-1: TSI = 4 x 1000 FOSC The time required for the output to return to zero is proportional to the input signal and is between 0 and 2000 counts. The digital reading displayed is: EQUATION 4-2: 1000 = 5.0 DIGITAL SECTION (TC7106A) The TC7106A (Figure 5-2) contains all the segment drivers necessary to directly drive a 3-1/2 digit liquid crystal display (LCD). An LCD backplane driver is included. The backplane frequency is the external clock frequency divided by 800. For three conversions/ second, the backplane frequency is 60Hz with a 5V nominal amplitude. When a segment driver is in phase with the backplane signal, the segment is “OFF.” An out of phase segment drive signal causes the segment to be “ON” or visible. This AC drive configuration results in negligible DC voltage across each LCD segment. This insures long LCD display life. The polarity segment driver is “ON” for negative analog inputs. If VIN+ and V IN- are reversed, this indicator will reverse. When the TEST pin on the TC7106A is pulled to V+, all segments are turned “ON.” The display reads -1888. During this mode, the LCD segments have a constant DC voltage impressed. DO NOT LEAVE THE DISPLAY IN THIS MODE FOR MORE THAN SEVERAL MINUTES! LCD displays may be destroyed if operated with DC levels for extended periods. The display font and the segment drive assignment are shown in Figure 5-1. FIGURE 5-1: Where: FOSC = external clock frequency. The differential input voltage must be within the device Common mode range when the converter and measured system share the same power supply common (ground). If the converter and measured system do not share the same power supply common, VIN- should be tied to analog common. Polarity is determined at the end of signal integrate phase. The sign bit is a true polarity indication, in that signals less than 1LSB are correctly determined. This allows precision null detection limited only by device noise and auto-zero residual offsets. 4.3 Reference Integrate Phase The third phase is reference integrate or de-integrate. VIN- is internally connected to analog common and VIN+ is connected across the previously charged reference capacitor. Circuitry within the chip ensures that the capacitor will be connected with the correct polarity to cause the integrator output to return to zero. 2002 Microchip Technology Inc. VIN VREF DISPLAY FONT AND SEGMENT ASSIGNMENT Display Font 1000's 100's 10's 1's In the TC7106A, an internal digital ground is generated from a 6-volt zener diode and a large P channel source follower. This supply is made stiff to absorb the large capacitive currents when the backplane voltage is switched. DS21455B-page 9 DS21455B-page 10 VIN- ANALOG COMMON VIN+ 30 32 31 INT A/Z DE (–) DE (+) – + + – V+ – 3.0V 33 CREF- VBUFF 26 V- A/Z 35 VREF- AZ & DE (±) DE (+) DE (–) A/Z 36 VREF+ 34 INT 10 µA CREF+ CREF TC7106A 1 Low Tempco VREF 28 V+ RINT – + Thousands To Digital Section ROSC 39 OSC2 Clock COSC 38 OSC3 ÷4 Hundreds 7 Segment Decode VTH = 1V Control Logic Tens Data Latch 7 Segment Decode LCD Segment Drivers LCD Display Internal Digital Ground FOSC To Switch Drivers From Comparator Output 27 VINT CINT Comparator 40 OSC1 A/Z + – 29 Integrator CAZ Internal Digital Ground Segment Output V+ Units 7 Segment Decode 500Ω 6.2V 26 37 1 V- TEST V+ Backplane ÷ 200 21 FIGURE 5-2: 2mA 0.5mA Typical Segment Output TC7106/A/TC7107/A TC7106A BLOCK DIAGRAM 2002 Microchip Technology Inc. TC7106/A/TC7107/A 6.0 DIGITAL SECTION (TC7107A) Figure 6-2 shows a TC7107A block diagram. It is designed to drive common anode LEDs. It is identical to the TC7106A, except that the regulated supply and backplane drive have been eliminated and the segment drive is typically 8mA. The 1000's output (Pin 19) sinks current from two LED segments, and has a 16mA drive capability. 6.2 Clock Circuit Three clocking methods may be used (see Figure 6-1): 1. 2. 3. An external oscillator connected to Pin 40. A crystal between Pins 39 and 40. An RC oscillator using all three pins. FIGURE 6-1: In both devices, the polarity indication is “ON” for negative analog inputs. If VIN- and VIN+ are reversed, this indication can be reversed also, if desired. CLOCK CIRCUITS TC7106A TC7107A ÷4 The display font is the same as the TC7106A. 6.1 System Timing 39 40 The oscillator frequency is divided by 4 prior to clocking the internal decade counters. The four-phase measurement cycle takes a total of 4000 counts, or 16,000 clock pulses. The 4000-count cycle is independent of input signal magnitude. To Counter 38 Crystal EXT OSC RC Network To TEST Pin on TSC7106A To GND Pin on TSC7107A Each phase of the measurement cycle has the following length: 1. Auto-zero phase: 1000 to 3000 counts (4000 to 12000 clock pulses). For signals less than full scale, the auto-zero phase is assigned the unused reference integrate time period: 2. Signal integrate: 1000 counts (4000 clock pulses). This time period is fixed. The integration period is: EQUATION 6-1: TSI = 4000 1 F OSC Where: FOSC is the externally set clock frequency. 3. Reference Integrate: 0 to 2000 counts (0 to 8000 clock pulses). The TC7106A/7107A are drop-in replacements for the 7106/7107 parts. External component value changes are not required to benefit from the low drift internal reference. 2002 Microchip Technology Inc. DS21455B-page 11 DS21455B-page 12 VIN- ANALOG COMMON VIN+ 30 32 31 INT A/Z DE (–) DE (+) + – 26 V+ – 3.0V + – CREF- VBUFF 33 V- A/Z 35 VREF- AZ & DE (±) DE (+) DE (–) A/Z 36 VREF+ 34 INT 10 µA CREF+ CREF TC7107A 1 Low Tempco VREF 28 V+ RINT – + 27 ROSC 39 OSC2 Clock Thousands To Digital Section COSC 38 OSC3 FOSC To Switch Drivers from Comparator Output VINT CINT Comparator 40 OSC1 A/Z + – 29 Integrator CAZ Internal Digital Ground Segment Output V+ Digital Ground ÷4 Hundreds 7 Segment Decode Logic Control Tens Data Latch 7 Segment Decode LCD Segment Drivers Led Display 500Ω Units 37 TEST 7 Segment Decode 21 1 Digital Ground V+ FIGURE 6-2: 8mA 0.5mA Typical Segment Output TC7106/A/TC7107/A TC7107A BLOCK DIAGRAM 2002 Microchip Technology Inc. TC7106/A/TC7107/A 7.0 7.1 COMPONENT VALUE SELECTION 7.4 Auto-Zero Capacitor (C AZ) The CAZ capacitor size has some influence on system noise. A 0.47µF capacitor is recommended for 200mV full scale applications where 1LSB is 100µV. A 0.047µF capacitor is adequate for 2.0V full scale applications. A mylar type dielectric capacitor is adequate. Integrating Resistor (RINT) The input buffer amplifier and integrator are designed with class A output stages. The output stage idling current is 100µA. The integrator and buffer can supply 20µA drive currents with negligible linearity errors. RINT is chosen to remain in the output stage linear drive region, but not so large that printed circuit board leakage currents induce errors. For a 200mV full scale, RINT is 47kΩ. 2.0V full scale requires 470kΩ. Nominal Full Scale Voltage Reference Voltage Capacitor (CREF) Component Value 200.0mV 2.000V The reference voltage used to ramp the integrator output voltage back to zero during the reference integrate cycle is stored on CREF. A 0.1µF capacitor is acceptable when VIN- is tied to analog common. If a large Common mode voltage exists (VREF- – analog common) and the application requires 200mV full scale, increase CREF to 1.0µF. Rollover error will be held to less than 1/2 count. A mylar dielectric capacitor is adequate. CAZ 0.47µF 0.047µF 7.2 7.3 Integrating Capacitor (C INT) CINT should be selected to maximize the integrator output voltage swing without causing output saturation. Due to the TC7106A/7107A superior temperature coefficient specification, analog common will normally supply the differential voltage reference. For this case, a ±2V full scale integrator output swing is satisfactory. For 3 readings/second (FOSC = 48kHz), a 0.22µF value is suggested. If a different oscillator frequency is used, CINT must be changed in inverse proportion to maintain the nominal ±2V integrator swing. An exact expression for CINT is: EQUATION 7-1: V (4000) 1 FS FOSC RINT CINT = Where: FOSC = VFS = RINT = VINT = VINT CINT must have low dielectric absorption to minimize rollover error. A polypropylene capacitor is recommended. 47kΩ 470kΩ 0.22µF 0.22µF Note: 7.5 FOSC = 48kHz (3 readings per sec). Oscillator Components ROSC (Pin 40 to Pin 39) should be 100kΩ. C OSC is selected using the equation: EQUATION 7-2: FOSC = 0.45 RC For FOSC of 48kHz, COSC is 100pF nominally. Note that FOSC is divided by four to generate the TC7106A internal control clock. The backplane drive signal is derived by dividing FOSC by 800. To achieve maximum rejection of 60Hz noise pickup, the signal integrate period should be a multiple of 60Hz. Oscillator frequencies of 240kHz, 120kHz, 80kHz, 60kHz, 48kHz, 40kHz, etc. should be selected. For 50Hz rejection, oscillator frequencies of 200kHz, 100kHz, 66-2/3kHz, 50kHz, 40kHz, etc. would be suitable. Note that 40kHz (2.5 readings/second) will reject both 50Hz and 60Hz. 7.6 Clock Frequency at Pin 38 Full Scale Input Voltage Integrating Resistor Desired Full Scale Integrator Output Swing RINT CINT Reference Voltage Selection A full scale reading (2000 counts) requires the input signal be twice the reference voltage. Required Full Scale Voltage* VREF 200.0mV 100.0mV 2.000V 1.000V * VFS = 2V REF. In some applications, a scale factor other than unity may exist between a transducer output voltage and the required digital reading. Assume, for example, a pressure transducer output is 400mV for 2000 lb/in2. Rather than dividing the input voltage by two, the reference voltage should be set to 200mV. This permits the transducer input to be used directly. 2002 Microchip Technology Inc. DS21455B-page 13 TC7106/A/TC7107/A The differential reference can also be used when a digital zero reading is required when VIN is not equal to zero. This is common in temperature measuring instrumentation. A compensating offset voltage can be applied between analog common and VIN-. The transducer output is connected between V IN+ and analog common. The internal voltage reference potential available at analog common will normally be used to supply the converter's reference. This potential is stable whenever the supply potential is greater than approximately 7V. In applications where an externally generated reference voltage is desired, refer to Figure 7-1. FIGURE 7-1: FIGURE 8-1: CI + Input Buffer RI + – VIN – VI + Integrator – VCM EXTERNAL REFERENCE V+ COMMON MODE VOLTAGE REDUCES AVAILABLE INTEGRATOR SWING (VCOM ≠ VIN) VI = Where: TI RI CI [ VCM – VIN [ 4000 TI = Integration Time = F OSC CI = Integration Capacitor RI = Integration Resistor V+ V+ VREF+ 6.8V Zener VREF- TC7106A TC7107A V+ 6.8kΩ TC7106A 20kΩ TC7107A IZ 1.2V Ref Common (a) (b) 8.0 DEVICE PIN FUNCTIONAL DESCRIPTION 8.1 Differential Signal Inputs VIN+ (Pin 31), VIN- (Pin 30) The TC7106A/7017A is designed with true differential inputs and accepts input signals within the input stage common mode voltage range (VCM). The typical range is V+ – 1.0 to V+ + 1V. Common mode voltages are removed from the system when the TC7106A/ TC7107A operates from a battery or floating power source (isolated from measured system) and VIN- is connected to analog common (VCOM) (see Figure 8-2). In systems where Common mode voltages exist, the 86dB Common mode rejection ratio minimizes error. Common mode voltages do, however, affect the integrator output level. Integrator output saturation must be prevented. A worst case condition exists if a large positive VCM exists in conjunction with a full scale negative differential signal. The negative signal drives the integrator output positive along with VCM (see Figure 8-1). For such applications the integrator output swing can be reduced below the recommended 2.0V full scale swing. The integrator output will swing within 0.3V of V+ or V- without increasing linearity errors. DS21455B-page 14 Differential Reference VREF+ (Pin 36), VREF- (Pin 35) The reference voltage can be generated anywhere within the V+ to V- power supply range. VREF+ VREF- 8.2 To prevent rollover type errors being induced by large Common mode voltages, CREF should be large compared to stray node capacitance. The TC7106A/TC7107A circuits have a significantly lower analog common temperature coefficient. This gives a very stable voltage suitable for use as a reference. The temperature coefficient of analog common is 20ppm/°C typically. 8.3 Analog Common (Pin 32) The analog common pin is set at a voltage potential approximately 3.0V below V+. The potential is between 2.7V and 3.35V below V+. Analog common is tied internally to the N channel FET capable of sinking 20mA. This FET will hold the common line at 3.0V should an external load attempt to pull the common line toward V+. Analog common source current is limited to 10µA. Analog common is, therefore, easily pulled to a more negative voltage (i.e., below V+ – 3.0V). The TC7106A connects the internal VIN+ and VINinputs to analog common during the auto-zero cycle. During the reference integrate phase, VIN- is connected to analog common. If VIN- is not externally connected to analog common, a Common mode voltage exists. This is rejected by the converter's 86dB Common mode rejection ratio. In battery operation, analog common and VIN- are usually connected, removing Common mode voltage concerns. In systems where Vis connected to the power supply ground, or to a given voltage, analog common should be connected to VIN-. 2002 Microchip Technology Inc. TC7106/A/TC7107/A FIGURE 8-2: COMMON MODE VOLTAGE REMOVED IN BATTERY OPERATION WITH VIN- = ANALOG COMMON Segment Drive Measured System V+ V- VBUF VINT POL BP OSC1 TC7106A OSC3 VIN+ VIN- GND CAZ LCD Display OSC2 V- Analog Common VREF- VREF+ V+ V+ V- GND Power Source With sufficiently high total supply voltage (V+ – V- > 7.0V), analog common is a very stable potential with excellent temperature stability, typically 20ppm/°C. This potential can be used to generate the reference voltage. An external voltage reference will be unnecessary in most cases because of the 50ppm/°C maximum temperature coefficient. See Internal Voltage Reference discussion. 9V FIGURE 8-3: 180 No Maximum Specified 160 No Maximum Specified 140 Typical 120 100 80 TEST (Pin 37) The TEST pin potential is 5V less than V+. TEST may be used as the negative power supply connection for external CMOS logic. The TEST pin is tied to the internally generated negative logic supply (Internal Logic Ground) through a 500Ω resistor in the TC7106A. The TEST pin load should be no more than 1mA. If TEST is pulled to V+ all segments plus the minus sign will be activated. Do not operate in this mode for more than several minutes with the TC7106A. With TEST = V+, the LCD segments are impressed with a DC voltage which will destroy the LCD. The TEST pin will sink about 10mA when pulled to V+. 8.5 Internal Voltage Reference The analog common voltage temperature stability has been significantly improved (Figure 8-3). The “A” version of the industry standard circuits allow users to upgrade old systems and design new systems without external voltage references. External R and C values do not need to be changed. Figure 8-4 shows analog common supplying the necessary voltage reference for the TC7106A/TC7107A. 2002 Microchip Technology Inc. Maximum Limit No Maximum Specified Typical 60 40 20 8.4 ANALOG COMMON TEMPERATURE COEFFICIENT 200 Temperature Coefficient (ppm/°C) The analog common pin serves to set the analog section reference or common point. The TC7106A is specifically designed to operate from a battery, or in any measurement system where input signals are not referenced (float), with respect to the TC7106A power source. The analog common potential of V+ – 3.0V gives a 6V end of battery life voltage. The common potential has a 0.001% voltage coefficient and a 15Ω output impedance. + 0 Typical TC 7106A FIGURE 8-4: ICL7106 ICL7136 INTERNAL VOLTAGE REFERENCE CONNECTION 1 V- 24kΩ V+ TC7106A TC7107A VREF+ 36 1kΩ VREF VREF- 35 Analog 32 Common Set VREF = 1/2 VFULL SCALE DS21455B-page 15 TC7106/A/TC7107/A 9.0 POWER SUPPLIES 9.1 The TC7107A is designed to work from ±5V supplies. However, if a negative supply is not available, it can be generated from the clock output with two diodes, two capacitors, and an inexpensive IC (Figure 9-1). FIGURE 9-1: GENERATING NEGATIVE SUPPLY FROM +5V V+ CD4009 V+ OSC1 OSC2 0.047 µF OSC3 TC7107A 1N914 + – 10 µF 1N914 TC7107 Power Dissipation Reduction The TC7107A sinks the LED display current and this causes heat to build up in the IC package. If the internal voltage reference is used, the changing chip temperature can cause the display to change reading. By reducing the LED common anode voltage, the TC7107A package power dissipation is reduced. Figure 9-3 is a curve tracer display showing the relationship between output current and output voltage for a typical TC7107CPL. Since a typical LED has 1.8 volts across it at 7mA, and its common anode is connected to +5V, the TC7107A output is at 3.2V (point A on Figure 9-3). Maximum power dissipation is 8.1mA x 3.2V x 24 segments = 622mW. FIGURE 9-3: TC7107 OUTPUT CURRENT VS. OUTPUT VOLTAGE GND V- V- = -3.3V In selected applications a negative supply is not required. The conditions to use a single +5V supply are: • The input signal can be referenced to the center of the Common mode range of the converter. • The signal is less than ±1.5V. • An external reference is used. The TSC7660 DC to DC converter may be used to generate -5V from +5V (Figure 9-2). Output Current (mA) 10.000 9.000 A 8.000 B C 7.000 6.000 2.00 2.50 3.00 3.50 4.00 Output Voltage (V) FIGURE 9-2: NEGATIVE POWER SUPPLY GENERATION WITH TC7660 +5V 1 36 V+ V REF+ VREF- LED DRIVE COM 35 32 TC7107A VIN+ 31 VIN VIN- 30 V- GND 26 8 10µF + 2 4 TC7660 5 3 + 10µF DS21455B-page 16 (-5V) 21 Notice, however, that once the TC7107A output voltage is above two volts, the LED current is essentially constant as output voltage increases. Reducing the output voltage by 0.7V (point B in Figure 9-3) results in 7.7mA of LED current, only a 5 percent reduction. Maximum power dissipation is only 7.7mA x 2.5V x 24 = 462mW, a reduction of 26%. An output voltage reduction of 1 volt (point C) reduces LED current by 10% (7.3mA) but power dissipation by 38% (7.3mA x 2.2V x 24 = 385mW). Reduced power dissipation is very easy to obtain. Figure 9-4 shows two ways: either a 5.1 ohm, 1/4 watt resistor or a 1 Amp diode placed in series with the display (but not in series with the TC7107A). The resistor will reduce the TC7107A output voltage, when all 24 segments are “ON,” to point “C” of Figure 9-4. When segments turn off, the output voltage will increase. The diode, on the other hand, will result in a relatively steady output voltage, around point “B.” In addition to limiting maximum power dissipation, the resistor reduces the change in power dissipation as the display changes. This effect is caused by the fact that, as fewer segments are “ON,” each “ON” output drops more voltage and current. For the best case of six seg- 2002 Microchip Technology Inc. TC7106/A/TC7107/A ments (a “111” display) to worst case (a “1888” display), the resistor will change about 230mW, while a circuit without the resistor will change about 470mW. Therefore, the resistor will reduce the effect of display dissipation on reference voltage drift by about 50%. The change in LED brightness caused by the resistor is almost unnoticeable as more segments turn off. If display brightness remaining steady is very important to the designer, a diode may be used instead of the resistor. FIGURE 9-4: DIODE OR RESISTOR LIMITS PACKAGE POWER DISSIPATION +5V + -5V IN – 1MΩ 24kΩ 150Ω TP3 1kΩ 100 pF TP5 TP2 100 kΩ 0.47 µF 0.01 µF 0.1 µF TP1 Display 47 kΩ 40 30 TC7107A 1 0.22 µF TP 4 21 10 20 10.2 Light Emitting Diode Display Sources Several LED manufacturers supply seven segment digits with and without decimal point annunciators for the TC7107A. Manufacturer Address/Phone Display Hewlett-Packard Components 640 Page Mill Rd. Palo Alto, CA 94304 LED AND 720 Palomar Ave. Sunnyvale, CA 94086 408-523-8200 LED 10.3 Decimal Point and Annunciator Drive The TEST pin is connected to the internally generated digital logic supply ground through a 500Ω resistor. The TEST pin may be used as the negative supply for external CMOS gate segment drivers. LCD display annunciators for decimal points, low battery indication, or function indication may be added without adding an additional supply. No more than 1mA should be supplied by the TEST pin; its potential is approximately 5V below V+ (see Figure 10-1). FIGURE 10-1: Display 5.1Ω 1/4W DECIMAL POINT DRIVE USING TEST AS LOGIC GROUND 1N4001 V+ V+ 10.0 TYPICAL APPLICATIONS 10.1 Liquid Crystal Display Sources 4049 TC7106A Several manufacturers supply standard LCDs to interface with the TC7106A 3-1/2 digit analog-to-digital converter. Manufacturer Address/Phone To LCD Decimal Point BP 21 TEST GND 37 To LCD Backplane Representative Part Numbers* Crystaloid Electronics 5282 Hudson Dr. Hudson, OH 44236 216-655-2429 C5335, H5535, T5135, SX440 AND 720 Palomar Ave. Sunnyvale, CA 94086 408-523-8200 FE 0201, 0701 FE 0203, 0701 FE 0501 Epson 3415 Kashikawa st. Torrance, CA 90505 213-534-0360 LD-B709BZ LD-H7992AZ Hamlin, Inc. 612 E. Lake St. Lake Mills, WI 53551 414-648-236100 3902, 3933, 3903 V+ V+ BP TC7106A TEST To LCD Decimal Point Decimal Point Select 4030 GND Note: Contact LCD manufacturer for full product listing and specifications. 2002 Microchip Technology Inc. DS21455B-page 17 TC7106/A/TC7107/A 10.4 FIGURE 10-4: Ratiometric Resistance Measurements The true differential input and differential reference make ratiometric reading possible. Typically in a ratiometric operation, an unknown resistance is measured, with respect to a known standard resistance. No accurately defined reference voltage is needed. The unknown resistance is put in series with a known standard and a current passed through the pair. The voltage developed across the unknown is applied to the input and the voltage across the known resistor is applied to the reference input. If the unknown equals the standard, the display will read 1000. POSITIVE TEMPERATURE COEFFICIENT RESISTOR TEMPERATURE SENSOR 9V + 5.6kΩ 160kΩ V+ 1N914 R1 20kΩ V- VINVIN+ 0.7%/°C PTC R3 TC7106A R2 20kΩ VREF+ VREF- The displayed reading can be determined from the following expression: Common RUnknown Displayed ( Reading ) = -------------------------------x1000 RS tan dard FIGURE 10-5: The display will over range for: RUNKNOWN ≥ 2 x R STANDARD FIGURE 10-2: LOW PARTS COUNT RATIOMETRIC RESISTANCE MEASUREMENT To Pin 1 VREF+ V+ VREF- RSTANDARD LCD Display VIN+ TC7106A RUNKNOWN TC7106A VINAnalog Common FIGURE 10-3: TEMPERATURE SENSOR + 160kΩ 300kΩ 9V TC7106A, USING THE INTERNAL REFERENCE: 200mV FULL SCALE, 3 READINGS-PER-SECOND (RPS) 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 Set VREF = 100mV 100kΩ 100pF 0.1µF 1kΩ 22kΩ 1MΩ + IN 0.01µF + 0.47µF 47kΩ 0.22µF – 9V – To Display To Backplane 300kΩ V+ V- VIN1N4148 Sensor R2 50kΩ R1 50kΩ VIN+ TC7106A VFS = 2V VREF+ VREFCommon DS21455B-page 18 2002 Microchip Technology Inc. TC7106/A/TC7107/A FIGURE 10-6: TC7107 INTERNAL REFERENCE: 200mV FULL SCALE, 3RPS, VIN- TIED TO GND FOR SINGLE ENDED INPUTS FIGURE 10-8: To Pin 1 To Pin 1 TC7107A 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 FIGURE 10-7: Set VREF = 100mV 100kΩ 100pF +5V 0.1µF 1kΩ 22kΩ 1MΩ + IN 0.01µF 0.47µF TC7106A TC7107A – 47kΩ 0.22µF -5V To Display CIRCUIT FOR DEVELOPING UNDER RANGE AND OVER RANGE SIGNALS FROM TC7106A OUTPUTS V+ 1 To Logic VCC V- O/R U/R 20 CD4077 2002 Microchip Technology Inc. 21 100kΩ 100pF 24kΩ V+ 25kΩ 0.1µF 1MΩ + IN 0.01µF 0.047µF – 470kΩ 0.22µF V- To Display TC7107 OPERATED FROM SINGLE +5V SUPPLY To PIn 1 TC7107A TC7106A Set VREF = 1V 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 FIGURE 10-9: 40 To Logic VCC CD4023 OR 74C10 TC7106/TC7107: RECOMMENDED COMPONENT VALUES FOR 2.00V FULL SCALE 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 100kΩ Set VREF = 100mV 100pF 10kΩ 10kΩ V+ 0.1µF 1kΩ 1.2V 0.01µF 0.47µF IN 1MΩ – 47kΩ 0.22µF To Display Note: An external reference must be used in this application. O/R = Over Range U/R = Under Range DS21455B-page 19 TC7106/A/TC7107/A FIGURE 10-10: 3-1/2 DIGIT TRUE RMS AC DMM + IN4148 200mV VIN 1µF 10kΩ 9MΩ 900kΩ 90kΩ 2V 0.02 µF 1MΩ 26 – 1 14 2 13 AD636 4 47kΩ 1W 10% 1 + 10 6 9 32 8 7 20kΩ 10% COM 29 28 35 V REF1MΩ 10% 10kΩ TC7106A 36 V REF+ 1kΩ 11 5 27 24kΩ – 6.8µF V- V+ 12 3 1MΩ 20V 200V 9V + 0.01 µF 2.2µF C1 = 3 - 10pF Variable C2 = 132pF Variable Analog Common 31 V + IN 40 30 38 26 VIN- 39 V- SEG DRIVE BP LCD Display FIGURE 10-11: INTEGRATED CIRCUIT TEMPERATURE SENSOR 9V 2 1 Constant 5V V+ V+ VREF+ REF02 VOUT ADJ TEMP 6 51kΩ R4 5 NC 3 DS21455B-page 20 TC911 R2 R5 2 – 50kΩ 1 4 1.3k TC7106A VREFVFS = 2.00V 8 3 + Temperature Dependent Output GND 4 5.1kΩ VINVOUT = 1.86V @ 25°C 50kΩ R1 VIN+ Common V26 2002 Microchip Technology Inc. TC7106/A/TC7107/A 11.0 PACKAGING INFORMATION 11.1 Package Marking Information Package marking data not available at this time. 11.2 Taping Form Component Taping Orientation for 44-Pin PLCC Devices User Direction of Feed PIN 1 W P Standard Reel Component Orientation for TR Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size Package 44-Pin PLCC Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 32 mm 24 mm 500 13 in Note: Drawing does not represent total number of pins. Component Taping Orientation for 44-Pin PQFP Devices User Direction of Feed PIN 1 W P Standard Reel Component Orientation for TR Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size Package 44-Pin PQFP Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 24 mm 16 mm 500 13 in Note: Drawing does not represent total number of pins. 2002 Microchip Technology Inc. DS21455B-page 21 TC7106/A/TC7107/A 11.3 Package Dimensions 40-Pin PDIP (Wide) PIN 1 .555 (14.10) .530 (13.46) 2.065 (52.45) 2.027 (51.49) .610 (15.49) .590 (14.99) .200 (5.08) .140 (3.56) .040 (1.02) .020 (0.51) .150 (3.81) .115 (2.92) .110 (2.79) .090 (2.29) .070 (1.78) .045 (1.14) .015 (0.38) .008 (0.20) 3° MIN. .700 (17.78) .610 (15.50) .022 (0.56) .015 (0.38) Dimensions: inches (mm) 40-Pin CERDIP (Wide) PIN 1 .540 (13.72) .510 (12.95) .030 (0.76) MIN. .098 (2.49) MAX. 2.070 (52.58) 2.030 (51.56) .620 (15.75) .590 (15.00) .060 (1.52) .020 (0.51) .210 (5.33) .170 (4.32) .150 (3.81) MIN. .200 (5.08) .125 (3.18) .110 (2.79) .090 (2.29) .065 (1.65) .045 (1.14) .020 (0.51) .016 (0.41) .015 (0.38) .008 (0.20) 3° MIN. .700 (17.78) .620 (15.75) Dimensions: inches (mm) DS21455B-page 22 2002 Microchip Technology Inc. TC7106/A/TC7107/A 11.3 Package Dimensions (Continued) 44-Pin PLCC PIN 1 .021 (0.53) .013 (0.33) .050 (1.27) TYP. .695 (17.65) .685 (17.40) .630 (16.00) .591 (15.00) .656 (16.66) .650 (16.51) .032 (0.81) .026 (0.66) .020 (0.51) MIN. .656 (16.66) .650 (16.51) .120 (3.05) .090 (2.29) .695 (17.65) .685 (17.40) .180 (4.57) .165 (4.19) Dimensions: inches (mm) 44-Pin PQFP 7° MAX. .009 (0.23) .005 (0.13) PIN 1 .018 (0.45) .012 (0.30) .041 (1.03) .026 (0.65) .398 (10.10) .390 (9.90) .557 (14.15) .537 (13.65) .031 (0.80) TYP. .398 (10.10) .390 (9.90) .557 (14.15) .537 (13.65) .010 (0.25) TYP. .083 (2.10) .075 (1.90) .096 (2.45) MAX. Dimensions: inches (mm) 2002 Microchip Technology Inc. DS21455B-page 23 TC7106/A/TC7107/A PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART CODE 6 = LCD 7 = LED TC711X X X XXX } A or blank* R (reversed pins) or blank (CPL pkg only) * "A" parts have an improved reference TC Package Code (see below): SALES AND SUPPORT Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. DS21455B-page 24 2002 Microchip Technology Inc. TC7106/A/TC7107/A Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, FilterLab, KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company’s quality system processes and procedures are QS-9000 compliant for its PICmicro ® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001 certified. 2002 Microchip Technology Inc. DS21455B-page 25 WORLDWIDE SALES AND SERVICE AMERICAS ASIA/PACIFIC Japan Corporate Office Australia 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: 480-792-7627 Web Address: http://www.microchip.com Microchip Technology Australia Pty Ltd Suite 22, 41 Rawson Street Epping 2121, NSW Australia Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 Microchip Technology Japan K.K. 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Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883 United Kingdom Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5869 Fax: 44-118 921-5820 03/01/02 *DS21455B* DS21455B-page 26 2002 Microchip Technology Inc.