SILAN SC7107RCPL

SC7106/7107
31/2 DIGITS, LCD/LED DISPLAY , A/D CONVERTERS FOR DMM
DESCRIPTION
The SC7106 and SC7107 are high performance, low power, 3 1/2 digit
A/D converters. Included are seven segment decoders, display drivers, a
reference, and a clock. The SC7106 is designed to interface with a liquid
DIP-40-600-2.54
crystal display (LCD) and includes a multiplexed backplane drive; the
SC7107 will directly drive an instrument size light emitting diode (LED)
display.
The SC7106 and SC7107 bring together a combination of high
accuracy, versatility, and true economy. It features auto-zero to less than
10µV, zero drift of less than 1µV/°C, input bias current of 10pA (Max),
QFP-44-10 x10-0.8
and rollover error of less than one count. True differential inputs and
reference are useful in all systems, but give the designer an uncommon
advantage when measuring load cells, strain gauges and other bridge
type transducers. Finally, the true economy of single power supply
operation (SC7106), enables a high performance panel meter to be built
with the addition of only 10 passive components and a display.
FEATURES
* Guaranteed zero reading for 0V
input on all scales
* True polarity at zero for precise
null detection
ORDERING INFORMATION
Part No.
* Low power dissipation-typically
Temp. Range(°C)
Package
SC7106CPL
0~70
DIP-40-600-2.54
SC7106RCPL
0~70
DIP-40-600-2.54
SC7106
0~70
QFP-44-10X10-0.8
SC7107CPL
0~70
DIP-40-600-2.54
SC7107RCPL
0~70
DIP-40-600-2.54
SC7107
0~70
QFP-44-10X10-0.8
NOTE: “R”indicates device with reversed leads for mounting to PC board
less than 10mW
* True differential input and
reference, direct display driveLCD SC7106, LED SC7107
* Low noise (less than 15µVp-p)
* On chip clock and reference
* 1pA typical input current
* No additional active circuits
required
underside.
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SC7106/7107
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATING
Characteristics
Symbol
Value
V+ ~ V-
15
Supply Voltage SC7107
V+ ~ GND
6
SC7107
V- ~ GND
-9
SC7106
Analog Input Voltage(Either Input) (Note 1)
V+ ~ V-
Reference Input Voltage(Either Input)
V+ ~ V-
Clock Input
SC7106
TEST to V+
SC7107
GND to V+
Unit
V
Operating Temperature
Topr
0 ~ +70
°C
Storage Temperature
Tstg
-65 ~ 150
°C
θJA
50
°C/W
150
°C
Thermal resistance(typical) (Note 2)
Maximum Junction Temperature
NOTE: 1. Input voltages may exceed the supply voltages provided the input current is limited to ±100µA.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
3. Not tested, guaranteed by design.
4. Back plane drive is in phase with segment drive for "off" segment, 180 degrees out of phase for "on"
segment. Frequency is 20 times conversion rate. Average DC component is less than 50mV.
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SC7106/7107
ELECTRICAL CHARACTERISTICS(Unless otherwise noted, specificatons apply to both the SC7106 and
SC7107 at Tamb=25°C, Fclock=48kHz, SC7106 is tested in the circuit of Figure 1. SC7107 is tested in the circuit
of Figure 2.)
Characteristics
Test Conditions
Min.
Typ. Max.
Unit
SYSTEM PERFORMANCE
Zero Input Reading
Ratiometric Reading
VIN=0.0V, Full Scale=200mV
VIN=VREF, VREF=100mV
-000.0
999
±000. +000. Digital
0
999/
1000
0
1000
Reading
Digital
Reading
-VIN=+VIN ≈ 200mV
Rollover Error
Difference In Reading For Equal Positive
--
±0.2
±1
Counts
--
±0.2
±1
Counts
--
50
--
µV/V
--
15
--
µV
And Negative Inputs Near Full Scale
Full Scale =200mV Or Full Scale =2V
Linearity
Maximum Deviation From Best Straight
Line Fit (Note 3)
Common Mode Rejection Ratio
Noise
VCM=1V,VIN=0V,Full Scale=200mV (Note
3)
VIN=0V,Full Scale=200mV,(Peak-To-Peak
Value Not Exceeded 95% of Time)
Leakage Current Input
VIN=0(Note 3)
--
1
10
pA
Zero Reading Drift
VIN=0, 0°C To 70°C(Note 3)
--
0.2
1
µV/°C
--
1
5
ppm/°C
--
1.0
1.8
mA
--
0.6
1.8
mA
2.4
3.0
3.2
V
--
80
--
ppm/°C
4
5.5
6
V
5
8
--
mA
10
16
--
mA
4
7
--
mA
Scale Factor Temperature Coefficient
VIN=199mV, 0°C TO 70°C
(Ext.Ref.0ppm/°C) (Note 3)
End Power Supply Character V+
VIN=0(Does Not Include LED Current For
Supply Current
SC7107)
End Power Supply Character VSupply Current
SC7107 Only
COMMON Pin Analog Common
25kΩ Between Common And Positive
Voltage
Supply (With Respect To V+ Supply)
Temperature Coefficient Of Analog
25kΩ Between Common And Positive
Common
Supply (With Respect To V+ Supply)
DISPLAY DRIVER (SC7106 ONLY)
Peak-To-Peak Segment Drive Voltage
Peak-To-Peak Backplane Drive
V+ To V-=9V(Note 4)
Voltage
DISPLAY DRIVER (SC7107 ONLY)
Segment Sinking Current
(Except Pins 19 And 20)
Pin 19 Only
V+=5V, Segment Voltage=3V
Pin 20 Only
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SC7106/7107
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B3
B1
F3
C1
E3
D1
AB4
V+
POL
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OSC1
BP/GND
OSC2
G3
HOLD
A3
OSC3
C3
TEST
G2
INTEN
DEEN
LB
PIN CONFIGURATION
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SC7106/7107
DESIGN INFORMATION SUMMARY SHEET
OSCILLATOR FREQUENCY
fosc=0.45/RC; Cosc>50pF; Rosc>50kΩ; fosc(Typ)=48kHz
OSCILLATOR PERIOD
tosc=RC/0.45
INTEGRATION CLOCK FREQUENCY
Fclock=fosc/4
INTEGRATION PERIOD
tINT=1000x(4/fosc)
60/50Hz REJECTION CRITERION
tINT/ t60Hz or tINT/ t50Hz=Integer
OPTIMUM INTEGRATION CURRENT
IINT=4µA
FULL SCALE ANALOG INPUT
VOLTAGE
VINFS(Typ)=200mV or 2V
INTEGRATE RESISTOR
RINT=VINFS/IINT
INTEGRATE CAPACITOR
CINT=(tINT) (IINT)/VINT
INTEGRATOR OUTPUT VOLTAGE
SWING
VINT=(tINT) (IINT)/CINT
VINT MAXIMUM SWING
(V-+0.5V)<VINT<(V+-0.5V), VINT(Typ)=2V
DISPLAY COUNT
COUNT=1000x (VIN/VREF)
CONVERSION CYCLE
tCYC=tCLOCKx4000; tCYC=toscx16000;
when fosc=48kHz; tCYC=333ms
COMMON MODE INPUT VOLTAGE
(V-+1V)<VIN<(V+-0.5V)
AUTO-ZERO CAPACITOR
0.01µF<CAZ<1µF
REFERENCE CAPACITOR
0. 1µF<CREF<1µF
VCOM
VCOM ≈ V+−2.8V
SC7106 POWER SUPPLY: SINGLE 9V
SC7106 DISPLAY: LCD
SC7107 POWER SUPPLY:DUAL±5.0V
SC7107 DISPLAY: LED
Biased between Vi and VRegulation lost when V+ to V-<≈6.8V ;if VCOM is externally pulled
down to (V+ to V-)/2, the VCOM circuit will turn off.
V+ to V-=9V, digital supply is generated internally,
VGND≈V+−4.5V
Type: Direct drive with digital logic supply amplitude.
V+=+5V TO GND, V-=-5V TO GND, Digital Logic and LED driver
supply V+ to GND
Type: Non-Multiplexed Common Anode
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SC7106/7107
TYPICAL APPLICATIONS AND TEST CIRCUITS
FIGURE 1.SC7106 TEST CIRCUIT AND TYPICAL APPLICATION WITH LCD DISPLAY COMPONENTS
SELECTED FOR 200mV FULL SCALE
FIGURE 2.SC7107 TEST CIRCUIT AND TYPICAL APPLICATION WITH LED DISPLAY COMPONENTS
SELECTED FOR 200mV FULL SCALE
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SC7106/7107
TYPICAL INTEGRATOR AMPLIFIER OUTPUT WAVEFORM (INT PIN)
TOTAL CONVERSION TIME=4000xtCLOCK=16,000xtOSC
FUNCTIONAL DESCRIPTION
1. ANALOG SECTION
Figure 3 shows the Analog Section for the SC7106 and SC7107. Each measurement cycle is divided into three
phases. They are (1) auto-zero (A-Z), (2) signal integrate (INT) and (3) de-integrate (DE).
FIGURE 3. ANALOG SECTION OF SC7106 AND SC7107
2. AUTO-ZERO PHASE
During auto-zero three things happen. First, input high and low are disconnected from the pins and internally
shorted to analog COMMON. Second, the reference capacitor is charged to the reference voltage. Third, a
feedback loop is closed around the system to charge the auto-zero capacitor CAZ to compensate for offset
voltages in the buffer amplifier, integrator, and comparator. Since the comparator is included in the loop, the A-Z
accuracy is limited only by the noise of the system. In any case, the offset referred to the input is less than 10µV.
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SC7106/7107
3. SIGNAL INTEGRATE PHASE
During signal integrate, the auto-zero loop is opened, the internal short is removed, and the internal input high
and low are connected to the external pins. The converter then integrates the differential voltage between IN HI
and IN LO for a fixed time. This differential voltage can be within a wide common mode range: up to 1V from
either supply. If, on the other hand, the input signal has no return with respect to the converter power supply, IN
LO can be tied to analog COMMON to establish the correct common mode voltage. At the end of this phase, the
polarity of the integrated signal is determined.
4. DE-INTEGRATE PHASE
The final phase is de-integrate, or reference integrate. Input low is internally connected to analog COMMON
and input high is connected across the previously charged reference capacitor. Circuitry within the chip ensures
that the capacitor will be connected with the correct polarity to cause the integrator output to return to zero. The
time required for the output to return to zero is proportional to input signal. Specifically the digital reading
displayed is: DISPLAY COUNT=1000 (VIN/VREF).
5. DIFFERENTIAL INPUT
The input can accept differential voltages anywhere within the common mode range of the input amplifier, or
specifically from 0.5V below the positive supply to 1V above the negative supply. In this range, the system has a
CMRR of 86dB typical. However, care must be exercised to assure the integrator output does not saturate. A
worst case condition would be a large positive common mode voltage with a near full-scale negative differential
input voltage. The negative input signal drives the integrator positive when most of its swing has been used up by
the positive common mode voltage. For these critical applications the integrator output swing can be reduced to
less than the recommended 2V full-scale swing with little loss of accuracy. The integrator output can swing to
within 0.3V of either supply without loss of linearity.
6. DIFFERENTIAL REFERENCE
The reference voltage can be generated anywhere within the power supply voltage of the converter. The main
source of common mode error is a roll-over voltage caused by the reference capacitor losing or gaining charge to
stray capacity on its nodes. If there is a large common mode voltage, the reference capacitor can gain charge
(increase voltage) when called up to de-integrate a positive signal but lose charge (decrease voltage) when
called up to de-integrate a negative input signal. This difference in reference for positive or negative input voltage
will give a roll-over error. However, by selecting the reference capacitor such that it is large enough in
comparison to the stray capacitance, this error can be held to less than 0.5 count worst case. (See Component
Value Selection.)
7. ANALOG COMMON
This pin is included primarily to set the common mode voltage for battery operation (SC7106) or for any system
where the input signals are floating with respect to the power supply. The COMMON pin sets a voltage that is
approximately 2.8V more negative than the positive supply. This is selected to give a minimum end-of -life battery
voltage of about 6V. However, analog COMMON has some of the attributes of a reference voltage. When the
total supply voltage is large enough to cause the zener to regulate (>7V), the COMMON voltage will have a low
voltage coefficient (0.001%/V), low output impedance (≈15Ω), and a temperature coefficient typically less than
80ppm/°C.
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SC7106/7107
The limitations of the on chip reference should also be recognized, however. With the SC7107, the internal
heating which results from the LED drivers can cause some degradation in performance. Due to their higher
thermal resistance, plastic parts are poorer in this respect than ceramic. The combination of reference
Temperature Coefficient (TC), internal chip dissipation, and package thermal resistance can increase noise near
full scale from 25µV to 80µVp-p. Also the linearity in going from a high dissipation count such as 1000 (20
segments on) to a low dissipation count such as 1111(8 segments on) can suffer by a count or more. Devices
with a positive TC reference may require several counts to pull out of an over-range condition. This is because
over-range is a low dissipation mode, with the three least significant digits blanked. Similarly, units with a
negative TC may cycle between over-range and a non-over-range count as the die alternately heats and cools.
All these problems are of course eliminated if an external reference is used.
The SC7106, with its negligible dissipation, suffers from none of these problems. In either case, an external
reference can easily be added, as shown in Figure 4.
Analog COMMON is also used as the input low return during auto-zero and de-integrate. If IN LO is different
from analog COMMON, a common mode voltage exists in the system and is taken care of by the excellent
CMRR of the converter. However, in some applications IN LO will be set at a fixed known voltage (power supply
common for instance). In this application, analog COMMON should be tied to the same point, thus removing the
common mode voltage from the converter. The same holds true for the reference voltage. If reference can be
conveniently tied to analog COMMON, it should be since this removes the common mode voltage from the
reference system.
Within the IC, analog COMMON is tied to an N-Channel FET that can sink approximately 30mA of current to
hold the voltage 2.8V below the positive supply (when a load is trying to pull the common line positive). However,
there is only 10µA of source current, so COMMON may easily be tied to a more negative voltage thus overriding
the internal reference.
FIGURE 4. USING AN EXTERNAL REFERENCE
8. TEST
The TEST pin serves two functions. On the SC7106 it is coupled to the internally generated digital supply
through a 500Ω resistor. Thus it can be used as the negative supply for externally generated segment drivers
such as decimal points or any other presentation the user may want to include on the LCD display. Figures 5 and
6 show such an application. No more than a 1mA load should be applied.
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SC7106/7107
FIGURE 5. SIMPLE INVERTER FOR FIXED
FIGURE 6. EXCLUSIVE 'OR' GATE FOR DECIMAL
DECIMAL POINT
POINT DRIVE
The second function is a "lamp test". When TEST is pulled high (to V+) all segments will be turned on and the
display should read "1888". The TEST pin will sink about 15mA under these conditions.
NOTE: In the lamp test mode, the segments have a constant DC voltage (no square-wave). This may burn the
LCD display if maintained for extended periods.
9.DIGITAL SECTION
Figures 7 and 8 show the digital section for the SC7106 and SC7107, respectively. In the SC7106, an internal
digital ground is generated from a 6V Zener diode and a large P-Channel source follower. This supply is made
stiff to absorb the relative large capacitive currents when the back plane (BP) voltage is switched. The BP
frequency is the clock frequency divided by 800. For three readings/sec., this is a 60Hz square wave with a
nominal amplitude of 5V. The segments are driven at the same frequency and amplitude and are in phase with
BP when OFF, but out of phase when ON. In all cases negligible DC voltage exists across the segments.
Figures 8 is the Digital Section of the SC7107. It is identical to the SC7106 except that the regulated supply
and back plane drive have been eliminated and the segment drive has been increased from 2mA to 8mA, typical
for instrument size common anode LED displays. Since the 1000 output (pin 19) must sink current from two LED
segments it has twice the drive capability or 16mA.
In both devices, the polarity indication is "on" for negative analog inputs. If IN LO and IN HI are reversed, this
indication can be reversed also, if desired.
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SC7106/7107
FIGURE 7. SC7106 DIGITAL SECTION
FIGURE 8. SC7107 DIGITAL SECTION
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SC7106/7107
10. SYSTEM TIMING
Figures 9 shows the clocking arrangement used in the SC7106 and SC7107. Two basic clocking arrangements
can be used:
1) Figure 9A. An external oscillator connected to pin 40.
2) Figure 9B. An R-C oscillator using all three pins.
The oscillator frequency is divided by four before it clocks the decade counters. It is then further divided to form
the three convert-cycle phases. These are signal integrate (1000 counts), reference de-integrate (0 to 2000
counts ) and auto-zero (1000 to 3000 counts). For signals less than full scale, auto-zero gets the unused portion
of reference de-integrate. This makes a complete measure cycle of 4,000 counts (16,000 clock pulses)
independent of input voltage. For three readings/second, an oscillator frequency of 48kHz would be used.
To achieve maximum rejection of 60Hz pickup, the signal integrate cycle should be a multiple of 60Hz.
Oscillator frequencies of 240kHz, 120 kHz, 80 kHz, 60kHz, 48kHz, 40kHz, 331/3kHz, etc., should be selected. For
50Hz rejection, oscillator frequencies of 200kHz, 100kHz, 662/3kHz,50kHz, 40kHz, etc., would be suitable. Note
that 40kHz (2.5 readings/second) will reject both 50Hz and 60Hz (also 400Hz and 440Hz).
FIGURE 9. CLOCK CIRCUITS
COMPONENT VALUE SELECTION
1. INTEGRATING RESISTOR
Both the buffer amplifier and the integrator have a class A output stage with 100µA of quiescent current. They
can supply 4µA of drive current with negligible nonlinearity. The integrating resistor should be large enough to
remain in this very linear region over the input voltage range, but small enough that undue leakage requirements
are not placed on the PC board. For 2V full scale, 470kΩ is near optimum and similarly a 47kΩ for a 200mV
scale.
2.INTEGRATING CAPACITOR
The integrating capacitor should be selected to give the maximum voltage swing that ensures tolerance buildup
will not saturate the integrator swing (approximately. 0.3V from either supply). In the SC7106 or the SC7107,
when the analog COMMON is used as a reference, a nominal +2V full-scale integrator swing is fine. For the
SC7107 with +5V supplies and analog CIMMON tied to supply ground, a ±3.5V to +4V swing is nominal. For
three readings/second (48kHz clock ) nominal values for CINT are 0.22µF and 0.10µF, respectively. Of course, if
different oscillator frequencies are used, these values should be changed in inverse proportion to maintain the
same output swing.
An additional requirement of the integrating capacitor is that it must have a low dielectric absorption to prevent
roll-over errors. While other types of capacitors are adequate for this application, polypropylene capacitors give
undetectable errors at reasonable cost.
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SC7106/7107
3.AUTO-ZERO CAPACITOR
The size of the auto-zero capacitor has some influence on the noise of the system. For 200mV full scale where
noise is very important, a 0.47µF capacitor is recommended. On the 2V scale, a 0.047µF capacitor increases the
speed of recovery from overload and is adequate for noise on this scale.
4.REFERENCE CAPACITOR
A 0.1µF capacitor gives good results in most applications. However, where a large common mode voltage
exists (i.e., the REF LO pin is not at analog COMMON) and a 200mV scale is used, a larger value is required to
prevent roll-over error. Generally 1µF will hold the roll-over error to 0.5 count in this instance.
5.OSCILLATOR COMPONENTS
For all ranges of frequency a 100kΩ resistor is recommended and the capacitor is selected from the equation:
f=0.45/RC, for 48kHz clock (3 Readings/sec), C=100pF.
6.REFERENCE VOLTAGE
The analog input required to generate full-scale output (2000 counts) is: VIN=2VREF. Thus, for the 200mV and
2V scale, VREF should equal 100mV and 1V, respectively. However, in many applications where the A/D is
connected to a transducer, there will exist a scale factor other than unity between the input voltage and the digital
reading. For instance, in a weighing system, the designer might like to have a full-scale reading when the voltage
from the transducer is 0.662V. Instead of dividing the input down to 200mV, the designer should use the input
voltage directly and select VREF=0.341V. Suitable values for integrating resistor and capacitor would be 120kΩ
and 0.22µF. This makes the system slightly quieter and also avoids a divider network on the input. The SC7107
with ±5V supplies can accept input signals up to ±4V. Another advantage of this system occurs when a digital
reading of zero is desired for VIN≠0. Temperature and weighing systems with a variable fare are examples. This
offset reading can be conveniently generated by connecting the voltage transducer between IN HI and COMMON
and the variable (or fixed) offset voltage between COMMON and IN LO.
7.SC7107 POWER SUPPLIES
The SC7107 is designed to work from ±5V supplies. However, if a negative supply is not available, it can be
generated from the clock output with 2 diodes, 2 capacitors, and an inexpensive IC. Figure 10 shows this
application.
In fact, in selected applications no
negative
supply
is
required.
The
conditions to use a single +5V supply
are:
1) The input signal can be referenced
to the center of the common mode
range of the converter.
2) The signal is less than ±1.5V.
3) An external reference is used.
FIGURE 10. GENERATING NEGATIVE SUPPLY FROM +5V
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SC7106/7107
TYPICAL APPLICATIONS
The SC7106 and SC7107 may be used in a wide variety of configurations. The circuits which follow show some
of the possibilities, and serve to illustrate the exceptional versatility of these A/D converters.
Values shown are for 200mV full scale, 3
Values
readings/sec., floating supply voltage (9V battery).
readings/sec. IN LO may be tied to either COMMON
shown
are
for
200mV
full
scale,
3
for inputs floating with respect to supplies, or GND for
single ended inputs. (See discussion under Analog
COMMON.)
FIGURE 11. SC7106 USING THE INTERNAL
FIGURE 12. SC7107 USING THE INTERNAL
REFERENCE
REFERENCE
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SC7106/7107
TYPICAL APPLICATIONS(CONTINUED)
OSC1
40
OSC2
39
OSC3
38
TEST
37
REF HI
36
REF LO
35
TO PIN1
100K
100pF
SET
VREF=100mV
+5V
1K
CREF+
100K
34
CREF-
33
COMMON
32
IN HI
31
IN LO
30
A-Z
29
BUFF
28
INT
27
V-
26
G2
25
C3
24
A3
23
G3
22
GND
21
6.8V
0.1 F
1M
+
0.01 F
IN
-
0.47 F
47K
0.22 F
-5V
TO DISPLAY
IN LO is tied to supply COMMON establishing the
Since low TC zeners have breakdown voltages~6.8V,
correct common mode voltage. If COMMON is not
diode must be placed across the total supply (10V).
shorted to GND, the input voltage may float with
As in the case of Figure 14, IN LO may be tied to
respect to the power supply and COMMON acts as a
either COMMON or GND.
pre-regulator for the reference. If COMMON is
shorted to GND, the input is single ended (referred to
supply GND) and the pre-regulator is overridden.
FIGURE 13. SC7107 WITH AN EXTERNAL BAND-
FIGURE 14. SC7107 WITH ZENER DIODE
GAP REFERENCE (1.2V TYPE)
REFERENCE
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SC7106/7107
TYPICAL APPLICATIONS(CONTINUED)
An external reference must be used in this application,
since the voltage between V+ and v- is insufficient for
correct operation of the internal reference.
FIGURE 15. SC7106 AND SC7107:
RECOMMENDED COMPONENT VALUES FOR 2V
FIGURE 16. SC7107 OPERATED FROM SINGLE +5V
FULL SCALE
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SC7106/7107
TYPICAL APPLICATIONS(CONTINUED)
OSC1
40
OSC2
39
OSC3
38
TEST
37
REF HI
36
REF LO
35
CREF+
34
CREF-
33
COMMON
32
IN HI
31
IN LO
30
A-Z
29
BUFF
28
INT
27
V-
26
G2
25
C3
24
A3
23
G3
22
GND
21
TO PIN1
V+
100K
100pF
0.1 F
0.47 F
47K
0.22¦ÌF
TO DISPLAY
The resistor values within the bridge are determined
A
by the desired sensitivity.
temperature coefficient of about -2mV/°C. Calibration
silicon
diode-connected
transistor
has
a
is achieved by placing the sensing transistor in ice
water and adjusting the zeroing potentiometer for a
00.0 reading. The sensor should then be placed in
boiling water and the scale-factor potentiometer
adjusted for a 100.0 reading.
FIGURE 17. SC7107 MEASUREING RATIOMETRIC
FIGURE 18. SC7106 USED AS A DIGITAL
VALUES OF QUAD LOAD CELL
CENTIGRADE THERMOMETOR
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SC7106/7107
TYPICAL APPLICATIONS(CONTINUED)
FIGURE 19. CIRCUIT FOR DEVELOPING
FIGURE 20. CIRCUIT FOR DEVELOPING
UNDERRANGE AND OVERRANGE SIGNAL FROM
UNDERRANGE AND OVERRANGE SIGNAL FROM
SC7106 OUTPUTS
SC7107 OUTPUTS
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
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SC7106/7107
TYPICAL APPLICATIONS(CONTINUED)
Test is used as a common-mode reference level to ensure compatibility with most op amps.
FIGURE 21. AC TO DC CONVERTER WITH SC7106
FIGURE 22. DISPLAY BUFFERING FOR INCREASED DRIVE CURRENT
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
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SC7106/7107
PACKAGE OUTLINE
0.5MIN
15.24±0.25
UNIT: mm
3.7±0.1
5.1 MAX
14.0±0.3
DIP-40-600-2.54
QFP-44-10X10-0.8
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
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UNIT: mm
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SC7106/7107
HANDLING MOS DEVICES:
Electrostatic charges can exist in many things. All of our MOS devices are internally protected against
electrostatic discharge but they can be damaged if the following precautions are not taken:
• Persons at a work bench should be earthed via a wrist strap.
• Equipment cases should be earthed.
• All tools used during assembly, including soldering tools and solder baths, must be earthed.
• MOS devices should be packed for dispatch in antistatic/conductive containers.
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
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2006.02.27
Page 21 of 22