SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003
D Complete PWM Power-Control Function
D Totem-Pole Outputs for 200-mA Sink or
D OR N PACKAGE
(TOP VIEW)
Source Current
ERROR
AMP 1
D Output Control Selects Parallel or
D
D
D
D
D
D
Push-Pull Operation
Internal Circuitry Prohibits Double Pulse at
Either Output
Variable Dead-Time Provides Control Over
Total Range
Internal Regulator Provides a Stable 5-V
Reference Supply, Trimmed to 1%
Tolerance
On-Board Output Current-Limiting
Protection
Undervoltage Lockout for Low-VCC
Conditions
Separate Power and Signal Grounds
1IN+
1
16
2IN+
ERROR
AMP 2
1IN−
2
15
2IN−
FEEDBACK
3
14
REF
DTC
4
13
OUTPUT CTRL
CT
5
12
RT
6
11
VCC
VC
SIGNAL GND
7
10
POWER GND
OUT1
8
9
OUT2
description/ordering information
The TL598 incorporates all the functions required in the construction of pulse-width-modulated (PWM)
controlled systems on a single chip. Designed primarily for power-supply control, the TL598 provides the
systems engineer with the flexibility to tailor the power-supply control circuits to a specific application.
The TL598 contains two error amplifiers, an internal oscillator (externally adjustable), a dead-time control (DTC)
comparator, a pulse-steering flip-flop, a 5-V precision reference, undervoltage lockout control, and output
control circuits. Two totem-pole outputs provide exceptional rise- and fall-time performance for power FET
control. The outputs share a common source supply and common power ground terminals, which allow system
designers to eliminate errors caused by high current-induced voltage drops and common-mode noise.
The error amplifier has a common-mode voltage range of 0 V to VCC − 2 V. The DTC comparator has a fixed
offset that prevents overlap of the outputs during push-pull operation. A synchronous multiple supply operation
can be achieved by connecting RT to the reference output and providing a sawtooth input to CT.
The TL598 device provides an output control function to select either push-pull or parallel operation. Circuit
architecture prevents either output from being pulsed twice during push-pull operation. The output frequency
1
. For single-ended applications:
for push-pull applications is one-half the oscillator frequency f O +
2 RT CT
fO + 1 .
RT CT
ǒ
Ǔ
ORDERING INFORMATION
PDIP (N)
0°C
0
C to 70
70°C
C
ORDERABLE
PART NUMBER
PACKAGE†
TA
SOIC (D)
Tube of 25
TL598CN
Tube of 40
TL598CD
Reel of 2500
TL598CDR
TOP-SIDE
MARKING
TL598CN
TL598C
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
!" #!$% &"'
&! #" #" (" " ") !"
&& *+' &! #", &" ""%+ %!&"
", %% #""'
POST OFFICE BOX 655303
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1
SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003
FUNCTION TABLE
INPUT/OUTPUT
CTRL
VI = GND
VI = REF
OUTPUT FUNCTION
Single-ended or parallel output
Normal push-pull operation
functional block diagram
OUTPUT CTRL
(see Function Table)
13
RT
CT
DTC
6
5
Oscillator
≈0.1 V
4
1IN+
1IN−
2IN+
2IN−
FEEDBACK
2
16
15
8
VC
OUT1
C1
Error Amplifier
1
11
1D
DTC
Comparator
+
−
1
PWM
Comparator
9
Error Amplifier
+
2
−
Pulse-Steering
Flip-Flop
3
Reference
Regulator
Undervoltage
Lockout Control
OUT2
10 POWER
GND
12 V
CC
14
REF
7 SIGNAL
GND
0.7 mA
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 V
Amplifier input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC + 0.3 V
Collector voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 V
Output current (each output), sink or source, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250 mA
Package thermal impedance, θJA (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the signal ground terminal.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can impact reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
2
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SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003
recommended operating conditions
MIN
MAX
VCC
VI
Supply voltage
7
40
V
Amplifier input voltage
0
V
IO
IIL
Collector voltage
VCC−2
40
Output current (each output), sink or source
Current into feedback terminal
UNIT
V
200
mA
0.3
mA
0.00047
10
µF
1.8
500
kΩ
Oscillator frequency
1
300
kHz
Operating free-air temperature
0
70
°C
CT
Timing capacitor
RT
fosc
Timing resistor
TA
electrical characteristics over recommended operating free-air temperature range, VCC = 15 V
(unless otherwise noted)
reference section (see Note 4)
TEST CONDITIONS†
PARAMETER
TA = 25°C
TA = full range
Output voltage (REF)
IO = 1 mA
Input regulation
VCC = 7 V to 40 V
Output regulation
IO = 1 mA to 10 mA
Output voltage change with temperature
Short-circuit output current§
∆TA = MIN to MAX
REF = 0 V
MIN
TYP‡
MAX
4.95
5
5.05
4.9
TA = 25°C
TA = 25°C
5.1
2
25
1
15
TA = full range
50
2
10
UNIT
V
mV
mV
mV/V
−10
−48
mA
† Full range is 0°C to 70°C.
‡ All typical values, except for parameter changes with temperature, are at TA = 25°C.
§ Duration of the short circuit should not exceed one second.
NOTE 4: Pulse-testing techniques that maintain the junction temperature as close to the ambient temperature as possible must be used.
oscillator section, CT = 0.001 µF, RT = 12 kΩ (see Figure 1) (see Note 4)
PARAMETER
TEST CONDITIONS†
Frequency
Standard deviation of frequency¶
All values of VCC, CT, RT, TA constant
Frequency change with voltage
VCC = 7 V to 40 V,
∆TA = full range
TA = 25°C
∆TA = full range,
CT = 0.01 µF
Frequency change with temperature#
MIN
TYP‡
MAX
UNIT
100
kHz
100
Hz/kHz
1
10
70
120
50
80
Hz/kHz
Hz/kHz
† Full range is 0°C to 70°C.
‡ All typical values, except for parameter changes with temperature, are at TA = 25°C.
¶ Standard deviation is a measure of the statistical distribution about the mean, as derived from the formula:
s +
Ǹ
N
ȍ (xn * X)2
n+1
N*1
# Effects of temperature on external RT and CT are not taken into account.
NOTE 4. Pulse-testing techniques that maintain the junction temperature as close to the ambient temperature as possible must be used.
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3
SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003
electrical characteristics over recommended operating free-air temperature range, VCC = 15 V
(unless otherwise noted) (continued)
error amplifier section (see Note 4)
PARAMETER
TEST CONDITIONS
MIN
TYP†
MAX
UNIT
Input offset voltage
FEEDBACK = 2.5 V
2
10
mV
Input offset current
FEEDBACK = 2.5 V
25
250
nA
Input bias current
FEEDBACK = 2.5 V
0.2
1
µA
0 to
VCC−2
Common-mode input voltage range
VCC = 7 V to 40 V
Open-loop voltage amplification
∆VO (FEEDBACK) = 3 V,
VO (FEEDBACK) = 0.5 V to 3.5 V
70
Unity-gain bandwidth
Common-mode rejection ratio
∆VIC = 6.5 V,
Output sink current (FEEDBACK)
VCC = 40 V,
FEEDBACK = 0.5 V
Output source current (FEEDBACK)
FEEDBACK = 3.5 V
Phase margin at unity gain
FEEDBACK = 0.5 V to 3.5 V,
TA = 25°C
V
95
dB
800
kHz
65
80
dB
0.3
0.7
mA
−2
RL = 2 kΩ
mA
65°
Supply-voltage rejection ratio
FEEDBACK = 2.5 V,
∆VCC = 33 V,
RL = 2 kΩ
100
dB
† All typical values, except for parameter changes with temperature, are at TA = 25°C.
NOTE 4. Pulse-testing techniques that maintain the junction temperature as close to the ambient temperature as possible must be used.
electrical characteristics over recommended operating free-air temperature range, VCC = 15 V
(unless otherwise noted)
undervoltage lockout section (see Note 4)
TEST CONDITIONS‡
PARAMETER
Threshold voltage
TA = 25°C
∆TA = full range
Hysteresis§
TA = 25°C
TA = full range
MIN
MAX
4
6
3.5
6.9
100
UNIT
V
mV
50
‡ Full range is 0°C to 70°C.
§ Hysteresis is the difference between the positive-going input threshold voltage and the negative-going input threshold voltage.
NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.
output section (see Note 4)
PARAMETER
TEST CONDITIONS
High-level output voltage
VCC = 15 V,
VC = 15 V
IO = −200 mA
IO = −20 mA
Low-level output voltage
VCC = 15 V,
VC = 15 V
IO = 200 mA
IO = 20 mA
Output-control input current
VI = Vref
VI = 0.4 V
MIN
MAX
UNIT
12
V
13
2
0.4
V
3.5
mA
100
µA
NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.
4
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SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003
electrical characteristics over recommended operating free-air temperature range, VCC = 15 V
(unless otherwise noted) (continued)
dead-time control section (see Figure 1) (see Note 4)
PARAMETER
TEST CONDITIONS
Input bias current (DTC)
VI = 0 to 5.25 V
DTC = 0 V
Maximum duty cycle, each output
MIN
Maximum duty cycle
MAX
UNIT
−2
−10
µA
3
3.3
0.45
Zero duty cycle
Input threshold voltage (DTC)
TYP†
0
V
† All typical values, except for parameter changes with temperature, are at TA = 25°C.
NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.
pwm comparator section (see Note 4)
PARAMETER
Input threshold voltage (FEEDBACK)
TEST CONDITIONS
MIN
DTC = 0 V
TYP†
MAX
3.75
4.5
UNIT
V
Input sink current (FEEDBACK)
V(FEEDBACK) = 0.5 V
0.3
0.7
mA
† All typical values, except for parameter changes with temperature, are at TA = 25°C.
NOTE Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.
total device (see Figure 1) (see Note 4)
PARAMETER
Standby supply current
TEST CONDITIONS
RT = Vref,
All other inputs and outputs open
MIN
VCC = 15 V
VCC = 40 V
TYP†
MAX
15
21
20
26
UNIT
mA
Average supply current
DTC = 2 V
15
mA
† All typical values, except for parameter changes with temperature, are at TA = 25°C.
NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.
switching characteristics, TA = 25°C (see Note 4)
PARAMETER
Output-voltage rise time
Output-voltage fall time
TEST CONDITIONS
CL = 1500 pF,
See Figure 2
VC = 15 V,
VCC = 15 V,
MIN
TYP
MAX
60
150
35
75
UNIT
ns
NOTE 4. Pulse-testing techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
Output
VC
15 V
1
2
Test
Inputs
3
4
5
6
12
VCC
IN+
IN−
ERROR
AMP 1
IN+
ERROR
AMP 2
IN−
15
50 kΩ
FEEDBACK
DTC
REF
CT
OUTPUT CTRL
RT
VC
0.001 µF
OUT1
12 kΩ
7
16
OUT2
SIGNAL GND
POWER GND
POWER GND
14
13
11
8
9
OUTPUT CONFIGURATION
15 V
OUTPUT 1
OUTPUT 2
−
VI
+
FEEDBACK
10
REF
−
+
MAIN DEVICE TEST CIRCUIT
ERROR-AMPLIFIER TEST CIRCUIT
Figure 1. Test Circuits
VC
90%
90%
Output
CL = 1500 pF
POWER GND
OUTPUT CONFIGURATION
10%
10%
0V
tr
tf
OUTPUT-VOLTAGE WAVEFORM
Figure 2. Switching Output Configuration and Voltage Waveform
6
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SLVS053D − FEBRUARY 1988 − REVISED NOVEMBER 2003
TYPICAL CHARACTERISTICS
OSCILLATOR FREQUENCY AND
FREQUENCY VARIATION †
vs
TIMING RESISTANCE
AMPLIFIER VOLTAGE AMPLIFICATION
vs
FREQUENCY
80
100 k
VCC = 15 V
VCC = 15 V
∆VO = 3 V
TA = 25°C
Amplifier Voltage Amplification − dB
fosc − Oscillator Frequency − Hz
40 k
−2%
10 k
4k
0.001 µF
−1%
0.01 µF
0%
0.1 µF
1k
400
100
†
Df = 1%
CT = 1 µF
40
10
1k
4k
10 k
40 k 100 k
RT − Timing Resistance − Ω
400 k
1M
60
40
20
0
1k
10 k
100 k
1M
f − Frequency − Hz
† Frequency variation (∆f) is the change in predicted oscillator
frequency that occurs over the full temperature range.
Figure 4
Figure 3
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• DALLAS, TEXAS 75265
7
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
5962-9166801QEA
OBSOLETE
CDIP
J
16
TBD
Call TI
TL598CD
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL598CDE4
ACTIVE
SOIC
D
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL598CDR
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL598CDRE4
ACTIVE
SOIC
D
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TL598CN
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL598CNE4
ACTIVE
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
TL598MFKB
OBSOLETE
LCCC
FK
20
TBD
Call TI
Call TI
TL598MJB
OBSOLETE
CDIP
J
16
TBD
Call TI
Call TI
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
Call TI
TL598QD
OBSOLETE
SOIC
D
16
TBD
Call TI
Call TI
TL598QDR
OBSOLETE
SOIC
D
16
TBD
Call TI
Call TI
TL598QN
OBSOLETE
PDIP
N
16
TBD
Call TI
Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
18
17
16
15
14
13
NO. OF
TERMINALS
**
12
19
11
20
10
A
B
MIN
MAX
MIN
MAX
20
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
28
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
9
22
8
44
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
23
7
52
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
24
6
68
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
84
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
B SQ
A SQ
25
5
26
27
28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140 / D 10/96
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a metal lid.
The terminals are gold plated.
Falls within JEDEC MS-004
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