STD5N20 N-CHANNEL 200V - 0.6Ω - 5A DPAK MESH OVERLAY™ MOSFET TYPE STD5N20 ■ ■ ■ ■ VDSS RDS(on) ID 200 V < 0.8 Ω 5A TYPICAL RDS(on) = 0.6 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED ADD SUFFIX “T4” FOR OREDERING IN TAPE & REEL DESCRIPTION Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performance. The new patented STrip layout coupled with the Company’s proprietary edge termination structure, makes it suitable in coverters for lighting applications. 3 1 DPAK TO-252 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-DC CONVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS Value Unit Drain-source Voltage (VGS = 0) Parameter 200 V Drain-gate Voltage (RGS = 20 kΩ) 200 V Gate- source Voltage ±20 V ID Drain Current (continuous) at TC = 25°C 5 A ID Drain Current (continuous) at TC = 100°C 3.5 A Drain Current (pulsed) 20 A Total Dissipation at TC = 25°C 45 W 0.36 W/°C 5 V/ns –65 to 150 °C 150 °C IDM (l) PTOT Derating Factor dv/dt (1) Tstg Tj Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature (•)Pulse width limited by safe operating area December 2000 (1)ISD ≤5A, di/dt ≤300A/µs, V DD ≤ V(BR)DSS, Tj ≤ TJMAX. (**) Limited only by Maximum Temperature Allowed 1/8 STD5N20 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 2.77 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W Rthc-sink Thermal Resistance Case-sink Typ 1.5 °C/W Maximum Lead Temperature For Soldering Purpose 275 °C Tl AVALANCHE CHARACTERISTICS Symbol Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Max Value Unit 5 A 130 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 µA, VGS = 0 Min. Typ. Max. 200 Unit V VDS = Max Rating 1 µA VDS = Max Rating, TC = 125 °C 50 µA ±100 nA VGS = ±20V ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 2.5 A ID(on) On State Drain Current VDS > ID(on) x RDS(on)max, VGS = 10V Min. Typ. Max. Unit 2 3 4 V 0.7 0.8 Ω 5 A DYNAMIC Symbol gfs (1) 2/8 Parameter Forward Transconductance Test Conditions VDS > ID(on) x RDS(on)max, ID = 2.5A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. Max. Unit 1.5 4 S 350 pF Ciss Input Capacitance Coss Output Capacitance 70 pF Crss Reverse Transfer Capacitance 35 pF STD5N20 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Parameter Turn-on Delay Time Rise Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge Test Conditions Min. VDD = 100 V, ID = 3 A RG = 4.7Ω VGS = 10 V (see test circuit, Figure 3) VDD = 160V, ID = 6 A, VGS = 10V Typ. Max. Unit 18 ns 30 ns 19 27 nC 4.5 nC 7.5 nC SWITCHING OFF Symbol tr(Voff) Parameter Off-voltage Rise Time tf Fall Time tc Cross-over Time Test Conditions Min. VDD = 160V, ID = 6 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) Typ. Max. Unit 40 ns 10 ns 65 ns SOURCE DRAIN DIODE Symbol ISD Parameter Test Conditions Min. Typ. Source-drain Current ISDM (2) Source-drain Current (pulsed) VSD (1) Forward On Voltage ISD = 6 A, VGS = 0 trr Reverse Recovery Time Qrr Reverse Recovery Charge ISD =6 A, di/dt = 100A/µs VDD = 100V, Tj = 150°C (see test circuit, Figure 5) IRRM Reverse Recovery Current Max. Unit 6 A 24 A 1.5 V 155 ns 700 nC 9 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/8 STD5N20 Output Characteristics Tranfer Characteristics Tranconductance Static Drain-Source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STD5N20 Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STD5N20 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STD5N20 TO-252 (DPAK) MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 2.20 2.40 0.087 0.094 A1 0.90 1.10 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.90 0.025 0.035 B2 5.20 5.40 0.204 0.213 C 0.45 0.60 0.018 0.024 C2 0.48 0.60 0.019 0.024 D 6.00 6.20 0.236 0.244 E 6.40 6.60 0.252 0.260 G 4.40 4.60 0.173 0.181 H 9.35 10.10 0.368 0.398 L2 0.8 0.031 L4 0.60 1.00 0.024 0.039 V2 0o 8o 0o 0o P032P_B 7/8 STD5N20 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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