PROCESS CP283 Central Power Transistor TM Semiconductor Corp. NPN - Silicon Power Transistor Chip PROCESS DETAILS Die Size 68 x 68 MILS Die Thickness 9.5 MILS Base Bonding Pad Area 18 x 11 MILS Emitter Bonding Pad Area 18 x 12 MILS Top Side Metalization Al - 45,000Å Back Side Metalization Ti/Ni/Ag - (3000Å, 10,000Å, 10,000Å) GEOMETRY GROSS DIE PER 5 INCH WAFER 3,675 PRINCIPAL DEVICE TYPES MJE13003 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R0 (20-January 2006)