PROCESS CP349 Power Transistor NPN- High Voltage Transistor Chip PROCESS DETAILS Process EPITAXIAL PLANAR Die Size 51 x 51 MILS Die Thickness 9.1 MILS Base Bonding Pad Area 7.9 x 15.7 MILS Emitter Bonding Pad Area 7.9 x 15.7 MILS Top Side Metalization Al - 30,000Å Back Side Metalization Ti/Ni/Ag - 2000Å/3000Å/20000Å GEOMETRY GROSS DIE PER 5 INCH WAFER 6,480 PRINCIPAL DEVICE TYPES BUY49S BSW68 145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com R0 (12 - June 2006)