CENTRAL CP767

PROCESS
CP767
Small Signal Transistor
PNP- Saturated Switch Transistor Chip
PRELIMINARY
PROCESS DETAILS
Process
EPITAXIAL PLANAR
Die Size
30 x 30 MILS
Die Thickness
9.0 MILS
Base Bonding Pad Area
3.85 x 4.20 MILS
Emitter Bonding Pad Area
7.35 x 3.75 MILS
Top Side Metalization
Al - 30,000Å
Back Side Metalization
Au - 15,000Å
GEOMETRY
GROSS DIE PER 4 INCH WAFER
12,300
PRINCIPAL DEVICE TYPES
2N3467
2N3468
BACKSIDE COLLECTOR
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
R0 (24-June 2003)