MOTOROLA MC13081X

Order this document by MC13081X/D
MULTIMODE COLOR
MONITOR PROCESSOR
SEMICONDUCTOR
TECHNICAL DATA
The MC13081X includes all the signal processing functions for a scan
frequency agile and multiple sync system analog RGB monitor and includes
the following functions:
• Automatic Horizontal Frequency Tracking of All Commonly Used
Personal Computers, Continuously Adaptable from 30 kHz to 64 kHz
• Sync–on–Green Detection
•
•
•
•
Vertical Timebase Operates from 45 to 100 Hz
56
Vertical and Horizontal Sync Polarity Detection with Outputs for
Mode Switching
Video Pre–Amplifiers Typical Rise/Fall Time of 5.0 ns at 3.0 Vpp Output
Voltage Swing
Overall Contrast Control and Independent RGB Gain Controls
1
B SUFFIX
PLASTIC SDIP PACKAGE
CASE 859
ORDERING INFORMATION
Device
Operating
Temperature Range
Package
MC13081XB
TA = 0° to +70°C
Plastic SDIP
Video VCC1
30 Channel 3 Clamp
29
Video Gnd 28
Channel 3 Video In 27
31 Channel 3 Emitter Out
Channel 3 Subcontrast 26
32 Channel 3 Collector Out
Channel 2 Video In 25
33 Channel 2 Clamp
Channel 2 Subcontrast 24
34 Channel 2 Emitter Out
Channel 1 Video In 23
N/C
N/C 22
35
36 N/C
37 Channel 2 Collector Out
N/C 21
Channel 1 Subcontrast 20
Brightness 19
38 Channel 1 Clamp
Channel 1 Emitter Out
Contrast 18
39
40 Channel 1 Collector Out
FHIB 17
41 X–Ray Shutdown
FH Switch B 16
Horizontal Drive
42 Horizontal Drive Gnd
43
FH Switch A 14
FHIA 15
Horizontal Drive Width
44
Timebase Gnd 13
45 PD2
46 Horizontal Flyback
48
11
AFC
N/C
5.0 V Reg
Horizontal Freq Control 12
8
9
N/C
47 Video Blanking In
49
7
Composite Video In
PD1 10
50
6
Horizontal TTL Sync
Vertical Ramp Out
51 Vertical Ramp Cap
5
N/C
52
4
Vertical TTL Sync
N/C
53
3
Vertical Hold
Vertical Intergrator Cap
Vertical Size
54 Horizontal Sync Det
2
Vertical Sync Det
56 Timebase VCC2
55 Horizontal Position
1
Vertical Osc Cap
PIN CONNECTIONS
(Top View)
This document contains information on a new product. Specifications and information herein
are
subject to change
without notice.
MOTOROLA
ANALOG
IC DEVICE DATA
 Motorola, Inc. 1996
Rev 0
1
MC13081X
Figure 1. Block Diagram
TTL
TTL
V–Sync H–Sync
4
5
3
CVS
6
V–Sync
Polar Det
53
H–Sync
Polar Det
54
Vert
Ramp Cap
51
Vert
Size
52
Vert
Ramp
48
10 KΩ
Vertical
Oscillator
Sync Source Decoder
and Polarity Control
Vert Integrator Cap
Vosc Vert Hold
2
1
Vertical Ramp
Generator
VCC
47
Blanking
H–Sync
V–Sync
55
Hori Position Adjust
5 Count Latch
Phase
Detector
1
46
Ramp 1
Blanking
H–Flyback
45
PD2F
2
PD1F
10
Phase Detector
Down
X1
64 H
Up
Digital Horizontal
Lock Control
#1 Ramp
Generator
43
Horizontal
Driver
1/8 Line
Shift
Timebase Gnd
41
11
AFC
64 Divider and
Clamp Pulse Decoder
X–Ray
#2 Ramp
Generator
X–Ray Shutdown
3
Ramp 2
44
H–Drive Width Adjust
12
64x Oscillator
Hori Freq Control
29
Video VCC
56
Timebase VCC
+5.0 V Output
Channel 1
9
40
5 V Regulator
13
39
14
38
15
20
Timebase Gnd
Collector Out
Emitter Out
Clamp
FHA Switch
FHA Threshold
H–Drive
42
Subcontrast
16
Channel 2
FHB Switch
37
Collector Out
17
FHB Threshold
Channel 1 Video In
34
Clamp
Pulse Position
23
33
Emitter Out
Clamp
24
Subcontrast
SOG Detector
Channel 3
25
Channel 2 Video In
32
31
27
Channel 3 Video In
Collector Out
Emitter Out
30
Clamp
18
Contrast
19
Brightness
26
Brightness and
Contrast Processor
Subcontrast
28
Video Gnd
This device contains 1074 active transistors.
2
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
MAXIMUM RATINGS (TA = 25°C, unless otherwise noted.)
Rating
Pin
Value
Power Supply Voltage
Video Section VCC1
Timebase Section VCC2
29
56
–0.5, +10
–0.5, +10
19, 18, 46,
14, 16
0 to VCC
Vdc
41
–0.5, +0.9
Vdc
20, 24, 26
0 to +2.0
Vdc
44, 55
0 to +5.0
Vdc
43, 4, 5, 6,
32, 37, 40
–0.5 to
VCC + 0.5
Vdc
43
100
mA
14, 16
30
mA
Video Amplifier Inputs
23, 25, 27
–0.5, + 5.0
Vdc
Video Amplifier Output Current (Total for the
Three Channels)
40, 39, 37,
34, 32, 31
120
mA
Storage Temperature
–
–65 to +150
°C
Junction Temperature
–
+150
°C
Vdc
Brightness, Contrast, Horizontal Flyback
Input, Frequency Switch when Off
X–Ray Shutdown
Subcontrast RGB Controls
Horizontal Drive Width, Horizontal Position
Voltage on Horizontal Drive when Off, Vertical
TTL Sync Input, Horizontal TTL Sync Input,
Composite Video Sync Input, Video Amplifier
Output Collectors
Current into Horizontal Drive when On
Current into Frequency Switch when On
NOTE:
Unit
ESD data available upon request.
RECOMMENDED OPERATING CONDITIONS
Characteristic
Pin
Min
Typ
Max
Power Supply Voltage
Video Section VCC1
Timebase Section VCC2
29
56
7.6
7.6
8.0
8.0
8.4
8.4
Power Supply Voltage Difference, VCC2 – VCC1
–
–0.3
0
0.8
Vdc
Internal 5.0 V Regulator Output Current
9
–20
–
0
mA
Contrast Control
18
0
–
5.0
Vdc
Brightness Control
19
0
–
5.0
Vdc
20, 24, 26
0
–
2.0
Vdc
Horizontal Drive Width Adjust
44
0
–
5.0
Vdc
Horizontal Position Adjust
55
1.0
–
4.0
Vdc
Horizontal Flyback Signal Amplitude
46
0.7
5.0
8.0
V
Horizontal Flyback Signal DC Input Voltage Level
46
–0.2
0
–
Vdc
Voltage on Horizontal Drive Collector when “Off”
43
0
–
VCC
V
Current into Horizontal Drive Collector when “On”
43
0
–
40
mA
Voltage on Horizontal Drive Emitter W.R.T. Circuit Ground
42
–0.3
0
2.0
Vdc
Subcontrast Control
Blanking Input Signal Amplitude
Unit
Vdc
47
1.5
–
4.0
V
Voltage on FH Switches when “Off”
14, 16
0
–
8.0
Vdc
Current into each FH Switch when “On”
14, 16
0
–
20
mA
X–Ray Shutdown
41
0
–
0.7
Vdc
Composite Video Sync Input
6
1.0
–
2.0
Vpp
Vertical Sync Frequency
–
45
–
100
Hz
Horizontal Sync Frequency
–
30
–
64
kHz
Vertical Sync Pulse Width
–
–
70
–
µs
Horizontal Sync Pulse Width
–
–
1.0
–
µs
MOTOROLA ANALOG IC DEVICE DATA
3
MC13081X
RECOMMENDED OPERATING CONDITIONS (continued)
Characteristic
Pin
Min
Typ
Max
Unit
Video Signal Amplitude (with 75 Ω Termination)
23, 25, 27
0.5
0.7
1.2
Vpp
Voltage on Video Amplifier Collector
32, 37, 40
4.5
–
VCC
Vdc
Current Through Video Collector–Emitter
40, 39, 37
34, 32, 31
0
–
40
mA
Vertical Hold Set Resistance, R9 + VR2 (Figure 2)
2
–
10
–
kΩ
Vertical Size Set Resistance, R10 + VR3 (Figure 2)
52
–
220
–
kΩ
Vertical Linearity Set Resistance, R12 + VR4 (Figure 2)
51
–
1000
–
kΩ
Operating Ambient Temperature
–
0
25
70
°C
FH Switches Set Resistance
15, 17
See Application Section 5
–
Vertical TTL Sync Input
4
TTL Voltage Level
Vdc
Horizontal TTL Sync Input
5
TTL Voltage Level
Vdc
ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 8.0 Vdc)
Characteristic
Condition
Pin
Min
Typ
Max
Unit
–
29, 56
70
85
110
mA
4.75
–
–
–
5.0
25
100
–0.3
5.25
–
–
–
Vdc
mV
mV
mV/°C
59
–
°C/W
POWER SUPPLIES
Supply Current
Total Consumption
5.0 V Regulator
Output Voltage
Line Regulation
Load Regulation
Temperature Coefficient
Thermal Resistance, Junction–to–Ambient
9
Load Current ((IB) = 0 mA
7 6 V < VCC < 8.4
7.6
8 4 V,
V IB = 0 mA
A
–10
10 mA
A < IB < 0 mA
A
–
–
–
HORIZONTAL PROCESSING
Horizontal Oscillator Frequency Range
–
43
30
–
64
kHz
Sink 240 µA from Pin 12 with
Resistor R5 Opened
43
29
31
33
kHz
Horizontal Sync Detector Output/+VE Sync
–
54
–
0
–
Vdc
Horizontal Sync Detector Output/–VE Sync
–
54
–
3.6
–
Vdc
Horizontal Sync Input
Input Impedance
Input Level – Low
Input Level – High
–
5
–
0
2.4
22
–
–
0
0.8
5.0
kΩ
Vdc
Vdc
Composite Video Sync Input
Input Impedance
Internal Bias Level
Minimum Input Amplitude
–
–
–
0.1
1.0
1.55
–
–
–
–
kΩ
Vdc
Vpp
Horizontal Oscillator Free Running
Frequency @ I12 = 240 µA
6
Short Term Horizontal Pull–In Range
Time < 5.0 ms
–
–
±5.0
–
%FH
Long Term Horizontal Pull–In Range
Time > 500 ms
–
30
–
64
kHz
Current Flowing Out of Pin 12
12
115
122
129
Hz/µA
Pin 11 is Opened
–
–
300
–
ppm/°C
–
15, 17
–
–
0
I12/2
5.0
–
–
–
200
µA
V
mV
–
–
200
mVdc
Horizontal Frequency Control (Current
Transfer Constant)
Horizontal Free Running Frequency
Change versus Temperature
FH Switch Threshold Pins
Output Current
Threshold
Hysteresis
FH Switch Voltage when “On”
4
I = 10 mA
14, 16
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
ELECTRICAL CHARACTERISTICS (continued) (TA = 25°C, VCC = 8.0 Vdc)
Characteristic
Condition
Pin
0 < V55 < 5.0 V,
FH = 30 k – 56 kHz
See Application Section 7
55
FH = 35 kHz, 0 < V44 < 5.0 V
44
Min
Typ
Max
Unit
–
–
10
31
–
–
%
kΩ
2:1
–
–
30
1:2
–
%
kΩ
–
0
–
0.7
–
10
–
8.0
–
V
V
kΩ
0
–
–
–
0.3
100
Vdc
µA
HORIZONTAL DRIVE
Horizontal Position Adjust
Range
Input Impedance
Horizontal Drive Width Adjust
Range
Input Impedance
Horizontal Flyback
Threshold
Input Amplitude
Input Impedance
Horizontal Drive
Output Low
Output High
See Application Section 4
Input Signal Should Not Fall
Below –0.2 V
46
43
Isink = 40 mA
V43 = VCC
Time Delay from Flyback to Video Output
Blanking
See Application Section 7
–
–
250
–
ns
Time Delay from Blanking to Video Output
Blanking
See Application Section 7
–
–
400
–
ns
X–Ray Shutdown
Activate Voltage
See Application Section 11
41
0.4
0.58
0.7
Vdc
–
41
–
–2.3
–
mV/°C
30 kHz < FH < 56 kHz
43
–
3.0
–
ns
45
–
100
Hz
–
–
–
–
–
3.0
1.9
3.4
2.0
0.45
–
–
–
–
1.0
Vpp
V
V
mA
%
Hz/°C
Temperature Coefficient of X–Ray
Threshold Voltage
Horizontal Jitter
VERTICAL PROCESSING
Vertical Ramp Frequency
–
48
FV = 50 Hz,
R12 + VR4 = 820 kΩ
R10 + VR3 =120 kΩ,
C6 = C7 = 1.0 µF
48
Vertical Ramp Free Running Temperature
Drift
FV = 50 Hz
48
–
0.01
–
Vertical Ramp Free Running Drift with VCC
FV = 50 Hz
48
–
0.5
–
Hz/V
Vertical Ramp Discharge Rate (Retrace)
FV = 50 Hz
48
–
9.5
–
V/ms
Vertical Sync Detector Output/+VE Sync
53
–
0
–
Vdc
Vertical Sync Detector Output/–VE Sync
53
–
3.6
–
Vdc
–
0
2.4
22
–
–
–
0.8
5.0
kΩ
Vdc
Vdc
Vertical Ramp
Amplitude
Minimum Peak
Maximum Peak
Output Current
Non–Linearity
Vertical Sync Input
Input Impedance
Input Level – Low
Input Level – High
–
4
VIDEO AMPLIFIERS
Input Impedance
Internal DC Bias Voltage
Output Signal Amplitude
Voltage Gain
Contrast Control
Subcontrast Control
Brightness Control
MOTOROLA ANALOG IC DEVICE DATA
–
23, 25,27
100
–
–
2.4
–
–
kΩ
Vdc
Vin = 0.7 Vpp, V18 = 5.0 V
V20 = V24 = V26 = 0 V
39, 34, 31
–
–
3.6
5.1
–
–
Vpp
V/V
V18 = 0 to 5.0 V;
V20, 24, 26 = 0 V
18
–
20
–
dB
V20, 24, 26 = 2.0 to 0 V;
V18 = 5.0 V
20, 24, 26
1:2.5
–
–
–
V19 = 0 to 5.0 V, Measure
Pin 39, 34, 31 DC Level
19
–
±0.5
–
Vdc
5
MC13081X
ELECTRICAL CHARACTERISTICS (continued) (TA = 25°C, VCC = 8.0 Vdc)
Characteristic
Condition
Pin
Min
Typ
Max
–
1.25
–
1.0
1.5
2.0
–
1.75
–
Unit
VIDEO AMPLIFIERS
Emitter DC Level
Minimum Brightness
Nominal Brightness
Maximum Brightness
39, 34, 31
V19 = 0 V
V19 = 2.5 V
V19 = 5.0 V
Crosstalk, Amplifier to Amplifier
Output
p Rise Time
Output Fall Time
Vdc
Frequency = 10 MHz
39, 34, 31
–
34
–
dB
Vin = 0.7 Vpp;
pp; Vout = 3.0 Vpp
pp
39,, 34,, 31
–
–
5.0
5.0
–
–
ns
PIN FUNCTION DESCRIPTION
Pin
1
Name
Equivalent Internal Circuit
Vertical
Oscillator
Capacitor
VCC
2.5 k
I2
1.0 k
5.0 V
2
Vertical Hold
Control
2
Vertical
Ramp Gen
I2
21.3
Switching
Control
C1
Vertical
Integrator
Capacitor
1.0 k
This capacitor should be 100 nF film type to give good
temperature stability.
The potentiometer at Pin 2 adjusts the free running
frequency of the oscillator. It should normally be set
for about 55 Hz with no vertical signal input such that
it will lock to 60 Hz.
The capacitor on this pin integrates the sync pulses
with a long time constant. C3 is typically 0.01 µF.
VCC
ICIS
3
Switching
Control
ISID
C3
4
I2
10.7
1
R2
3
Description
Vertical TTL
Sync
Vertical TTL Sync input. The input threshold voltage
at this pin is 2.0 V.
2.0 V
5.0 V
Sync
Input
5
22 k
4
To Logic
10 k
Horizontal TTL
Sync
Composite or Horizontal TTL Sync input. The input
threshold voltage at this pin is 2.0 V.
2.0 V
5.0 V
Sync
Input
6
22 k
5
To Logic
10 k
Composite
Video Input
5.0 V
This pin requires a coupling of min 100 nF. The
composite sync input should consist of –VE sync
signal only with amplitude > 500 mVpp.
To Sync
Separator
The source impedance of the sync signal should be
<1.0 kΩ.
10 k
Comp
Input
6
0.1
1.0 k
1.0 k
68 k
Sync information at Pin 5 will override this pin, but
signals at Pin 4 will not.
Minimum pulse width is 2.0 µs.
7, 8
6
N/C
These two pins are internally connected to each other,
and nothing else.
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
PIN FUNCTION DESCRIPTION (continued)
Pin
9
Name
Equivalent Internal Circuit
5.0 V
Regulator
Output
Description
5.0 V (±5%) regulator. Minimum 10 µF capacitor is
required for noise filtering and compensation. Up to
20 mA can be supplied to external circuitry. It can
source but not sink current. Output impedance is
≈ 10 Ω.
VCC
Band Gap
Regulator
9
5.0 V
10 µF
R
10
Phase
Detector 1
Filter
This 5.0 V regulator is recommended for use as a
reference only.
0.8 R
External components at this pin will determine the
PLL gain and phase characteristics. The capacitors
should be non–polarized.
400 µA
C10A
10
Phase
Detector #1
5.0 V
400 µA
11
Automatic
Frequency
Control
11
From
Pin 10
64x
Oscillator
12
R10 C10B
Horiz
OSC
Sync
VCC
R11A
The voltage at this pin nominally ranges from 1.5 V to
5.0 V with corresponding horizontal frequency from
25 kHz to 68 kHz.
Pin 11 is a buffered equivalent of Pin 10, and ranges
from a minimum of 1.5 V at horizontal high frequency
to near 5.0 V at low frequency. Pin 11 can sink a
maximum of 1.0 mA, but cannot source current.
R11B
5.0 V
Horizontal
Frequency
Range
The current out of Pin 12 determines the horizontal
frequency by a current transfer constant of
≈ 122 Hz/µA.
12
R11C
Pin 12 is internally maintained at 5.0 V.
13
14, 16
Timebase
Ground
Ground for the timebase section. Connect to a clean,
low impedance ground.
FH Switch A, B
Pin 14 (Switch A), and Pin 16 (Switch B) are open
collector NPN switches to ground. Each switch is
“on” when the horizontal frequency is higher than the
set points set by resistors at Pins 15 and 17,
respectively.
14
16
Maximum voltage is 8.0 V, and maximum sink
current is 20 mA.
15, 17
FH Switch A, B
Threshold
Setting
Pin 15 and Pin 17 are current mirror at 1/2 of Pin 12
current. External resistors at these pins set the
horizontal frequency at which Pins 14 and 16 will
switch, respectively. The threshold voltage is 5.0 V.
VCC
I12
2
1.0 k
15,17
To Output
Switches
3.0 k
R15
(R17)
5.0 V
18
VCC
Contrast
Control
The input control range is from 0 to 5.0 V. An increase
of voltage increases contrast.
50 k
5.0 V
19
Brightness
Control
R18
(R19)
MOTOROLA ANALOG IC DEVICE DATA
18,19
The input control range is from 0 to 5.0 V. An increase
of voltage increases brightness.
7
MC13081X
PIN FUNCTION DESCRIPTION (continued)
Pin
20
24
26
Name
Equivalent Internal Circuit
Subcontrast
Control
Ch
l1
Channel
Channel 2
Channel 3
Description
Subcontrast controls the gain of each video channel.
0 V for maximum gain, and 2.0 V for minimum gain.
VCC
Gain
50 k
20, 24, 26
7.5 k
21, 22
23
25
27
N/C
These two pins are internally connected to each other,
and nothing else.
Video Inputs
Channel 1
Channel 2
Channel 3
The input coupling capacitor is used for input clamp
storage. The maximum source impedance is 100 Ω.
Polarity of the input video signal is positive. Amplitude
should be nominally 0.7 Vpp.
Clamp
2.4 V
Video
Input
5.0 V
2.2 µF 23, 25, 27
75 Ω
2.7 k
6.2 k
28
Video Ground
Ground for the video section (video amplifiers,
contrast and brightness controls, subcontrast, and
video reference voltage).
Noise from the timebase section, and other digital
circuits, should not be allowed to produce ground
bounce at this pin.
29
Video VCC1
38
33
30
Video Clamp
Channel 1
Channel 2
Channel 3
39
34
31
Video Emitter
Output
Channel 1
C
Channel
2
Channel 3
40
37
32
Video Collector
Output
Channel 1
Channel 2
Channel 3
35, 36
8
N/C
Connected to a 8.0, V ±5%, dc supply. Decoupling is
required at this pin.
Normally a 100 nF capacitor is connected to each of
these pins.
pins
Clampp Pulse
38, 33, 30
1.5 V
Video Out
VCC
VCC
Blanking
40, 37, 32
Rc
Video Amp
To
Clamp Circuit
The emitter dc voltage
g is controlled by
y the brightness
g
control.l
The currentt through
Th
th
h each
h collector
ll t and
d emitter
itt should
h ld
not exceed 40 mA.
39, 34, 31
B
Brightness
i ht
Contrast
Pins 39, 34, and 31 are the emitter outputs of the
three video amplifier
amplifier, and have an internal 33 Ω
resistor.
Re
R
These two pins are internally connected to each other,
and nothing else.
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
PIN FUNCTION DESCRIPTION (continued)
Pin
Name
41
X–Ray
Shutdown
Equivalent Internal Circuit
Description
If the voltage at this pin is > 0.58 V, the horizontal driver
device (Pins 42 and 43) will be “on” until power is
removed, or the voltage on this pin is taken below 0.4 V.
5.0 V
47 k
41
X–Ray
Shutdown
42
Horizontal
Drive Ground
This emitter pin must be connected externally to a low
impedance ground.
VCC
2.7 k
43
43
Horizontal
Drive
44
Horizontal
Drive Width
R43
42
VCC
Pin 43 is an open collector pin and normally is pulled
up by a resistor to VCC.
To Horizontal
Deflection
Circuit
Varying the voltage at this pin will change the
horizontal drive duty cycle.
5.0 V
5.0 V
As the voltage of this pin is increased, the “on” time at
Pin 43 is decreased.
24 k
44
22 k
Ramp 2
R44
Maximum current through Pins 42 and 43 must be
less than 40 mA.
Input impedance is ≈ 30 kΩ.
13.5 k
45
Secondary
Phase
Detector Filter
Typically a 10 to 100 nF decoupling capacitor is
connected to this pin.
VCC
250 µA
45
Phase
Detector #2
250 µA
Sync
46
Horizontal
Flyback
Flyback
Signal
C45
Horiz
OSC
46
10 k
To Phase
Detector #2
The flyback signal should be a +VE pulse of peak
voltage 8.0 V. The internal switching voltage is 0.7 V
and it controls the secondary PLL
Input impedance is ≈ 10 kΩ
0.7 V
47
Video Blanking
Input
47
Blanking
The video blanking signal should be positive pulse in
the range of 1.5 to 4.0 V.
2.0 k
20 k
MOTOROLA ANALOG IC DEVICE DATA
9
MC13081X
PIN FUNCTION DESCRIPTION (continued)
Pin
Name
48
Vertical Ramp
Output
Equivalent Internal Circuit
2.0 V, 5.0 V
Trip Pts
Description
This ramp signal drives the external vertical output
devices.
VCC
10 k
Vertical
Oscillator
To Vertical
Deflection
Circuit
48
Vertical
Ramp Generator
49, 50
51
Loading on this pin must be > 30 kΩ to avoid
distorting or clipping the ramp.
N/C
Vertical Ramp
Capacitor
These two pins are internally connected to each other,
and nothing else.
I
VCC
I
2
5.7
The slope of the output ramp is determined by the
components at Pins 51 and 52.
Ramp Output
Buffer
1.0 k
200
52
Voltage ramps from 2.0 V to less than 5.0 V,
depending on frequency and components at Pins 51
and 52.
Switching
Control
Vertical
Oscillator
Vertical Size
Control
52
The resistor at Pin 52 sets the charging current of the
capacitor, and therfore the vertical height of the
picture.
The linearity of the ramp can be modified by external
feedback.
51
C51
53
Vertical Sync
Polarity
Detector
54
Horizontal
Sync Polarity
Detector
55
Horizontal
Position
Control
The output goes low when the vertical sync input
polarity is positive. It goes high when the vertical sync
input polarity is negative.
5.0 V
53 54
53,
The output goes low when the horizontal sync input
polarity is positive. It goes high when the horizontal
sync input polarity is negative.
Varying the voltage at this pin will change the
horizontal position of the picture.
5.0 V
5.0 V
55
15 k
25 k
R55
Input impedance is ≈ 31 kΩ.
Ramp 1
10 k
56
10
Timebase
VCC2
Connected to a 8.0 V, ±5%, dc supply. Decoupling is
required at this pin.
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
APPLICATION INFORMATION
amplitude, and minimum free running frequency in the
absence of sync signal.
The video section has three 70 MHz bandwidth
pre–amplifiers. The outputs of these amplifiers are
uncommitted collector/emitter facilitating cascode
configuration with subsequent stages. Controls include
brightness and contrast. In addition, the voltage gain of each
amplifier can be adjusted individually which provides
flexibility in adjusting color correctness. Blanking and
clamping signals are provided to the amplifiers internally from
the timebase section. Additionally, a blanking signal can also
be supplied externally.
Separate power supply and ground pins are provided to
the timebase and video section in order to minimize the cross
interference between these two sections.
The MC13081X is an integrated multisync color monitor
processor. It combines horizontal/vertical deflection processing
circuitry and video pre–amplifiers into a single device.
The overall timebase section consists of two parts:
horizontal and vertical. The horizontal timebase can be
operated from 30 kHz to 64 kHz, and can be driven from TTL
separate sync, composite sync, or a composite video signal.
There are two PLLs which ensure proper timing throughout
the whole system. The first PLL provides line locking of the
horizontal sync signal with the built–in oscillator, while the
second one maintains fixed timing with the horizontal flyback
signal such that a stable display can be achieved.
The vertical timebase section operates from 45 Hz to
100 Hz, and can receive various sync signals as the
horizontal one does. This section consists of an oscillator and
a ramp generator. Adjustments include linearity, ramp
Figure 2. Application Circuit
5.0 Vref
5
H–Sync
C1
23
C2
25
R
G
27
C3
B
44
55
46
43
Video
VCC1
Timebase
VCC2
Channel 1 Emitter Out
R2
Channel 1 Clamp
Channel 1 Video In
Channel 2 Emitter Out
Channel 3 Video In
Channel 2 Clamp
10
9
C10
R16
24
20
26
18
Composite Video In
6
19
5.0 Vref 5.0 Vref
C11
Vd
R7
VR7
R15
R8
C13
8.0 Vdc
L2
Va
Vd
C28
C29
C12
R1–R3,R17
R4–R6
R7
R8
R9
R10
R12
R13
R14
R15
R16
R18
R19–R21
MOTOROLA ANALOG IC DEVICE DATA
VR8
C14
75 Ω
15 kΩ
3.9 MΩ
6.8 MΩ
8.2 kΩ
220 kΩ
220 kΩ
2.2 kΩ
470 Ω
5.6 kΩ
5.1 kΩ
10 kΩ
330 Ω
VR9
C15
Channel 2 Collector Out
13
R20
33
C23
R21
30
42
C19
VR10
VR11
C18
R17
45
Va
40
37
32
PD2
X–Ray
Shutdown
Channel 3 Collector Out
Horizontal
Drive Gnd
Timebase Gnd
PD1
5.0 V Reg
R6
Brightness
Horizontal Freq Control
Contrast
12
Channel 1 Collector Out
Channel 3 Subcontrast
Channel 1 Subcontrast
R5
C27
34
C24
AFC
R4
Channel 2 Subcontrast
11
R19
38
Video Gnd
Channel 3 Clamp
C26
Vd
Channel 3 Emitter Out
Vd
C25
56
39
31
28
L1
Va
C22
Channel 2 Video In
R3
VR1
29
Horizontal TTL Sync
MC13081X
R1
Horizontal
Drive
Vertical Ramp Out
Vertical Ramp Cap
Vertical
TTL Sync
47
Horizontal Drive Width
48
51
R14
C9
C7
Horizontal Position
R10
52
Vertical Hold
Vertical
Integrator Cap
Vertical
Osc Cap
V–Sync
2
3
C8
Vertical Size
1
4
R9
C5
C4
VR5
VR4
R12
Vd
Vd
R13
VR6
Horizontal
Flyback
C6
Video Blanking In
VR3
VR2
41
C20
C21
R18
C17
C16
C1–C3
C4,C6–C9,C13–C19,C22–C24,C29
C5,C20
C10
C11
C12
C21
C27
C26,C28
C30,C31
2.2 µF
100 nF
10 nF
1.0 nF
100 nF
22 µF
10 nF
100 µF
47 µF
1.0 µF
L1
L2
50 µH
50 µH
VR1,VR5–VR11
VR2
VR3
VR4
10 kΩ
5.0 kΩ
200 kΩ
1.0 MΩ
11
MC13081X
The following describes a step–by–step procedure in
using the MC13801 for a typical multisync color monitor
chassis; component notations refer to Figure 2.
1. Horizontal Frequency Range Resistor
Network (Pins 11, 12)
FHm = Minimum Horizontal Frequency
FHx = Maximum Horizontal Frequency
Oscillator Transfer Constant = 122 Hz/µA
6.35 x 10 8
R5
F
– F
Hx
Hm
The threshold voltage for Pin 46 is 0.7 V. The blanking
period depends on the amplitude, as shown in Figure 3 (X and
Y, respectively). A larger amplitude provides better
consistency and control of the blanking period.
Figure 3. Voltage for Flyback
+
R6
R4
v VCC1.5– 6.0
+
5
F
Hx
– 3.5
R5
122 x 10 6
V
x R5 and
– 1.5
CC
R4
X
t 1.0 mA
For most applications, R4 = R5 provides the
required results.
NOTE:
In order to compensate device/component tolerance, a
potentiometer is recommended in series with R6, as VR1.
2. Horizontal Frequency Range Phase Detector Filter
Network (Pin 10)
5. Frequency Switch (Pin 14 to 17)
There are two frequency switches available for screen
size compensation for different timing standards. Each
switch will turn on at the switch frequency set with its external
resistor. See Figure 4.
Figure 4. FH Switches
Typical values are:
C10 = 1.0 nF
C11 = 100 nF
R15 = 5.6 k
C11 ≥ 100 x C10
VCC
I12
2
NOTE: C10 and C11 should have less than 1.0 µA leakage.
3. Horizontal Free Running Frequency
The voltage at Pin 10 will be buffered to Pin 11, and
hence control the internal oscillator. In the absence of
horizontal sync signal, the free running horizontal frequency
will vary between preset minimum and maximum horizontal
frequency values.
If an undetermined free running frequency value is not
desired, a large impedance resistor can be used to pull
Pin 10 to VCC or Gnd, and the free running frequency will be
equal to FHm or FHx, respectively.
The free running frequency can also be set to any value
within the horizontal frequency range by using a voltage
divider, as R7 and R8 indicate.
R7
V11
V x
D R7 R8
+
I12
+ R6 V11
) VR1
Free Running Frequency
)
– V11 – 5
5
+ I12 µA x 122µAHz
The above formula provides the ratio of R7 and R8. The
values chosen should be similar to those shown in Figure 2.
4. Horizontal Flyback Input (Pin 46)
The horizontal flyback signal not only provides proper
timing reference for the horizontal drive output, but also
supplies the necessary blanking for the video outputs.
There are two precautions for the flyback input. First, the
signal should have a zero volt reference, and second, the
peak value should be as near to VCC as possible.
12
0.7 V
Y
15, 17
Ra
1.0 k
3.0 k
5.0 V
Rb
The switch frequency is calculated as follow:
SF
+ Switch Frequency
SF
x 10 6
+ 5 x 2Rax 122
) Rb
In considering the ratio of Ra to Rb, the following
parameters, and their tolerances, need to be clarified:
1. Iosc
±10%
2. 5.0 Vref
±5%
3. Vhys
±5%
4. Ra, Rb
±?%
Internally, the lock–in horizontal frequency will build up a
current reference, and half of this current reference is used
for setting up a voltage and then compared with the internal
5.0 Vref. Looking at the four parameters above, the first three
are IC related, while the last item depends on the external
component tolerance.
By adding up the first three items, the value of Ra and Rb
should be chosen to compensate for about 20% of system
tolerance.
Therefore, if Ra is chosen to be 70% of the calculated
value (Ra + Rb), Rb should be 60% of (Ra + Rb). That
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
means, the overall adjustment is about 70% to 130%, which
provides additional ±10% margin.
During normal operation, the frequency switch will switch
“off” when the pin voltage falls 60 mV below the 5.0 V
reference voltage (≈ 4.94 V), and will switch “on” when the pin
voltage rises to 40 mV above the 5.0 V reference (≈ 5.04 V).
This function is particularly useful for high frequency scan
rates. The higher the frequency, the more significant the
storage time becomes, compared to the horizontal scan time.
Figure 5.
An Example: Require Trip Point @ 35 kHz
I12
+
Trip Point Reference Current
Ra
H–Sync
35 x 10 3 µA
122
) Rb +
+ I122
+ 12235 xk 2
H–Drive
Without
Shift
µA
X
5.0 V
35 k µA
122 x 2
+ 34857 Ω
Hysteresis @ 35 kHz + 5.04 – 4.94 V
34857 Ω
[ 350 Hz
x 122 Hz
µA
From above, Ra + Rb = 34857 Ω
Select Ra = 24 k, and Rb = 20 k Trim Pot
The Temperature Coefficient of the potentiometer can also
be considered. If the value of the potentiometer and Ra vary
by 1% (for example) over temperature, the error would be:
5 x
NJ
Nj
1
1
–
x 122 Hz
34857 x 1.01
34857 x 0.99
µA
[ 350 Hz
6. Horizontal Position Compensation for Selected Scan
Frequency in Using FHA Switch
Refering to Figure1 (block diagram), there is an output
from the FHA switch to the horizontal drive output. When the
FHA switch is switched on, at a specified horizontal
frequency, there is a 1/8th horizontal line shift of H–Ramp1.
Referring to Figures 5 and 9, a shift of H–Ramp1 will result in
a shift of the H–Drive output timing with respect to flyback
input.
The exact H–Drive output shift will be determined by the
PD2 voltage (Pin 45), which is generated by the flyback input
and the internal Comp1 output. That is related to the H–Drive
output transistor storage time.
MOTOROLA ANALOG IC DEVICE DATA
H–Drive
With FHA
On
To Be Determined
By Application
7. Proper Horizontal Phase Control
The horizontal adjustment range depends on the phase
angle between the H–Sync signal and the horizontal flyback
input. In reality, the actual adjustment range is a
combination of horizontal frequency, front porch/back porch
timing, flyback pulse width, and horizontal output transistor
storage time. The following paragraph conveys the concept
for normal operation.
There are two clamping situations for video signals. In
case 1, separate VTTL and HTTL sync are provided, the
video signal is clamped at sync tip, and the dc voltage built up
is used for black level reference. In this instance, the clamp
pulse has the same pulse width as H–Sync, and nearly the
same position. This clamp pulse is blanked out internally. In
order to allow the video output to complete the blanking
action during horizontal retrace, the horizontal phase should
not be over–adjusted. See Figure 6 for a pictorial perception.
Accordingly, the total horizontal position adjustment range is
calculated as the sum of ∆t1 and ∆t2.
Should the phase of horizontal flyback/H–Sync move
further left or right from the normal adjustment range, the black
level reference voltage will be restored, and consequently a
slightly brighter than screen dark region will be observed
on–screen. See Figure 7 for pictorial explanation.
Horizontal Blanking Time
+ FPtime ) Sync Width
+ BPtime = THB
Criterion for Normal Operation:
|Dt1|
t THB
2
|Dt2|
t THB
2
In other words, the left/right 0.7 V threshold flyback
reference should be within the H–Sync pulse (shaded area
of Figure 6).
13
MC13081X
Figure 6. Horizontal Position Adjustment at Normal Operation
HTTL Sync
A
H–Sync Width
∆t2
∆t1
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Flyback Threshold = 0.7 V
B
Flyback Pulse Width
Video Output
C
Blanking Width
Video Output
Black Level Ref
0V
14
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
Figure 7. Horizontal Position Adjustment at Overscan Operation
HTTL Sync
Flyback Threshold = 0.7 V
Video Output
X
Blanking Width
Flyback Threshold = 0.7 V
Video Output
X
NOTE:
Black Level Ref
0 Vref
Region X will appear as bright vertical stripe.
MOTOROLA ANALOG IC DEVICE DATA
15
MC13081X
Figure 8.
Video Input
Clamp Pulse Position
Flyback Threshold = 0.7 V
Video Output
Black Level Ref
Blanking Width
In case 2, composite sync is used instead of VTTL and
HTTL sync, the clamp pulse is located at the backporch of
the video signal, and the width of the clamp pulse is
calculated as follows:
1
Clamp Pulse Width
x 3
64 x Line Frequency
+
Blanking Width = Sync Width + Clamp Pulse Width
+ Flyback Threshold (0.7 V) (See Figure 8)
From the above diagram, it can be seen that the horizontal
position adjustment is basically the same as case 1 except
slightly wider with the addition of clamp pulse blanking.
8. Horizontal Timing Relationship for Phase Detector 2
The following paragraphs explain the PLL2 mechanism.
Figure 9 portrays the timing signals of various parts of the IC.
In using the H–Sync pulse, which is generated from PLL1,
a horizontal ramp 1 signal is created. H–Ramp1 starts at
16
1/4th line before H–Sync and the ramping slope is directly
proportional to horizontal frequency. The lower tip of this
ramp is at approximately 1.2 V, and the amplitude is about
4.2 V. By adjusting the dc bias to the H–Phase control, a
pulse waveform is derived from this H–Ramp1.
A phase detector is used to compare the phase between
the pulse generated above, and the incoming flyback pulse.
An integrating capacitor is applied to generate a dc voltage.
This dc voltage, PD2F output, is used to slice the H–Ramp1
signal in order to generate Comp2 output pulse.
A second ramp signal, H–Ramp2, is triggered from this
Comp2 output. By applying a dc voltage (H–Width control) to
H–Ramp2, the Comp3 output pulses are generated.
The H–Drive output is formed by the rising edge of Comp2
output and the rising edge of Comp3 output.
It can be seen from Figure 9, if the H–Phase control is over
or under driven, it will reach the upper/lower tip of H–Ramp1,
and thus PLL2 will be disturbed.
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
Figure 9. Horizontal Timing for PLL2 Internal Sections
1/4 H
1/2 H
H–Sync
4.2 V
H–Phase
PD2 Output
H–Ramp1
1.2 V
H–Flyback
Comp1 Output
Comp2 Output
H Pulse Width
H–Ramp2
Comp3 Output
H–Drive
MOTOROLA ANALOG IC DEVICE DATA
17
MC13081X
Figure 10. Vertical Section
Free Running V–Ramp
Vert Sync Pulse
1/4 V
3/4 V
Vert Oscillator
Vert Ramp Output
9. Vertical Frequency Range (Pins 48, 51, 52)
The MC13081X vertical oscillator is an injection–lock
type. The device can handle vertical frequency from 45 Hz
to 100 Hz.
The internal ramp generator will generate a ramp output in
the absence of a V–Sync signal. Upon receiving an external
vertical sync pulse, the ramp up portion is forced to retrace,
and therefore, the vertical ramp output is synchronized with
incoming V–Sync.
The slope of the Vertical Ramp output is directly
proportional to the current flowing out of Pin 52. Half of this
current is used to charge up the Vertical Ramp Capacitor. As
the charging current is increased, so does the ramp slope.
External feedback can be provided from Pin 48 to Pins 51
and 52 for linearity adjustment.
10. Vertical Free Running Frequency (Pins 1, 2)
The purpose of the vertical oscillator is to maintain a
vertical ramp to the deflection circuitry in the event the
vertical sync is not present. Because of the injection–lock
type, the free running frequency must be lower than the
system’s lowest vertical frequency.
While various combinations of C4 and R9 can produce a
given frequency, it is recommended C4 be 0.1 µF in order to
obtain practical values for R9. The free running frequency
should be set at about 10% lower than the minimum
operating vertical frequency (54 Hz for a 60 Hz system).
R9 is then calculated from:
V
– 1.4
CC
R9
– 2.5 k
96 x C4 x FV
Connecting a potentiometer, (VR2) provides “Vertical
Hold” adjustment.
+
18
11. X–Ray Shutdown Protection (Pin 41)
The X–Ray input (Pin 41) permits shutting off the
horizontal drive, usually by external circuitry which monitors
faults within the high voltage supply, such as excess anode
current. This input is activated by taking it above ≈ 0.6 V
which causes the drive transistor at Pin 43 to be turned on
(low) permanently by an internal latch.
An external resistor must be connected to Pin 41 to limit
the input current, and to assist with the latching action (see
Figure 11). 10 kΩ is a typical value, but the value can be
chosen based on the specifies of the driving circuit. The
external resistor reduces the sensitivity of Pin 41 to noise and
transients which may otherwise result in false latches.
To resume normal operation (after correction of the fault),
lower Pin 41 below 0.4 V. If the external circuit’s normal
operation does not take it below 0.4 V, but does take it below
0.6 V, then recycle VCC “off”–“on”. If the pin is not used, it
must be connected to ground.
The minimum holding current to keep the latch on is
≈ 70 µA, while the minimum turn–on current is ≈ 0.4 µA.
Figure 11. X–Ray Shutdown Circuit
5.0 V
H–Drive
Shutdown
47 k
X–Ray
Shutdown
10 k
41
MOTOROLA ANALOG IC DEVICE DATA
MC13081X
OUTLINE DIMENSIONS
B SUFFIX
PLASTIC SDIP PACKAGE
CASE 859–01
ISSUE O
NOTES:
1. DIMENSIONS AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH. MAXIMUM MOLD FLASH 0.25 (0.010).
-A56
29
-B1
DIM
A
B
C
D
E
F
G
H
J
K
L
M
N
L
28
H
C
-TSEATING
PLANE
K
D 56 PL
0.25 (0.010)
N
G
F
E
M
T A
S
MOTOROLA ANALOG IC DEVICE DATA
0.25 (0.010)
M
INCHES
MIN
MAX
2.035 2.065
0.540 0.560
0.155 0.200
0.014 0.022
0.035 BSC
0.032 0.046
0.070 BSC
0.300 BSC
0.008 0.015
0.115 0.135
0.600 BSC
0°
15°
0.020 0.040
MILLIMETERS
MIN
MAX
51.69
52.45
13.72
14.22
3.94
5.08
0.36
0.56
0.89 BSC
0.81
1.17
1.778 BSC
7.62 BSC
0.20
0.38
2.92
3.43
15.24 BSC
0°
15°
0.51
1.02
M
J 56 PL
T B S
19
MC13081X
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
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20
◊
MOTOROLA ANALOG IC DEVICE DATA
*MC13081X/D*
MC13081X/D