TI TPS76850QPWP

TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
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SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
FEATURES
•
•
•
•
•
•
•
•
•
PWP PACKAGE
(TOP VIEW)
1 A Low-Dropout Voltage Regulator
Available in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V,
3.0-V, 3.3-V, 5.0-V Fixed Output and
Adjustable Versions
Dropout Voltage Down to 230 mV at 1 A
(TPS76850)
Ultralow 85 µA Typical Quiescent Current
Fast Transient Response
2% Tolerance Over Specified Conditions for
Fixed-Output Versions
Open Drain Power Good (See TPS767xx for
Power-On Reset With 200-ms Delay Option)
8-Pin SOIC and 20-Pin TSSOP (PWP) Package
Thermal Shutdown Protection
GND/HSINK
GND/HSINK
GND
NC
EN
IN
IN
NC
GND/HSINK
GND/HSINK
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
GND/HSINK
GND/HSINK
NC
NC
PG
FB/NC
OUT
OUT
GND/HSINK
GND/HSINK
NC − No internal connection
D PACKAGE
(TOP VIEW)
DESCRIPTION
GND
EN
IN
IN
This device is designed to have a fast transient
response and be stable with 10µF low ESR capacitors. This combination provides high performance at a
reasonable cost.
TPS76833
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
1
8
2
7
3
6
4
5
PG
FB/NC
OUT
OUT
LOAD TRANSIENT RESPONSE
103
102
101
∆ VO - Change in
Output Voltage - mV
100
IO = 1 A
Co = 10 µF
TA = 25°C
50
0
-50
-100
IO = 10 mA
100
I O - Output Current - A
VDO - Dropout Voltage - mV
1
10-1
IO = 0
Co = 10 µF
10-2
-60 -40
-20
0
20
40
60
80 100 120 140
TA - Free-Air Temperature - °C
1
0.5
0
0
100 200 300 400 500 600 700 800 900 1000
t - Time - µs
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2004, Texas Instruments Incorporated
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
DESCRIPTION (CONTINUED)
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 230 mV at
an output current of 1 A for the TPS76850) and is directly proportional to the output current. Additionally, since
the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output
loading (typically 85 µA over the full range of output current, 0 mA to 1 A). These two key specifications yield a
significant improvement in operating life for battery-powered systems. This LDO family also features a sleep
mode; applying a TTL high signal to EN (enable) shuts down the regulator, reducing the quiescent current to less
than 1 µA at TJ = 25°C.
Power good (PG) is an active high output, which can be used to implement a power-on reset or a low-battery
indicator.
The TPS768xx is offered in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V, 3.3-V, and 5.0-V fixed-voltage versions and
in an adjustable version (programmable over the range of 1.2 V to 5.5 V). Output voltage tolerance is specified
as a maximum of 2% over line, load, and temperature ranges. The TPS768xx family is available in 8-pin SOIC
and 20-pin PWP packages.
AVAILABLE OPTIONS
TJ
TYP
TSSOP (PWP)
SOIC (D)
5.0
TPS76850Q
TPS76850Q
3.3
TPS76833Q
TPS76833Q
3.0
TPS76830Q
TPS76830Q
2.8
TPS76828Q
TPS76828Q
2.7
TPS76827Q
TPS76827Q
2.5
TPS76825Q
TPS76825Q
1.8
TPS76818Q
TPS76818Q
1.5
TPS76815Q
TPS76815Q
Adjustable 1.2 V to 5.5 V
TPS76801Q
TPS76801Q
40°C to 125°C
(1)
PACKAGED DEVICES (1)
OUTPUT VOLTAGE (V)
The TPS76801 is programmable using an external resistor divider (see application information). The D and PWP packages are available
taped and reeled. Add an R suffix to the device type (e.g., TPS76801QDR).
TPS768xx
VI
6
IN
PG
16
PG
7
IN
OUT
0.1 µF
5
EN
OUT
14
VO
13
+
GND
Co†
10 µF
3
†
See application information section for capacitor selection details.
Figure 1. Typical Application Configuration (For Fixed Output Options)
2
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
FUNCTIONAL BLOCK DIAGRAM—Adjustable Version
IN
EN
PG
_
+
OUT
+
_
R1
Vref = 1.1834 V
FB/NC
R2
GND
External to the device
FUNCTIONAL BLOCK DIAGRAM—Fixed-Voltage Version
IN
EN
PG
_
+
OUT
+
_
R1
Vref = 1.1834 V
R2
GND
3
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
SOIC PACKAGE
GND
1
EN
2
I
Regulator ground
Enable input
IN
3
I
Input voltage
IN
4
I
Input voltage
OUT
5
O
Regulated output voltage
OUT
6
O
Regulated output voltage
FB/NC
7
I
Feedback input voltage for adjustable device (no connect for fixed options)
PG
8
O
PG output
PWP PACKAGE
GND/HSINK
1
Ground/heatsink
GND/HSINK
2
Ground/heatsink
GND
3
LDO ground
NC
4
EN
5
I
Enable input
IN
6
I
Input
IN
7
I
Input
NC
8
No connect
GND/HSINK
9
Ground/heatsink
GND/HSINK
10
Ground/heatsink
GND/HSINK
11
Ground/heatsink
GND/HSINK
12
Out
13
O
Regulated output voltage
Out
14
O
Regulated output voltage
FB/NC
15
I
Feedback input voltage for adjustable device (no connect for fixed options)
PG
16
O
PG output
NC
17
No connect
NC
18
No connect
GND/HSINK
19
Ground/heatsink
GND/HSINK
20
Ground/heatsink
4
No connect
Ground/heatsink
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
Input voltage range, VI (2)
-0.3 V to 13.5 V
Voltage range at EN
-0.3 V to VI + 0.3 V
Maximum PG voltage
16.5 V
Peak output current
Internally limited
Continuous total power dissipation
See dissipation rating tables
Output voltage, VO (OUT, FB)
7V
Operating junction temperature range, TJ
-40°C to 125°C
Storage temperature range, Tstg
-65°C to 150°C
ESD rating, HBM
2 kV
(1)
(2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network terminal ground.
DISSIPATION RATING TABLE 1 - FREE-AIR TEMPERATURES
PACKAGE
D
AIR FLOW (CFM)
TA < 25°C POWER
RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C POWER
RATING
TA = 85°C POWER
RATING
0
568.18 mW
5.6818 mW/°C
312.5 mW
227.27 mW
250
904.15 mW
9.0415 mW/°C
497.28 mW
361.66 mW
DISSIPATION RATING TABLE 2 - FREE-AIR TEMPERATURES
PACKAGE
PWP (1)
PWP (2)
(1)
(2)
AIR FLOW (CFM)
TA < 25°C POWER
RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C POWER
RATING
TA = 85°C POWER
RATING
0
2.9 W
23.5 mW/°C
1.9 W
1.5 W
300
4.3 W
34.6 mW/°C
2.8 W
2.2 W
0
3W
23.8 mW/°C
1.9 W
1.5 W
300
7.2 W
57.9 mW/°C
4.6 W
3.8 W
This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5-in x 5-in PCB, 1 oz. copper, 2-in x 2-in
coverage (4 in2).
This parameter is measured with the recommended copper heat sink pattern on an 8-layer PCB, 1.5-in x 2-in PCB, 1 oz. copper, with
layers 1, 2, 3, 4, 5, 7, and 8 at 5% coverage (0.9 in2) and layers 3 and 6 at 100% coverage (6 in2). For more information, refer to TI
technical brief SLMA002, available for download at www.ti.com.
RECOMMENDED OPERATING CONDITIONS
Input voltage, VI
(1)
MIN
MAX
UNIT
2.7
10
V
Output voltage range, VO
1.2
5.5
V
Output current, IO (2)
0
1.0
A
40
125
°C
Operating junction temperature, TJ
(1)
(2)
(2)
To calculate the minimum input voltage for your maximum output current, use the following equation: VI(min)= VO(max) + VDO(max load).
Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
device operate under conditions beyond those specified in this table for extended periods of time.
5
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
ELECTRICAL CHARACTERISTICS
over recommended operating free-air temperature range, VI = VO(typ)+ 1 V, IO = 1 mA, EN = 0 V, Co = 10 µF (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
TPS76801
TPS76815
TPS76818
TPS76825
Output voltage (10 µA to 1 A load)
(1)
TPS76827
TPS76828
TPS76830
TPS76833
TPS76850
Quiescent current (GND current) EN = 0V
(1)
(1) (2)
Output voltage line regulation (∆VO/VO)
MIN
5.5 V ≥ VO ≥ 1.5 V, TJ = 25°C
5.5 V ≥ VO ≥ 1.5 V, TJ = -40°C to 125°C
0.98VO
1.764
2.450
2.7
2.744
3.060
3.3
3.234
3.366
5.0
4.900
5.100
85
IO = 1 A, TJ = -40°C to 125°C
125
VO + 1 V < VI≤ 10 V, TJ = 25°C
Load regulation
Output noise voltage (TPS76818)
Output current limit
VO = 0 V
1.2
Thermal shutdown junction temperature
EN = VI, TJ = 25°C, 2.7 V < VI < 10 V
Standby current
2.856
2.940
10 µA < IO < 1 A, TJ = 25°C
BW = 200 Hz to 100 kHz, Co = 10 µF,
IC = 1 A, TJ = 25°C
TPS76801
%/V
3
mV
55
µVrms
1.7
Power supply ripple rejection
PG
(1)
°C
1
µA
2
(2)
6
µA
nA
1.7
V
0.9
f = 1 KHz, Co = 10 µF, TJ = 25°C
60
Minimum input voltage for valid PG
IO(PG) = 300 µA
1.1
Trip threshold voltage
VO decreasing
Hysteresis voltage
Measured at VO
0.5
Output low voltage
VI = 2.7 V, IO(PG) = 1 mA
0.15
Leakage current
V(PG) = 5 V
92
Minimum IN operating voltage is 2.7 V or VO(typ) + 1 V, whichever is greater. Maximum IN voltage 10 V.
V Imax2.7V
Line Reg. (mV) (% V) V O
1000
100
If VO≤ 1.8 V then VImax = 10 V, VImin = 2.7 V:
V ImaxVO1V
Line Reg. (mV) (% V) V O
1000
100
If VO≥ 2.5 V then VImax = 10 V, VImin = VO + 1 V:
A
150
Low level enable input voltage
(1)
2
10
FB = 1.5 V
High level enable input voltage
µA
0.01
EN = VI, TJ = -40°C to 125°C, 2.7 V < VI < 10
V
FB input current
V
3.0
TJ = 25°C, 6 V < VIN < 10 V
TJ = -40°C to 125°C, 6 V < VIN < 10 V
2.754
2.8
TJ = 25°C, 4.3 V < VIN < 10 V
TJ = -40°C to 125°C, 4.3 V < VIN < 10 V
2.550
2.646
TJ = 25°C, 4 V < VIN < 10 V
TJ = -40°C to 125°C, 4 V < VIN < 10 V
1.836
2.5
TJ = 25°C, 3.8 V < VIN < 10 V
TJ = -40°C to 125°C, 3.8 V < VIN < 10 V
1.530
1.8
TJ = 25°C, 3.7 V < VIN < 10 V
TJ = -40°C to 125°C, 3.7 V < VIN < 10 V
1.02VO
1.470
TJ = 25°C, 3.5 V < VIN < 10 V
TJ = -40°C to 125°C, 3.5 V < VIN < 10 V
UNIT
1.5
TJ = 25°C, 2.8 V < VIN < 10 V
TJ = -40°C to 125°C, 2.8 V < VIN < 10 V
MAX
VO
TJ = 25°C, 2.7 V < VIN < 10 V
TJ = -40°C to 125°C, 2.7 V < VIN < 10 V
TYP
V
dB
V
98
%VO
%VO
0.4
V
1
µA
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
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SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
ELECTRICAL CHARACTERISTICS (continued)
over recommended operating free-air temperature range, VI = VO(typ)+ 1 V, IO = 1 mA, EN = 0 V, Co = 10 µF (unless otherwise
noted)
PARAMETER
Input current (EN)
TPS76828
TPS76830
Dropout voltage
(3)
TPS76833
TPS76850
(3)
TEST CONDITIONS
MIN
TYP
MAX
EN = 0 V
1
0
1
EN = VI
1
IO = 1 A, TJ = 25°C
500
825
450
IO = 1 A, TJ = -40°C to 125°C
IO = 1 A, TJ = 25°C
µA
1
IO = 1 A, TJ = -40°C to 125°C
IO = 1 A, TJ = 25°C
UNIT
675
350
IO = 1 A, TJ = -40°C to 125°C
mV
575
IO = 1 A, TJ = 25°C
230
IO = 1 A, TJ = -40°C to 125°C
380
IN voltage equals VO(typ) - 100 mV; TPS76801 output voltage set to 3.3 V nominal with external resistor divider. TPS76815, TPS76818,
TPS76825, and TPS76827 dropout voltage limited by input voltage range limitations (i.e., TPS76830 input voltage needs to drop to 2.9
V for purpose of this test).
Table of Graphs
FIGURE
VO
Output voltage
vs Output current
2, 3, 4
vs Free-air temperature
5, 6, 7
Ground current
vs Free-air temperature
8, 9
Power supply ripple rejection
vs Frequency
10
Output spectral noise density
vs Frequency
11
Input voltage (min)
vs Output voltage
12
Zo
Output impedance
vs Frequency
13
VDO
Dropout voltage
vs Free-air temperature
14
Line transient response
15, 17
Load transient response
VO
16, 18
Output voltage
vs Time
19
Dropout voltage
vs Input voltage
20
Equivalent series resistance (ESR)
vs Output current
22 - 25
7
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS
TPS76833
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
TPS76815
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
3.2835
1.4985
VI = 4.3 V
TA = 25°C
1.4980
3.2825
VO − Output Voltage − V
VO − Output Voltage − V
3.2830
3.2820
3.2815
3.2810
3.2805
1.4970
1.4965
1.4960
1.4950
0
0.1
0.2 0.3 0.4 0.5 0.6 0.7
IO − Output Current − A
0.8
0.9
1
0
0.1
0.2 0.3
0.4
0.5
0.6 0.7
0.8
0.9
1
IO − Output Current − A
Figure 2.
Figure 3.
TPS76825
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
TPS76833
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
2.4960
3.32
VI = 3.5 V
TA = 25°C
2.4955
VI = 4.3 V
3.31
VO − Output Voltage − V
2.4950
VO − Output Voltage − V
1.4975
1.4955
3.2800
2.4945
2.4940
2.4935
2.4930
3.30
3.29
IO = 1 A
IO = 1 mA
3.28
3.27
3.26
2.4925
2.4920
0
0.1 0.2 0.3
0.4 0.5
0.6 0.7
IO − Output Current − A
Figure 4.
8
VI = 2.7 V
TA = 25°C
0.8 0.9
1
3.25
−60 −40 −20
0
20
40
60
80
100 120 140
TA − Free-Air Temperature − °C
Figure 5.
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS (continued)
TPS76815
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
TPS76825
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
1.515
2.515
VI = 3.5 V
VI = 2.7 V
2.510
VO − Output Voltage − V
VO − Output Voltage − V
1.510
1.505
1.500
IO = 1 A
IO = 1 mA
1.495
1.490
2.505
2.500
IO = 1 A
2.495
IO = 1 mA
2.490
2.485
1.485
−60 −40 −20
0
20
40
60
80
2.480
−60 −40
100 120 140
TA − Free-Air Temperature − °C
−20
0
20
40
60
80
100 120
TA − Free-Air Temperature − °C
Figure 6.
Figure 7.
TPS76833
GROUND CURRENT
vs
FREE-AIR TEMPERATURE
TPS76815
GROUND CURRENT
vs
FREE-AIR TEMPERATURE
92
100
VI = 2.7 V
90
VI = 4.3 V
95
86
84
82
IO = 1 mA
80
IO = 1 A
78
IO = 500 mA
76
Ground Current − µ A
Ground Current − µ A
88
90
IO = 1 A
IO = 1 mA
85
IO = 500 mA
80
74
72
−60 −40 −20
0
20
40
60
80
100 120 140
TA − Free-Air Temperature − °C
Figure 8.
75
−60 −40 −20
0
20
40
60
80
100 120 140
TA − Free-Air Temperature − °C
Figure 9.
9
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS (continued)
TPS76833
POWER SUPPLY RIPPLE REJECTION
vs
FREQUENCY
TPS76833
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
10−5
VI = 4.3 V
Co = 10 µF
IO = 1 A
TA = 25°C
80
70
Output Spectral Noise Density − µV Hz
PSRR − Power Supply Ripple Rejection − dB
90
60
50
40
30
20
10
0
−10
10
100
1k
10k
100k
VI = 4.3 V
Co = 10 µF
TA = 25°C
IO = 7 mA
10−6
IO = 1 A
10−7
10−8
102
1M
103
f − Frequency − Hz
Figure 10.
Figure 11.
INPUT VOLTAGE (MIN)
vs
OUTPUT VOLTAGE
TPS76833
OUTPUT IMPEDANCE
vs
FREQUENCY
0
VI = 4.3 V
Co = 10 µF
TA = 25°C
IO = 1 A
Zo − Output Impedance − Ω
VI − Input Voltage (Min) − V
TA = 25°C
TA = 125°C
3
TA = −40°C
2.7
1.75
2
2.25
2.5
2.75
VO − Output Voltage − V
Figure 12.
10
105
f − Frequency − Hz
4
2
1.5
104
3
3.25
3.5
IO = 1 mA
10−1
IO = 1 A
10−2
101
102
103
104
f − Frequency − kHz
Figure 13.
105
106
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS (continued)
TPS76833
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VI − Input Voltage − V
103
IO = 1 A
102
101
3.7
2.7
IO = 10 mA
100
∆ VO − Change in
Output Voltage − mV
VDO − Dropout Voltage − mV
TPS76815
LINE TRANSIENT RESPONSE
10−1
IO = 0
Co = 10 µF
10−2
−60 −40 −20
0
20
40
60
80 100 120 140
10
0
Co = 10 µF
TA = 25°C
−10
0
20
40
60
TA − Free-Air Temperature − °C
Figure 15.
TPS76815
LOAD TRANSIENT RESPONSE
TPS76833
LINE TRANSIENT RESPONSE
∆ VO − Change in
Output Voltage − mV
Co = 10 µF
TA = 25°C
50
0
−50
VI − Input Voltage − V
Figure 14.
100
∆ VO − Change in
Output Voltage − mV
I O − Output Current − A
Co = 10 µF
TA = 25°C
5.3
4.3
−100
1
0.5
0
0
80 100 120 140 160 180 200
t − Time − µs
100 200 300 400 500 600 700 800 900 1000
t − Time − µs
Figure 16.
10
0
−10
0
20
40
60
80 100 120 140 160 180 200
t − Time − µs
Figure 17.
11
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS (continued)
TPS76833
OUTPUT VOLTAGE
vs
TIME (AT START-UP)
TPS76833
LOAD TRANSIENT RESPONSE
VO− Output Voltage − V
4
Co = 10 µF
TA = 25°C
50
0
−50
−100
Co = 10 µF
IO = 1 A
TA = 25°C
3
2
1
0
1
Enable Pulse − V
I O − Output Current − A
∆ VO − Change in
Output Voltage − mV
100
0.5
0
0
100 200 300 400 500 600 700 800 900 1000
t − Time − µs
0
0.1
0.2 0.3
Figure 18.
Figure 19.
TPS76801
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
900
IO = 1 A
VDO − Dropout Voltage − mV
800
700
600
500
TA = 25°C
400
TA = 125°C
300
200
TA = −40°C
100
0
2.5
3
3.5
4
VI − Input Voltage − V
Figure 20.
12
0.4 0.5 0.6 0.7 0.8
t − Time − ms
4.5
5
0.9
1
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
TYPICAL CHARACTERISTICS (continued)
VI
To Load
IN
OUT
+
EN
Co
GND
RL
ESR
Figure 21. Test Circuit for Typical Regions of Stability (Figure 22 through Figure 25)
(Fixed Output Options)
13
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any
series resistance added externally, and PWB trace resistance to CO.
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
10
ESR − Equivalent Series Resistance − Ω
ESR − Equivalent Series Resistance − Ω
10
Region of Instability
1
VO = 3.3 V
Co = 4.7 µF
VI = 4.3 V
TA = 25°C
Region of Stability
0.1
VO = 3.3 V
Co = 4.7 µF
VI = 4.3 V
TJ = 125°C
Region of Stability
0.1
Region of Instability
0.01
0
200
400
600
800
0
1000
200
400
600
800
IO − Output Current − mA
IO − Output Current − mA
Figure 22.
Figure 23.
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
1000
10
ESR − Equivalent Series Resistance − Ω
10
ESR − Equivalent Series Resistance − Ω
1
Region of Instability
0.01
Region of Instability
1
VO = 3.3 V
Co = 22 µF
VI = 4.3 V
TA = 25°C
Region of Stability
0.1
Region of Instability
Region of Instability
1
VO = 3.3 V
Co = 22 µF
VI = 4.3 V
TJ = 125°C
Region of Stability
0.1
Region of Instability
0.01
0.01
0
14
Region of Instability
200
400
600
800
1000
0
200
400
600
IO − Output Current − mA
IO − Output Current − mA
Figure 24.
Figure 25.
800
1000
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
APPLICATION INFORMATION
The TPS768xx family includes eight fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3.0 V, 3.3
V, and 5.0 V), and offers an adjustable device, the TPS76801 (adjustable from 1.2 V to 5.5 V).
DEVICE OPERATION
The TPS768xx features very low quiescent current, which remains virtually constant even with varying loads.
Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the
load current through the regulator (IB = IC/β). The TPS768xx uses a PMOS transistor to pass current; because
the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range.
Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into
dropout. The resulting drop in β forces an increase in IB to maintain the load. During power up, this translates to
large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems, it
means rapid battery discharge when the voltage decays below the minimum required for regulation. The
TPS768xx quiescent current remains low even when the regulator drops out, eliminating both problems.
The TPS768xx family also features a shutdown mode that places the output in the high-impedance state
(essentially equal to the feedback-divider resistance) and reduces quiescent current to 2 µA. If the shutdown
feature is not used, EN should be tied to ground.
MINIMUM LOAD REQUIREMENTS
The TPS768xx family is stable even at zero load; no minimum load is required for operation.
FB - PIN CONNECTION (ADJUSTABLE VERSION ONLY)
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option. The output
voltage is sensed through a resistor divider network to close the loop as shown in Figure 27. Normally, this
connection should be as short as possible; however, the connection can be made near a critical circuit to
improve performance at that point. Internally, FB connects to a high-impedance wide-bandwidth amplifier and
noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup is
essential.
EXTERNAL CAPACITOR REQUIREMENTS
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves
load transient response and noise rejection if the TPS768xx is located more than a few inches from the power
supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load
transients with fast rise times are anticipated.
Like all low dropout regulators, the TPS768xx requires an output capacitor connected between OUT and GND to
stabilize the internal control loop. The minimum recommended capacitance value is 10 µF and the ESR
(equivalent series resistance) must be between 60 mΩ and 1.5 Ω. Capacitor values 10 µF or larger are
acceptable, provided the ESR is less than 1.5Ω . Solid tantalum electrolytic, aluminum electrolytic, and multilayer
ceramic capacitors are all suitable, provided they meet the requirements described above. Most of the
commercially available 10 µF surface-mount ceramic capacitors, including devices from Sprague and Kemet,
meet the ESR requirements stated above.
15
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
APPLICATION INFORMATION (continued)
TPS768xx
6
VI
IN
7
C1
0.1 µF
PG
16
PG
250 kΩ
IN
OUT
5
EN
OUT
14
VO
13
+
Co
10 µF
GND
3
Figure 26. Typical Application Circuit (Fixed Versions)
The output voltage of the TPS76801 adjustable regulator is programmed using an external resistor divider as
shown in Figure 27. The output voltage is calculated using:
V
O
V
ref
1 R1
R2
where:
Vref = 1.1834 V typ (the internal reference voltage)
(1)
Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be
used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage
currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 30.1 kΩ
to set the divider current at 50 µA and then calculate R1 using:
R1 V
V
O 1
ref
R2
(2)
OUTPUT VOLTAGE
PROGRAMMING GUIDE
TPS76801
VI
0.1 µF
IN
PG
250 kΩ
≥ 1.7 V
≤ 0.9 V
OUTPUT
VOLTAGE
PG
EN
OUT
VO
R1
FB / NC
GND
R1
R2
UNIT
2.5 V
33.2
30.1
kΩ
3.3 V
53.6
30.1
kΩ
3.6 V
61.9
30.1
kΩ
4.75 V
90.8
30.1
kΩ
R2
Figure 27. TPS76801 Adjustable LDO Regulator Programming
POWER-GOOD INDICATOR
The TPS768xx features a power-good (PG) output that can be used to monitor the status of the regulator. The
internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal
regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup
resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a
low-battery indicator. PG does not assert itself when the regulated output voltage falls out of the specified 2%
tolerance, but instead reports an output voltage low, relative to its nominal regulated value.
16
TPS76815Q, TPS76818Q, TPS76825Q
TPS76827Q, TPS76828Q, TPS76830Q
TPS76833Q, TPS76850Q, TPS76801Q
www.ti.com
SLVS211J – JUNE 1999 – REVISED OCTOBER 2004
APPLICATION INFORMATION (continued)
REGULATOR PROTECTION
The TPS768xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be
appropriate.
The TPS768xx also features internal current limiting and thermal protection. During normal operation, the
TPS768xx limits output current to approximately 1.7 A. When current limiting engages, the output voltage scales
back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device
failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the
device exceeds 150°C (typ), thermal-protection circuitry shuts it down. Once the device has cooled below 130°C
(typ), regulator operation resumes.
POWER DISSIPATION AND JUNCTION TEMPERATURE
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the
regulator can handle in any given application. To ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, PD(max), and the actual dissipation, PD, which must be less than or
equal to PD(max).
The maximum-power-dissipation limit is determined using the following equation:
T max T
A
P
J
D(max)
R
JA
where:
TJmax is the maximum allowable junction temperature.
RθJA is the thermal resistance junction-to-ambient for the package, i.e., 172°C/W for the 8-terminal
SOIC and 32.6°C/W for the 20-terminal PWP with no airflow.
TA is the ambient temperature.
(3)
The regulator dissipation is calculated using:
P
D
V V
I
I
O
O
(4)
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the
thermal protection circuit.
17
PACKAGE OPTION ADDENDUM
www.ti.com
19-May-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS76801QD
ACTIVE
SOIC
D
8
TPS76801QDR
ACTIVE
SOIC
D
TPS76801QDRG4
ACTIVE
SOIC
TPS76801QPWP
ACTIVE
TPS76801QPWPR
75
Lead/Ball Finish
MSL Peak Temp (3)
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
HTSSOP
PWP
20
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76801QPWPRG4
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76815QD
ACTIVE
SOIC
D
8
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76815QDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76815QDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76815QPWP
ACTIVE
HTSSOP
PWP
20
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76815QPWPR
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76815QPWPRG4
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76818QD
ACTIVE
SOIC
D
8
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76818QDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76818QDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76818QPWP
ACTIVE
HTSSOP
PWP
20
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76818QPWPR
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76818QPWPRG4
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76825QD
ACTIVE
SOIC
D
8
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76825QDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76825QPWP
ACTIVE
HTSSOP
PWP
20
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76825QPWPR
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76825QPWPRG4
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76827QD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76827QDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
70
75
70
75
70
75
70
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
19-May-2005
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS76827QDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76827QDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76827QPWP
ACTIVE
HTSSOP
PWP
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76827QPWPG4
ACTIVE
HTSSOP
PWP
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76827QPWPR
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76827QPWPRG4
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76828QD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76828QDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76828QDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76828QDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76828QPWP
ACTIVE
HTSSOP
PWP
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76828QPWPG4
ACTIVE
HTSSOP
PWP
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76828QPWPR
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76828QPWPRG4
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76830QD
ACTIVE
SOIC
D
8
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76830QDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76830QDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76830QPWP
ACTIVE
HTSSOP
PWP
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76830QPWPG4
ACTIVE
HTSSOP
PWP
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76830QPWPR
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76830QPWPRG4
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76833QD
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76833QDG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76833QDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76833QDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76833QPWP
ACTIVE
HTSSOP
PWP
20
CU NIPDAU
Level-2-260C-1 YEAR
75
70
Addendum-Page 2
Green (RoHS &
no Sb/Br)
Lead/Ball Finish
MSL Peak Temp (3)
PACKAGE OPTION ADDENDUM
www.ti.com
19-May-2005
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS76833QPWPR
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76833QPWPRG4
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76850QD
ACTIVE
SOIC
D
8
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76850QDR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76850QDRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS76850QPWP
ACTIVE
HTSSOP
PWP
20
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76850QPWPR
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
TPS76850QPWPRG4
ACTIVE
HTSSOP
PWP
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
75
70
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
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Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Amplifiers
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Telephony
www.ti.com/telephony
Video & Imaging
www.ti.com/video
Wireless
www.ti.com/wireless
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