MICROCHIP TC7117

TC7116/A/TC7117/A
3-1/2 Digit Analog-to-Digital Converters with Hold
Features:
General Description:
• Low Temperature Drift Internal Reference:
- TC7116/TC7117 80 ppm/°C, Typ.
- TC7116A/TC7117A 20 ppm/°C, Typ.
• Display Hold Function
• Directly Drives LCD or LED Display
• Zero Reading with Zero Input
• Low Noise for Stable Display:
- 2V or 200mV Full Scale Range (FSR)
• Auto-Zero Cycle Eliminates Need for Zero
• Adjustment Potentiometer
• True Polarity Indication for Precision Null
Applications
• Convenient 9V Battery Operation:
(TC7116/TC7116A)
• High-Impedance CMOS Differential Inputs: 1012
• Low-Power Operation: 10mW
The TC7116A/TC7117A are 3-1/2 digit CMOS Analogto-Digital Converters (ADCs) containing all the active
components necessary to construct a 0.05% resolution
measurement system. Seven-segment decoders,
polarity and digit drivers, voltage reference, and clock
circuit are integrated on-chip. The TC7116A drives
Liquid Crystal Displays (LCDs) and includes a backplane driver. The TC7117A drives common anode Light
Emitting Diode (LED) displays directly with an 8mA
drive current per segment.
Applications:
• Thermometry
• Bridge Readouts: Strain Gauges, Load Cells,
Null Detectors
• Digital Meters: Voltage/Current/Ohms/Power, pH
• Digital Scales, Process Monitors
• Portable Instrumentation
Device Selection Table
Package Code
CPL
Package
The TC7116A/7117A reduces linearity error to less
than 1 count. Rollover error (the difference in readings
for equal magnitude but opposite polarity input signals)
is below ±1 count. High-impedance differential inputs
offer 1pA leakage current and a 1012 input impedance. The 15VP-P noise performance enables a “rock
solid” reading. The auto-zero cycle ensures a zero
display reading with a 0V input.
The TC7116A and TC7117A feature a precision, low
drift internal reference, and are functionally identical to
the TC7116/TC7117. A low drift external reference is
not normally required with the TC7116A/TC7117A.
Temperature Range
40-Pin PDIP
0C to +70C
40-Pin CERDIP
-25C to +85C
CKW
44-Pin PQFP
0C to +70C
CLW
44-Pin PLCC
0C to +70C
IJL
These devices incorporate a display hold (HLDR)
function. The displayed reading remains indefinitely, as
long as HLDR is held high. Conversions continue, but
output data display latches are not updated. The reference low input (VREF-) is not available, as it is with the
TC7106/7107. VREF- is tied internally to analog
common in the TC7116A/7117A devices.
 2002-2012 Microchip Technology Inc.
DS21457D-page 1
TC7116/A/TC7117/A
Package Type
40-Pin PDIP
40-Pin CERDIP
40 OSC1
HLDR 1
D1 2
C1 3
38 OSC3
37 TEST
B1 4
A1 5
36 VREF+
1's
F1 6
35 V+
G1 7
E1 8
34 CREF+
G1 7
E1 8
34 CREF+
TC7116CPL 33 CREFTC7116ACPL 32 COMMON
TC7117CPL 31 VIN+
TC7117ACPL
B2 11
30 VIN29 CAZ
F2 13
28 VBUFF
27 VINT
F2 13
F3 17
25 G2
24 C3
E3 18
23 A3
AB4 19
22 G3
100's
1000's
F3 17
25 G2
24 C3
E3 18
23 A3
AB4 19
22 G3
100's
21 BP/GND
(TC7116/7117)
(TC7116A/TC7117A)
POL 20
(Minus Sign)
V-
VINT
VBUFF
CAZ
1 44 43 42 41 40
VIN-
2
VIN+
3
CREF-
HLDR
NC
4
CREF+
D1
5
V+
VREF+
C1
VREF+
B1
6
TEST
A1
OSC3
44-Pin PQFP
OSC2
44-Pin PLCC
OSC1
26 V-
D3 15
B3 16
100's
21 BP/GND
(TC7116/7117)
(TC7116A/TC7117A)
POL 20
(Minus Sign)
28 VBUFF
27 VINT
E2 14
26 V-
D3 15
B3 16
33 CREF-
TC7116IJL 32 COMMON
TC7116AIJL 31 V +
IN
TC7117IJL
B2 11
30 VINTC7117AIJL
A2 12
29 CAZ
D2 9
C2 10
10's
A2 12
E2 14
1000's
36 VREF+
35 V+
C2 10
100's
38 OSC3
37 TEST
B1 4
A1 5
F1 6
D2 9
10's
39 OSC2
C1 3
COMMON
1's
40 OSC1
HLDR 1
D1 2
39 OSC2
44 43 42 41 40 39 38 37 36 35 34
39 V+
NC 1
33 NC
G1 8
38 CREF+
NC 2
32 G3
E1 9
37 CREF-
TEST 3
31 C3
D2 10
36 COMMON
OSC3 4
30 A3
F1 7
C2 11
35 VIN+
TC7116CLW
TC7116ACLW
TC7117CLW
TC7117ACLW
NC 12
B2 13
A2 14
NC 5
34 NC
OSC2 6
33 VIN-
OSC1 7
32 CAZ
HLDR 8
29 G3
28 BP/
GND
27 POL
TC7116CKW
TC7116ACKW
TC7117CKW
TC7117ACKW
26 AB4
D1 9
25 E3
F2 15
31 VBUFF
E2 16
30 VINT
C1 10
24 F3
29 V-
B1 11
23 B3
Note 1:
2:
D3
E2
F2
A2
B2
C2
D2
E1
G1
12 13 14 15 16 17 18 19 20 21 22
F1
G2
A3
C3
NC
BP/
GND
G3
POL
AB4
F3
E3
B3
18 19 20 21 22 23 24 25 26 27 28
A1
D3 17
NC = No internal connection.
Pins 9, 25, 40 and 56 are connected to the die substrate. The potential at these pins is approximately V+. No
external connections should be made.
DS21457D-page 2
 2002-2012 Microchip Technology Inc.
TC7116/A/TC7117/A
Typical Application
TC7116/A
TC7117/A
Display
Hold
0.1μF
1MΩ
+
Analog
Input
–
0.01μF
LCD Display (TC7116/7116A)
or Common Anode LED Display
33
1
34
(TC7117/7117A)
CREF+ CREF- HLDR
31
2–19 Segment
VIN+
22–25 Drive
POL 20
30 VINBackplane Drive
Minus Sign
BP/GND 21
32 ANALOG
COMMON
V+ 35
28
47kΩ
0.22μF
24kΩ
VBUFF
0.47μF
29
+
36 VREF
CAZ
VREF+
100mV
9V
1kΩ
27 V
INT
V- 26
OSC2 OSC3 OSC1
39
38 COSC 40
ROSC
100pF
To Analog
Common (Pin 32)
3 Conversions Per Second
100kΩ
 2002-2012 Microchip Technology Inc.
DS21457D-page 3
TC7116/A/TC7117/A
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings*
Supply Voltage:
TC7116/TC7116A (V+ to V-) ...........................15V
TC7117/TC7117A (V+ to GND) .......................+6V
V- to GND.........................................................-9V
Analog Input Voltage (Either Input) (Note 1) ... V+ to VReference Input Voltage (Either Input) ............ V+ to V-
*Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. These are stress ratings only and functional
operation of the device at these or any other conditions
above those indicated in the operation sections of the
specifications is not implied. Exposure to Absolute
Maximum Rating conditions for extended periods may
affect device reliability.
Clock Input:
TC7116/TC7116A............................... TEST to V+
TC7117/TC7117A.................................GND to V+
Package Power Dissipation; TA  70°C (Note 2)
40-Pin CDIP ................................................2.29W
40-Pin PDIP ................................................1.23W
44-Pin PLCC ...............................................1.23W
44-Pin PQFP ...............................................1.00W
Operating Temperature:
C (Commercial) Device ................... 0°C to +70°C
I (Commercial) Device.................... 0°C to +70°C
Storage Temperature..........................-65°C to +150°C
TABLE 1-1:
TC7116/A AND TC7117/A ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, specifications apply to both the TC7116/A and TC7117/A at TA = 25°C,
fCLOCK = 48kHz. Parts are tested in the circuit of the Typical Operating Circuit.
Symbol
Min
Typ
Max
Zero Input Reading
—
±0
—
Ratiometric Reading
999
999/1000
1000
Rollover Error (Difference in Reading
for Equal Positive and Negative
Readings Near Full Scale)
-1
±0.2
+1
Counts
VIN- = + VIN+  200mV
or 2V
Linearity (Maximum Deviation from
Best Straight Line Fit)
-1
±0.2
+1
Counts
Full Scale = 200mV or 2V
CMRR
Common Mode Rejection Ratio
(Note 3)
—
50
—
V/V
VCM = ±1V, VIN = 0V
Full Scale = 200mV
eN
Noise (Peak to Peak 95% of Time)
—
15
—
V
VIN = 0V
Full Scale = 200mV
IL
Leakage Current at Input
—
1
10
pA
VIN = 0V
Zero Reading Drift
—
0.2
1
V/°C
VIN = 0V
“C” Device = 0°C to +70°C
—
1.0
2
V/°C
“I” Device = -25°C to +85°C
ZIR
R/O
Parameter
Unit
Test Conditions
Digital VIN = 0V
Reading Full Scale = 200mV
Digital VIN = VREF
Reading VREF = 100mV
Note 1:
2:
3:
4:
Input voltages may exceed the supply voltages provided the input current is limited to ±100A.
Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
Refer to “Differential Input” discussion.
Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is
20 times conversion rate. Average DC component is less than 50mV.
5: The TC7116/TC7116A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to TEST, Pin 37. The
TC7117/TC7117A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to GND, Pin 21.
DS21457D-page 4
 2002-2012 Microchip Technology Inc.
TC7116/A/TC7117/A
TABLE 1-1:
TC7116/A AND TC7117/A ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise noted, specifications apply to both the TC7116/A and TC7117/A at TA = 25°C,
fCLOCK = 48kHz. Parts are tested in the circuit of the Typical Operating Circuit.
Symbol
TCSF
Parameter
Min
Typ
Max
Unit
Test Conditions
Scale Factor Temperature Coefficient
—
1
5
ppm/°C
VIN = 199mV,
“C” Device = 0°C to +70°C
(Ext. Ref = 0ppm°C)
—
—
20
ppm/°C
“I” Device = -25°C to +85°C
Input Resistance, Pin 1
30
70
—
k
VIL, Pin 1
—
—
Test + 1.5
V
TC7116/A Only
VIL, Pin 1
—
—
GND + 1.5
V
TC7117/A Only
VIH, Pin 1
V+ - 1.5
(Note 5)
—
—
V
IDD
Supply Current (Does not Include LED
Current for TC7117/A)
—
0.8
1.8
mA
Both
VC
Analog Common Voltage
(with Respect to Positive Supply)
2.4
3.05
3.35
V
25k Between Common
and Positive Supply
VCTC
Temperature Coefficient of Analog
Common (with Respect to Positive
Supply)
—
—
20
80
—
50
—
—
ppm/°C
ppm/°C
“C” Device: 0°C to+70°C
TC7116A/TC7117A
TC7116/TC7117
VSD
TC7116/TC7117A ONLY Peak to Peak
Segment Drive Voltage
4
5
6
V
V+ to V- = 9V
(Note 4)
VBD
TC7116A/TC7116A ONLY Peak to
Peak
Backplane Drive Voltage
4
5
6
V
V+ to V- = 9V
(Note 4)
TC7117/TC7117A ONLY
Segment Sinking Current
(Except Pin 19)
5
8
—
mA
V+ = 5.0V
Segment Voltage = 3V
TC7117/TC7117A ONLY
Segment Sinking Current (Pin 19 Only)
10
16
—
mA
V+ = 5.0V
Segment Voltage = 3V
VIN = 0V
Note 1:
2:
3:
4:
Input voltages may exceed the supply voltages provided the input current is limited to ±100A.
Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
Refer to “Differential Input” discussion.
Backplane drive is in phase with segment drive for “OFF” segment, 180° out of phase for “ON” segment. Frequency is
20 times conversion rate. Average DC component is less than 50mV.
5: The TC7116/TC7116A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to TEST, Pin 37. The
TC7117/TC7117A logic inputs have an internal pull-down resistor connected from HLDR, Pin 1 to GND, Pin 21.
 2002-2012 Microchip Technology Inc.
DS21457D-page 5
TC7116/A/TC7117/A
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number
(40-Pin PDIP)
(40-Pin CERDIP)
Pin Number
(44-Pin PQFP)
Symbol
1
8
HLDR
2
9
D1
Activates the D section of the units display.
3
10
C1
Activates the C section of the units display.
4
11
B1
Activates the B section of the units display.
5
12
A1
Activates the A section of the units display.
6
13
F1
Activates the F section of the units display.
7
14
G1
Activates the G section of the units display.
8
15
E1
Activates the E section of the units display.
9
16
D2
Activates the D section of the tens display.
10
17
C2
Activates the C section of the tens display.
Description
Hold pin, Logic 1 holds present display reading.
11
18
B2
Activates the B section of the tens display.
12
19
A2
Activates the A section of the tens display.
13
20
F2
Activates the F section of the tens display.
14
21
E2
Activates the E section of the tens display.
15
22
D3
Activates the D section of the hundreds display.
16
23
B3
Activates the B section of the hundreds display.
17
24
F3
Activates the F section of the hundreds display.
18
25
E3
Activates the E section of the hundreds display.
Activates both halves of the 1 in the thousands display.
19
26
AB4
20
27
POL
Activates the negative polarity display.
21
28
BP/
GND
LCD backplane drive output (TC7116/TC7116A). Digital ground
(TC7117/TC7117A).
22
29
G3
Activates the G section of the hundreds display.
23
30
A3
Activates the A section of the hundreds display.
24
31
C3
Activates the C section of the hundreds display.
25
32
G2
Activates the G section of the tens display.
26
34
V-
Negative power supply voltage.
27
35
VINT
28
36
VBUFF
Integration resistor connection. Use a 47k resistor for a 200mV full scale range
and a 470k resistor for 2V full scale range.
29
37
CAZ
The size of the auto-zero capacitor influences system noise. Use a 0.47F
capacitor for 200mV full scale, and a 0.047F capacitor for 2V full scale.
See Section 4.1 “Auto-Zero Capacitor”, Auto-Zero Capacitor for more details.
30
38
VIN-
The analog LOW input is connected to this pin.
VIN+
The analog HIGH input signal is connected to this pin.
31
39
32
40
33
41
DS21457D-page 6
Integrator output. Connection point for integration capacitor.
See Section 4.3 “Integrating Capacitor”, Integrating Capacitor for more
details.
COMMON This pin is primarily used to set the Analog Common mode voltage for battery
operation, or in systems where the input signal is referenced to the power supply. It also acts as a reference voltage source. See Section 3.1.6 “Analog Common”, Analog Common for more details.
CREF-
See Pin 34.
 2002-2012 Microchip Technology Inc.
TC7116/A/TC7117/A
TABLE 2-1:
PIN FUNCTION TABLE (CONTINUED)
Pin Number
(40-Pin PDIP)
(40-Pin CERDIP)
Pin Number
(44-Pin PQFP)
Symbol
Description
34
42
CREF+
A 0.1F capacitor is used in most applications. If a large Common mode voltage
exists (for example, the VIN- pin is not at analog common), and a 200mV scale is
used, a 1F capacitor is recommended and will hold the rollover error to
0.5 count.
35
43
V+
36
44
VREF+
The analog input required to generate a full scale output (1999 counts). Place
100mV between Pins 32 and 36 for 199.9mV full scale. Place 1V between
Pins 35 and 36 for 2V full scale. See Section 4.6 “Reference Voltage”, Reference Voltage.
37
3
TEST
Lamp test. When pulled HIGH (to V+), all segments will be turned on and the display should read -1888. It may also be used as a negative supply for externally
generated decimal points. See Section 3.1.7 “Test”, TEST for additional information.
38
4
OSC3
See Pin 40.
39
6
OSC2
See Pin 40.
40
7
OSC1
Pins 40, 39, 38 make up the oscillator section. For a 48kHz clock (3 readings per
section), connect Pin 40 to the junction of a 100k resistor and a 100pF capacitor. The 100k resistor is tied to Pin 39 and the 100pF capacitor is tied to Pin 38.
 2002-2012 Microchip Technology Inc.
Positive Power Supply Voltage.
DS21457D-page 7
TC7116/A/TC7117/A
3.0
DETAILED DESCRIPTION
(All Pin Designations Refer to 40-Pin PDIP.)
Since the comparator is included in the loop, AZ
accuracy is limited only by system noise. The offset
referred to the input is less than 10V.
3.1
3.1.2
Analog Section
Figure 3-1 shows the block diagram of the analog section for the TC7116/TC7116A and TC7117/TC7117A.
Each measurement cycle is divided into three phases:
(1) Auto-Zero (AZ), (2) Signal Integrate (INT), and
(3) Reference Integrate (REF), or De-integrate (DE).
3.1.1
AUTO-ZERO PHASE
High and low inputs are disconnected from the pins and
internally shorted to analog common. The reference
capacitor is charged to the reference voltage. A feedback loop is closed around the system to charge the
auto-zero capacitor (CAZ) to compensate for offset voltages in the buffer amplifier, integrator, and comparator.
CREF
VREF+
CREF+
34
V+
10μA
VIN+
RINT
VBUFF
CREF-
36
33
DE
(–)
VIN-
Low
Temp.
Drift
DE
(+)
–
AZ
DE (+)
Auto-Zero
VINT
29
27
–
+
+
+
Comparator
V+ -3V
TC7116
TC7116A
TC7117
TC7117A
DE (–)
26
INT
CINT
To
Digital
Section
Zener
VREF
AZ & DE (±)
30
CAZ
Integrator
+
AZ
32
35
–
31
INT
Analog
Common
V+
28
AZ
SIGNAL INTEGRATE PHASE
The auto-zero loop is opened, the internal short is
removed, and the internal high and low inputs are
connected to the external pins. The converter then integrates the differential voltages between VIN+ and VINfor a fixed time. This differential voltage can be within a
wide Common mode range: 1V of either supply. However, if the input signal has no return with respect to the
converter power supply, VIN- can be tied to analog
common to establish the correct Common mode
voltage. At the end of this phase, the polarity of the
integrated signal is determined.
V-
FIGURE 3-1:
3.1.3
Analog Section of TC7116/TC7116A and TC7117/TC7117A
REFERENCE INTEGRATE PHASE
The final phase is reference integrate, or de-integrate.
Input low is internally connected to analog common
and input high is connected across the previously
charged reference capacitor. Circuitry within the chip
ensures that the capacitor will be connected with the
correct polarity to cause the integrator output to return
to zero. The time required for the output to return to
zero is proportional to the input signal. The digital
reading displayed is:
3.1.4
REFERENCE
The positive reference voltage (VREF+) is referred to
analog common.
EQUATION 3-1:
1000 =
DS21457D-page 8
VIN
VREF
 2002-2012 Microchip Technology Inc.
TC7116/A/TC7117/A
3.1.5
DIFFERENTIAL INPUT
This input can accept differential voltages anywhere
within the Common mode range of the input amplifier
or, specifically, from 1V below the positive supply to 1V
above the negative supply. In this range, the system
has a CMRR of 86dB, typical. However, since the integrator also swings with the Common mode voltage,
care must be exercised to ensure that the integrator
output does not saturate. A worst-case condition would
be a large, positive Common mode voltage with a near
full scale negative differential input voltage. The negative input signal drives the integrator positive, when
most of its swing has been used up by the positive
Common mode voltage. For these critical applications,
the integrator swing can be reduced to less than the
recommended 2V full scale swing with little loss of
accuracy. The integrator output can swing within 0.3V
of either supply without loss of linearity.
3.1.6
ANALOG COMMON
This pin is included primarily to set the Common mode
voltage for battery operation (TC7116/TC7116A), or for
any system where the input signals are floating, with
respect to the power supply. The analog common pin
sets a voltage approximately 2.8V more negative than
the positive supply. This is selected to give a minimum
end of life battery voltage of about 6V. However, analog
common has some attributes of a reference voltage.
When the total supply voltage is large enough to cause
the Zener to regulate (>7V), the analog common voltage will have a low voltage coefficient (0.001%), low
output impedance (15), and a temperature coefficient of less than 20ppm/°C, typically, and 50 ppm maximum. The TC7116/TC7117 temperature coefficients
are typically 80ppm/°C.
Analog common is also used as VIN- return during
auto-zero and de-integrate. If VIN- is different from analog common, a Common mode voltage exists in the
system and is taken care of by the excellent CMRR of
the converter. However, in some applications, VIN- will
be set at a fixed, known voltage (power supply common
for instance). In this application, analog common
should be tied to the same point, thus removing the
Common mode voltage from the converter. The same
holds true for the reference voltage; if it can be conveniently referenced to analog common, it should be. This
removes the Common mode voltage from the
reference system.
Within the IC, analog common is tied to an N-channel
FET, that can sink 30mA or more of current to hold the
voltage 3V below the positive supply (when a load is
trying to pull the analog common line positive). However, there is only 10A of source current, so analog
common may easily be tied to a more negative voltage,
thus overriding the internal reference.
3.1.7
TEST
The TEST pin serves two functions. On the TC7117/
TC7117A, it is coupled to the internally generated digital supply through a 500 resistor. Thus, it can be used
as a negative supply for externally generated segment
drivers, such as decimal points, or any other presentation the user may want to include on the LCD.
(Figure 3-3 and Figure 3-4 show such an application.)
No more than a 1mA load should be applied.
The second function is a “lamp test.” When TEST is
pulled HIGH (to V+), all segments will be turned ON
and the display should read -1888. The TEST pin will
sink about 10mA under these conditions.
An external reference may be used, if necessary, as
shown in Figure 3-2.
V+
V+
TC7116
TC7116A
4049
BP
V+
TC7116
TC7116A
TC7117
TC7117A
V+
21
6.8kΩ
TEST
20kΩ
VREF+
1.2V REF
GND
37
FIGURE 3-3:
Decimal Point
To LCD
Decimal
Point
To LCD
Backplane
Simple Inverter for Fixed
COMMON
FIGURE 3-2:
Reference
Using an External
 2002-2012 Microchip Technology Inc.
DS21457D-page 9
TC7116/A/TC7117/A
large P-channel source follower. This supply is made
stiff to absorb the relative large capacitive currents
when the backplane (BP) voltage is switched. The BP
frequency is the clock frequency 4800. For 3 readings
per second, this is a 60Hz square wave with a nominal
amplitude of 5V. The segments are driven at the same
frequency and amplitude, and are in phase with BP
when OFF, but out of phase when ON. In all cases,
negligible DC voltage exists across the segments.
V+
V+
BP
TC7116
TC7116A
To LCD
Decimal
Point
Decimal
Point
Select
Figure is the digital section of the TC7117/TC7117A. It
is identical to the TC7116/TC7116A, except that the
regulated supply and BP drive have been eliminated,
and the segment drive is typically 8mA. The 1000’s output (Pin 19) sinks current from two LED segments, and
has a 16mA drive capability. The TC7117/TC7117A are
designed to drive common anode LED displays.
4030
GND
TEST
FIGURE 3-4:
Exclusive “OR” Gate for
Decimal Point Drive
3.2
In both devices, the polarity indication is ON for analog
inputs. If VIN- and VIN+ are reversed, this indication can
be reversed also, if desired.
Digital Section
Figure 3-5 and Figure show the digital section for
TC7116/TC7116A and TC7117/TC7117A, respectively.
For the TC7116/TC7116A (Figure 3-5), an internal digital ground is generated from a 6V Zener diode and a
TC7116
TC7116A
Backplane
21
LCD Phase Driver
Typical Segment Output
V+
7-Segment
Decode
7-Segment
Decode
0.5mA
7-Segment
Decode
÷200
Segment
Output
Latch
2mA
Internal Digital Ground
Thousands
Tens
Hundreds
Units
To Switch Drivers
From Comparator Output
35
~70kΩ
Clock
÷4
Logic Control
VTH = 1V
40
39
38
OSC1
OSC2
OSC3
FIGURE 3-5:
DS21457D-page 10
Internal Digital Ground
1
6.2V
37
V+
TEST
500Ω
26
V-
HLDR
TC7116/TC7116A Digital Section
 2002-2012 Microchip Technology Inc.
TC7116/A/TC7117/A
3.2.1
SYSTEM TIMING
To achieve maximum rejection of 60Hz pickup, the signal integrate cycle should be a multiple of 60Hz. Oscillator frequencies of 240kHz, 120kHz, 80kHz, 60kHz,
48kHz, 40kHz, etc. should be selected. For 50Hz rejection, oscillator frequencies of 200kHz, 100kHz,
66-2/3kHz, 50kHz, 40kHz, etc. would be suitable. Note
that 40kHz (2.5 readings per second) will reject both
50Hz and 60Hz.
The clocking method used for the TC7116/TC7116A
and TC7117/TC7117A is shown in Figure . Three
clocking methods may be used:
1.
2.
3.
An external oscillator connected to Pin 40.
A crystal between Pins 39 and 40.
An RC network using all three pins.
The oscillator frequency is 4 before it clocks the
decade counters. It is then further divided to form the
three convert cycle phases: Signal Integrate (1000
counts), Reference De-integrate (0 to 2000 counts),
and Auto-Zero (1000 to 3000 counts). For signals less
than full scale, auto-zero gets the unused portion of reference de-integrate. This makes a complete measure
cycle of 4000 (16,000 clock pulses), independent of
input voltage. For 3 readings per second, an oscillator
frequency of 48kHz would be used.
3.2.2
HOLD READING INPUT
When HLDR is at a logic HIGH, the latch will not be
updated. Analog-to-Digital conversions will continue,
but will not be updated until HLDR is returned to LOW.
To continuously update the display, connect to TEST
(TC7116/TC7116A) or GROUND (TC7117/TC7117A),
or disconnect. This input is CMOS compatible with
70k typical resistance to TEST (TC7116/TC7116A) or
GROUND (TC7117/TC7117A).
TC7117
TC7117A
Typical Segment Output
V+
7-Segment
Decode
0.5mA
7-Segment
Decode
7-Segment
Decode
To
Segment
8mA
Latch
Digital Ground
Internal Digital Ground
Thousands
V+
Hundreds
Tens
Units
To Switch Drivers
From Comparator Output
35
37
Clock
÷4
Control Logic
FIGURE 3-6:
39
OSC2
38
OSC3
TEST
500Ω
21
40
OSC1
V+
Digital
GND
1
~70kΩ
HLDR
TC7117/TC7117A Digital Section
 2002-2012 Microchip Technology Inc.
DS21457D-page 11
TC7116/A/TC7117/A
4.0
4.1
COMPONENT VALUE
SELECTION
Reference Capacitor
A 0.1F capacitor is acceptable in most applications.
However, where a large Common mode voltage exists
(i.e., the VIN- pin is not at analog common), and a
200mV scale is used, a larger value is required to prevent rollover error. Generally, 1F will hold the rollover
error to 0.5 count in this instance.
4.3
Integrating Capacitor
The integrating capacitor should be selected to give the
maximum voltage swing that ensures tolerance buildup
will not saturate the integrator swing (approximately
0.3V from either supply). In the TC7116/TC7116A or
the TC7117/TC7117A, when the analog common is
used as a reference, a nominal ±2V full scale integrator
swing is acceptable. For the TC7117/TC7117A, with
±5V supplies and analog common tied to supply
ground, a ±3.5V to ±4V swing is nominal. For 3 readings per second (48kHz clock), nominal values for CINT
are 0.221F and 0.10F, respectively. If different oscillator frequencies are used, these values should be
changed in inverse proportion to maintain the output
swing. The integrating capacitor must have low dielectric absorption to prevent rollover errors. Polypropylene
capacitors are recommended for this application.
4.4
Oscillator Components
For all frequency ranges, a 100k resistor is recommended; the capacitor is selected from the equation:
Auto-Zero Capacitor
The size of the auto-zero capacitor has some influence
on system noise. For 200mV full scale, where noise is
very important, a 0.47F capacitor is recommended.
On the 2V scale, a 0.047F capacitor increases the
speed of recovery from overload and is adequate for
noise on this scale.
4.2
4.5
EQUATION 4-1:
f = 0.45
------RC
For a 48kHz clock (3 readings per second), C = 100pF.
4.6
Reference Voltage
To generate full scale output (2000 counts), the analog
input requirement is VIN = 2VREF. Thus, for the 200mV
and 2V scale, VREF should equal 100mV and 1V,
respectively. In many applications, where the ADC is
connected to a transducer, a scale factor exists
between the input voltage and the digital reading. For
instance, in a measuring system, the designer might like
to have a full scale reading when the voltage from the
transducer is 700mV. Instead of dividing the input down
to 200mV, the designer should use the input voltage
directly and select VREF = 350mV. Suitable values for
integrating resistor and capacitor would be 120kW and
0.22F. This makes the system slightly quieter and also
avoids a divider network on the input. The TC7117/
TC7117A, with ±5V supplies, can accept input signals
up to ±4V. Another advantage of this system is when a
digital reading of zero is desired for VIN  0. Temperature and weighing systems with a variable tare are
examples. This offset reading can be conveniently generated by connecting the voltage transducer between
VIN+ and analog common, and the variable (or fixed)
offset voltage between analog common and VIN-.
Integrating Resistor
Both the buffer amplifier and the integrator have a class
A output stage with 100A of quiescent current. They
can supply 20A of drive current with negligible nonlinearity. The integrating resistor should be large
enough to remain in this very linear region over the
input voltage range, but small enough that undue leakage requirements are not placed on the PC board. For
2V full scale, 470k is near optimum and, similarly,
47k for 200mV full scale.
DS21457D-page 12
 2002-2012 Microchip Technology Inc.
TC7116/A/TC7117/A
5.0
TC7117/TC7117A POWER
SUPPLIES
The TC7117/TC7117A are designed to operate from
±5V supplies. However, if a negative supply is not available, it can be generated with a TC7660 DC-to-DC converter and two capacitors. Figure 5-1 shows this
application.
In selected applications, a negative supply is not
required. The conditions for using a single +5V supply
are:
1.
2.
3.
The input signal can be referenced to the center
of the Common mode range of the converter.
The signal is less than ±1.5V.
An external reference is used.
+5V
35
V+
36
VREF+
LED
Drive
32
TC7117 COM
TC7117A
V + 31
+
IN
VIN-
8
2
+
TC7660
10μF
5 (-5V)
4
V26
GND
30
VIN
21
–
3 +
10μF
FIGURE 5-1:
Negative Power Supply
Generation with TC7660
 2002-2012 Microchip Technology Inc.
DS21457D-page 13
TC7116/A/TC7117/A
6.0
TYPICAL APPLICATIONS
The TC7117/TC7117A sink the LED display current,
causing heat to build up in the IC package. If the internal voltage reference is used, the changing chip temperature can cause the display to change reading. By
reducing the LED common anode voltage, the TC7117/
TC7117A package power dissipation is reduced.
Figure 6-1 is a curve tracer display showing the relationship between output current and output voltage for
typical TC7117CPL/TC7117ACPL devices. Since a
typical LED has 1.8V across it at 8mA and its common
anode is connected to +5V, the TC7117/TC7117A output is at 3.2V (Point A, Figure 6-1). Maximum power
dissipation is 8.1mA x 3.2V x 24 segments = 622mW.
However, notice that once the TC7117/TC7117A’s output voltage is above 2V, the LED current is essentially
constant as output voltage increases. Reducing the
output voltage by 0.7V (Point B Figure 6-1) results in
7.7mA of LED current, only a 5% reduction. Maximum
power dissipation is now only 7.7mA x 2.5V x 24 =
462mW, a reduction of 26%. An output voltage reduction of 1V (Point C) reduces LED current by 10%
(7.3mA), but power dissipation by 38% (7.3mA x 2.2V
x 24 = 385mW).
Reduced power dissipation is very easy to obtain.
Figure 6-2 shows two ways: either a 5.1, 1/4W resistor, or a 1A diode placed in series with the display (but
not in series with the TC7117/TC7117A). The resistor
reduces the TC7117/TC7117A’s output voltage (when
all 24 segments are ON) to Point C of Figure 6-1. When
segments turn off, the output voltage will increase. The
diode, however, will result in a relatively steady output
voltage, around Point B.
In addition to limiting maximum power dissipation, the
resistor reduces change in power dissipation as the
display changes. The effect is caused by the fact that,
as fewer segments are ON, each ON output drops
more voltage and current. For the best-case of six
segments (a “111” display) to worst-case (a “1888”
display), the resistor circuit will change about 230mW,
while a circuit without the resistor will change about
470mW. Therefore, the resistor will reduce the effect of
display dissipation on reference voltage drift by about
50%.
The change in LED brightness caused by the resistor is
almost unnoticeable as more segments turn off. If
display brightness remaining steady is very important
to the designer, a diode may be used instead of the
resistor.
+5V
In
+
-5V
–
Output Current (mA)
10.000
1kΩ
C
100
pF
TP5
100
kΩ
7.000
6.000
2.00
2.50
3.00
150kΩ
TP3
A
B
8.000
1MΩ
24kΩ
9.000
3.50
4.00
40
0.01
μF
TP2
0.1
μF
TP1
FIGURE 6-1:
TC7117/TC7117A Output
vs. Output Voltage
30
TC7117
TC7117A
1
Display
47
kΩ
35
O ut put V o lt a ge ( V )
0.47
μF 0.22
μF
10
TP
4
21
20
Display
1.5W, 1/4Ω
1N4001
FIGURE 6-2:
Diode or Resistor Limits
Package Power Dissipation
DS21457D-page 14
 2002-2012 Microchip Technology Inc.
TC7116/A/TC7117/A
TC7116
TC7116A
FIGURE 6-3:
Second – RPS)
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
Set VREF = 100mV
100kΩ
100pF
22kΩ
0.1pF
1kΩ
1MΩ
+
In
0.01μF
+
0.47μF
47kΩ
–
9V
–
0.22μF
To Display
To Backplane
TC7116/TC7117A Using the Internal Reference (200 mV Full Scale, 3 Readings Per
TC7117
TC7117A
Set VREF = 100mV
40
100kΩ
39
38
37
100pF
36
22kΩ
35
34
0.1pF 1kΩ
33
1MΩ
32
31
0.01μF
30
0.47μF
29
47kΩ
28
27
0.22μF
26
25
24
23 To Display
22
21
+5V
+
In
–
-5V
FIGURE 6-4:
TC7117/TC7117A Internal Reference (200 mV Full Scale, 3 RPS, VIN- Tied to GND for
Single Ended Inputs
 2002-2012 Microchip Technology Inc.
DS21457D-page 15
TC7116/A/TC7117/A
V+
40
To Logic VCC
35
TC7116
TC7116A
26
O/R
To Logic
GND
V-
U/R
20
CD4023
or 74C10
FIGURE 6-5:
Outputs
DS21457D-page 16
CD4077 O/R = Over Range
U/R = Under Range
Circuit for Developing Under Range and Over Range Signals From TC7116/TC7117A
TC7117
TC7117A
FIGURE 6-6:
21
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
100kΩ
Set VREF = 100mV
100pF
10kΩ
0.1pF
10kΩ
V+
1kΩ
+
1.2V
0.01μF
0.47μF
In
1MΩ
–
47kΩ
0.22μF
To Display
TC7117/TC7117A With A 1.2 External Bandgap Reference (VIN- Tied to Common)
 2002-2012 Microchip Technology Inc.
TC7116/A/TC7117/A
TC7116
TC7116A
TC7117
TC7117A
FIGURE 6-7:
TC7117A)
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
Set VREF = 1V
100kΩ
100pF
24kΩ
V+
0.1μF
25kΩ
1MΩ
+
In
0.01μF
0.047μF
–
470kΩ
0.22μF
V-
To Display
Recommended Component Values for 2V Full Scale (TC7116/TC7116A and TC7117/
TC7117
TC7117A
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
100kΩ
Set VREF = 100mV
100pF
10kΩ
0.1pF
10kΩ
V+
1kΩ
+
1.2V
0.01μF
0.47μF
In
1MΩ
–
47kΩ
0.22μF
To Display
FIGURE 6-8:
TC7117/TC7117A Operated From Single +5V Supply (An External Reference Must be
Used in This Application)
 2002-2012 Microchip Technology Inc.
DS21457D-page 17
TC7116/A/TC7117/A
7.0
PACKAGING INFORMATION
7.1
Package Marking Information
Package marking data not available at this time.
7.2
Taping Form
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
44-Pin PQFP
7° Max.
.009 (0.23)
.005 (0.13)
Pin 1
.018 (0.45)
.012 (0.30)
.398 (10.10)
.390 (9.90)
.557 (14.15)
.537 (13.65)
.031 (0.80) Typ.
.398 (10.10)
.390 (9.90)
.557 (14.15)
.537 (13.65)
DS21457D-page 18
.041 (1.03)
.026 (0.65)
.010 (0.25) Typ.
.083 (2.10)
.075 (1.90)
.096 (2.45) Max.
 2002-2012 Microchip Technology Inc.
TC7116/A/TC7117/A
Component Taping Orientation for 44-Pin PQFP Devices
User Direction of Feed
Pin 1
W
P
Standard Reel Component Orientation
for 713 Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package
44-Pin PQFP
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
24 mm
16 mm
500
13 in
Note: Drawing does not represent total number of pins.
 2002-2012 Microchip Technology Inc.
DS21457D-page 19
TC7116/A/TC7117/A
7.3
Package Dimensions
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
40-Pin PDIP (Wide)
Pin 1
.555 (14.10)
.530 (13.46)
2.065 (52.45)
2.027 (51.49)
.610 (15.49)
.590 (14.99)
.200 (5.08)
.140 (3.56)
.040 (1.02)
.020 (0.51)
.150 (3.81)
.115 (2.92)
3° Min.
Dimensions: inches (mm)
.110 (2.79)
.090 (2.29)
Note:
.015 (0.38)
.008 (0.20)
.070 (1.78)
.045 (1.14)
.700 (17.78)
.610 (15.50)
.022 (0.56)
.015 (0.38)
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
40-Pin CERDIP (Wide)
Pin 1
.540 (13.72)
.510 (12.95)
.030 (0.76) Min.
.098 (2.49) Max.
2.070 (52.58)
2.030 (51.56)
.620 (15.75)
.590 (15.00)
.060 (1.52)
.020 (0.51)
.210 (5.33)
.170 (4.32)
.150 (3.81)
Min.
.200 (5.08)
.125 (3.18)
.015 (0.38)
.008 (0.20)
3° Min.
Dimensions: inches (mm)
.110 (2.79)
.090 (2.29)
DS21457D-page 20
.065 (1.65)
.045 (1.14)
.020 (0.51)
.016 (0.41)
.700 (17.78)
.620 (15.75)
 2002-2012 Microchip Technology Inc.
TC7116/A/TC7117/A
7.3
Package Dimensions (Continued)
Component Taping Orientation for 44-Pin PLCC Devices
User Direction of Feed
Pin 1
W
P
Standard Reel Component Orientation
for 713 Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
32 mm
24 mm
500
13 in
44-Pin PLCC
Note: Drawing does not represent total number of pins.
Dimensions: inches (mm)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
44-Pin PQFP
7° Max.
.009 (0.23)
.005 (0.13)
Pin 1
.018 (0.45)
.012 (0.30)
.041 (1.03)
.026 (0.65)
.398 (10.10)
.390 (9.90)
.557 (14.15)
.537 (13.65)
.031 (0.80) Typ.
.398 (10.10)
.390 (9.90)
.557 (14.15)
.537 (13.65)
.010 (0.25) Typ.
.083 (2.10)
.075 (1.90)
.096 (2.45) Max.
Dimensions: inches (mm)
 2002-2012 Microchip Technology Inc.
DS21457D-page 21
TC7116/A/TC7117/A
8.0
REVISION HISTORY
Revision D (December 2012)
Added a note to each package outline drawing.
DS21457D-page 22
 2002-2012 Microchip Technology Inc.
TC7116/A/TC7117/A
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART CODE
6 = LCD
7 = LED
TC711X X X
XXX
}
A or blank*
R (reversed pins) or blank (CPL pkg only)
* "A" parts have an improved reference TC
Package Code (see Device Selection Table)
 2002-2012 Microchip Technology Inc.
Advance Information
DS21457D-page 23
TC7116/A/TC7117/A
NOTES:
DS21457D-page 24
Advance Information
 2002-2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2002-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620768365
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
 2002-2012 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS21457D-page 25
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
Asia Pacific Office
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India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Japan - Osaka
Tel: 81-6-6152-7160
Fax: 81-6-6152-9310
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Hangzhou
Tel: 86-571-2819-3187
Fax: 86-571-2819-3189
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
China - Hong Kong SAR
Tel: 852-2943-5100
Fax: 852-2401-3431
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-213-7828
Fax: 886-7-330-9305
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
DS21457D-page 26
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
11/29/12
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