E8403A 100-500MHz Dual Channel, Digitally Programmed Pin Electronics Solution TEST AND MEASUREMENT PRODUCTS Description PRELIMINARY Features • • • • • • • • • • The E8403A has a Driver and Window Comparator receiver for each channel with performance settings to save power or maximize bandwidth. All level’s DACs for the Driver and Receiver are on-chip and are programmed via a high speed serial bus. Each of the level’s DACs have offset and gain registers for on-chip calibrations. The Driver circuit is capable of forcing two levels to the DUT (DVH and DVL) as well as a third voltage for a termination level (DVT) to terminate high-speed DUT signals to the Comparator receivers into a high quality 50Ω load. The Driver can also be configured to a high impedance (HiZ) state for an open termination of DUT signals. Waveform clamps are also available to clip the input signals from a DUT when not using the Driver as a termination. The clamps prevent reflections from returning to the DUT transmission line which can create timing errors and false triggering. All of the on-chip DAC levels and configuration registers for each channel may be programmed via SET commands. This PinCast method of programming allows all channels in a system to be programmed concurrently with a simple set command whereby any pin channel that had been assigned to that set will respond. Two Fully Integrated Pin Channels including: - 16-bit DACs for each level - Tri-level Driver - Window Receiver - Waveform Clamps Driver, Comparator maximum 8V span over -2 to +7V range Configurable Output Protection 50MHz Serial Bus Programming - SPI™/QSPI™/ MICROWIRE™ - Daisy-chainable Power Dissipation ~0.8W/Channel (quiescent, low performance, I/O Mode) ~0.9W/Channel (quiescent, high performance, I/O Mode) Pin and Software Compatible with E8400, E8404, E8405, E8410 and E8415 Digitally Programmable Performance/Power Differential Drive and Receive Functionality Optimal Small Swing Performance Small 11mm x 11mm Package Functional Block Diagram CAL_S[0] DC BUSY* CS* CLK SDIN SDOUT RESET* INT* SLEEP* TEST_MODE The two driver circuits may be placed into a differential drive mode. This reduces driver-to-driver skews to levels difficult to achieve by external deskewing. The two window comparators may also be placed into a differential receive mode. These features enable higher quality testing of differential signals to/from the DUT. C O N T R O L DUTIO_S[0] DVH DVT DHI* DHI DEN DEN* DUTIO_F[0] VCH DVL VCL QA* VCC CVA A QA VAA CH 0 VDD QB QB* B VEE CVB GND REF_IN_HI ANODE_S ANODE_F REF_IN_LO QB* Applications B QA A QA* • • • • • RREF1[0] CVB QB CH 1 RREF2[0] RREF1[1] CVA VCH Logic Testers Mixed-Signal Test Equipment Memory Testers Flash Memory Testers ASIC Verifiers DHI* DVL RREF2[1] VCL DUTIO_F[1] DHI DEN DEN* DVH DVT DUTIO_S[1] GND_SNS SPI and QSPI and trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. November 7, 2007 CAL_S[1] www.semtech.com