E8410A 1GHz Dual Channel, Digitally Programmed Pin Electronics Solution PRELIMINARY Features TEST AND MEASUREMENT PRODUCTS Description The E8410A has a Driver and Window Comparator receiver for each channel. Also present is a PMU per channel that also doubles as a resistive load function to the DUT. Each PMU has a 16-bit ADC for analog parametric measurements. Two Fully Integrated Pin Channels including: - 16-bit DACs for each level - Tri-level Driver - Window Receiver - Parametric Measurement Unit - Thevinen Load - Waveform Clamps - 16-bit ADC for PMU measurements Driver, Comparator and PMU maximum 8V span over -2 to +7V range • Configurable Output Protection • 4 PMU current ranges; 24mA, 2.4mA, 240μA, 24μA • On-Chip ADC for each PMU • 50MHz Serial Bus Programming - SPI™/QSPI™/ MICROWIRE™ - Daisy-chainable • Power Dissipation ~1.4W/Channel, quiescent (I/O mode) • Pin and Software Compatible to E8400, E8405, E8415 • Differential Drive and Receive Functionality • Optimal Small Swing Performance • Small 11mm x 11mm Package • • All level’s DACs for the Driver, Receiver and PMU are on-chip and are programmed via a high speed serial bus. Each of the level’s DACs have offset and gain registers for on-chip calibrations. The Driver circuit is capable of forcing two levels to the DUT (DVH and DVL) as well as a third voltage for a termination level (DVT) to terminate high-speed DUT signals to the Comparator receivers into a high quality 50Ω load. The Driver can also be configured to a high impedance (HiZ) state for an open termination of DUT signals. Waveform clamps are also available to clip the input signals from a DUT when not using the Driver as a termination. The clamps prevent reflections from returning to the DUT transmission line which can create timing errors and false triggering. All of the on-chip DAC levels and configuration registers for each channel may be programmed via SET commands. This PinCast method of programming allows all channels in a system to be programmed concurrently with a simple set command whereby any pin channel that had been assigned to that set will respond. Functional Block Diagram SERIAL IO The two driver circuits may be placed into a differential drive mode. This reduces driver-to-driver skews to levels difficult to achieve by external deskewing. The two window comparators may also be placed into a differential receive mode. These features enable higher quality testing of differential signals to/from the DUT. C O N T R O L CLH VFRC IFRC CLL PMU PMU IVMON0 TESTH PMUF TESTL PMUS DVH DVT DEN DHI VCH DVL VCL CVA QA A QB B CH 0 DUTIO[0] CVB Applications • • • • • CVB Logic Testers Mixed-Signal Test Equipment Memory Testers Flash Memory Testers ASIC Verifiers QB B QA A DUTIO[1] CVA VCH DVL VCL DHI DEN A/D IVMON_HI IVMON0 IVMON1 SPI and QSPI and trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. IVMON_LO A/D DVH DVT TESTL TESTH IFRC VFRC GND_SNS Revision 5, October 31, 2007 CH 1 PMUS PMU PMU IVMON1 PMUF CLL CLH www.semtech.com