STMICROELECTRONICS STL80N4LLF3

STL80N4LLF3
N-channel 40V - 0.0042Ω - 80A - PowerFLAT™ (6x5)
STripFET™ Power MOSFET for DC-DC conversion
General features
Type
VDSS
RDS(on)
ID
STL80N4LLF3
40V
<0.005Ω
20A (1)
1. When mounted on FR-4 board of 1 inch² , 2oz Cu,
t<10 sec
■
Improved die-to-footprint ratio
■
Very low profile package (1mm Max)
■
Very low thermal resistance
■
Conduction losses reduced
■
Switching losses reduced
PowerFLAT™( 6x5 )
Description
This series of product utilizes the latest advanced
design rules of ST’s proprietary STripFET™
Technology. The resulting Transistor is optimized
for low on-Resistance and minimal gate charge.
The chip-scaled PowerFLAT™ package allows a
significant board space saving, still boosting the
performance.
Internal schematic diagram
Applications
■
Switching application
Order codes
Part number
Marking
Package
Packaging
STL80N4LLF3
L80N4LLF3
PowerFLAT™ (6x5)
Tape & reel
November 2006
Rev 7
1/12
www.st.com
12
Contents
STL80N4LLF3
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................ 6
3
Test circuit
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12
................................................ 8
STL80N4LLF3
1
Electrical ratings
Electrical ratings
Table 1.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage (VGS = 0)
40
V
VGS
Gate- source voltage
±16
V
Gate- source voltage
±18
V
VGS
(1)
ID (2)
Drain current (continuous) at TC = 25°C
80
A
ID
(2)
Drain current (continuous) at TC = 100°C
50
A
ID
(3)
Drain current (continuous) at TC = 25°C
20
A
(4)
Drain current (pulsed)
80
A
PTOT (2)
Total dissipation at TC = 25°C
80
W
PTOT(3)
Total dissipation at TC = 25°C
4
W
0.03
W/°C
-55 to 150
°C
Value
Unit
Thermal resistance junction-case max
1.56
°C/W
Thermal operating junction-pcb max
31.2
°C/W
IDM
Derating factor
(3)
Storage temperature
Operating junction temperature
Tstg
Tj
1. Guaranteed for test time < 15ms
2. The value is rated according Rthj-c
3. When mounted on FR-4 board of 1 inch² , 2oz Cu, t < 10 sec
4.
Pulse width limited by safe operating area
Table 2.
Thermal resistance
Symbol
Rthj-c
Rthj-pcb
(1)
Parameter
1. When mounted on FR-4 board of 1 inch² , 2oz Cu, t<10 sec
3/12
Electrical characteristics
2
STL80N4LLF3
Electrical characteristics
(TCASE = 25°C unless otherwise specified)
Table 3.
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Drain-source
breakdown voltage
ID = 250 µA, VGS = 0
IDSS
Zero gate voltage
drain current (VGS = 0)
VDS = Max rating
VDS = Max rating@125 °C
10
100
µA
µA
IGSS
Gate-body leakage
current (VDS = 0)
VGS = ± 16V
±200
nA
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static drain-source on
resistance
VGS = 10V, ID = 10 A
VGS = 4.5V, ID =10 A
V(BR)DSS
Table 4.
Symbol
40
V
1
V
0.0042 0.005
0.005 0.007
Ω
Ω
Dynamic
Parameter
Test conditions
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS = 25V, f = 1 MHz,
VGS = 0
RG
Gate input resistance
f=1 MHz Gate DC Bias = 0
Test signal level = 20mV
open drain
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
VDD = 32V, ID = 20 A,
VGS = 4.5V
(see Figure 13)
Ciss
Coss
Crss
4/12
On/off states
Min.
Typ.
Max.
2530
574
29
1
Unit
pF
pF
pF
3
5
Ω
21.5
6.9
8.2
28
nC
nC
nC
STL80N4LLF3
Electrical characteristics
Table 5.
Symbol
td(on)
tr
td(off)
tr
Table 6.
Symbol
ISD
ISDM
(1)
VSD(2)
trr
Qrr
IRRM
Switching times
Parameter
Test conditions
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Min
Typ
Max Unit
17
25
62
9
VDD = 20V, ID = 10A,
RG= 4.7Ω VGS = 10V
(see Figure 15)
ns
ns
ns
ns
Source drain diode
Parameter
Test conditions
Min
Typ.
Source-drain current
Source-drain current (pulsed)
Forward on voltage
ISD = 20 A, VGS = 0
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 20A,VDD = 20V
di/dt = 100A/µs
Tj = 150°C(see Figure 14)
43
64
3
Max
Unit
20
80
A
A
1.2
V
ns
nC
A
1. Pulse width limited by safe operating area
2. Pulsed: Pulse duration = 300µs, duty cycle 1.5%
5/12
Electrical characteristics
STL80N4LLF3
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
Figure 3.
Output characterisics
Figure 4.
Transfer characteristics
Figure 5.
Normalized BVDSS vs temperature
Figure 6.
Static drain-source on resistance
6/12
STL80N4LLF3
Electrical characteristics
Figure 7.
Gate charge vs gate-source voltage Figure 8.
Figure 9.
Normalized gate threshold voltage
vs temperature
Capacitance variations
Figure 10. Normalized on resistance vs
temperature
Figure 11. Source-drain diode forward
characteristics
7/12
Test circuit
3
STL80N4LLF3
Test circuit
Figure 12. Switching times test circuit for
resistive load
Figure 13. Gate charge test circuit
Figure 14. Test circuit for inductive load
Figure 15. Unclamped inductive load test
switching and diode recovery times
circuit
Figure 16. Unclamped inductive waveform
8/12
Figure 17. Switching time waveform
STL80N4LLF3
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
9/12
Package mechanical data
STL80N4LLF3
PowerFLAT™ (6x5) MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
0.80
0.83
0.93
0.031
0.032
0.036
A1
0.02
0.05
0.0007
0.0019
A3
0.20
A
b
0.35
0.47
0.013
0.015
D
5.00
0.196
D1
4.75
0.187
D2
4.15
E
4.25
0.163
3.43
E4
2.58
e
3.53
2.63
2.68
0.80
0.167
0.226
3.48
0.135
1.27
0.70
0.165
0.018
0.236
5.75
E2
L
4.20
6.00
E1
10/12
0.40
0.007
0.137
0.139
0.103
0.105
0.050
0.90
0.027
0.031
0.035
STL80N4LLF3
5
Revision history
Revision history
Table 7.
Revision history
Date
Revision
Changes
13-May-2005
1
First release.
20-Jun-2005
2
Updated mechanical data
22-Jun-2005
3
New RG value on Table 6
04-Jan-2006
4
New footprint
06-Jun-2006
5
Complete version
04-Sep-2006
6
New template, no content change
22-Nov-2006
7
Corrected part number
11/12
STL80N4LLF3
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