STS17NH3LL N-channel 30 V - 0.004 Ω - 17 A - SO-8 STripFET™ Power MOSFET for DC-DC conversion Features Type VDSS RDS(on) ID STS17NH3LL 30V <0.0057Ω 17A(1) 1. This value is rated according to Rthj-pcb ■ Optimal RDS(on) x Qg trade-off @ 4.5 V ■ Conduction losses reduced ■ Improved junction-case thermal resistance ■ Low threshold device SO-8 Applications ■ Switching application Figure 1. Description Internal schematic diagram This device utilizes the latest advanced design rules of ST’s proprietary STripFET™ technology. This process coupled to unique metallization techniques realizes the most advanced low voltage Power MOSFET in SO-8 ever produced. Table 1. Device summary Order code Marking Package Packaging STS17NH3LL 17H3LL- SO-8 Tape & reel December 2007 Rev 3 1/12 www.st.com 12 Contents STS17NH3LL Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/12 ................................................ 8 STS17NH3LL 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit 30 V ± 16 V Drain current (continuous) at TC = 25°C 17 A Drain current (continuous) at TC = 100°C 10.6 A VDS Drain-source voltage (VGS = 0) VGS Gate- source voltage ID (1) ID IDM (2) Drain current (pulsed) 68 A Ptot (1) Total dissipation at TC = 25°C 2.7 W -55 to 150 °C Value Unit 47 °C/W Value Unit Tstg Tj Storage temperature Operating junction temperature 1. This value is rated according to Rthj-pcb 2. Pulse width limited by safe operating area Table 3. Thermal resistance Symbol Rthj-pcb(1) Parameter Thermal resistance junction-ambient max 1. When mounted on 1inch² FR-4 board, 2oz of Cu and t< 10sec Table 4. Symbol Avalanche data Parameter IAV Not-repetitive avalanche current 7.5 A EAS Single pulse avalanche energy (starting Tj=25°C, Id=IAV) 150 mJ 3/12 Electrical characteristics 2 STS17NH3LL Electrical characteristics (TCASE=25°C unless otherwise specified) Table 5. Symbol Parameter Test conditions Drain-source breakdown voltage ID = 250 µA, VGS = 0 IDSS Zero gate voltage drain current (VGS = 0) VDS = Max rating VDS = Max rating @125°C IGSS Gate-body leakage current (VDS = 0) VGS = ± 16 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on resistance VGS = 10 V, ID = 8.5 A VGS = 4.5 V, ID = 8.5 A V(BR)DSS Table 6. Symbol Min Typ. Max 30 Unit V 1 10 µA µA ±100 nA 1 V 0.004 0.005 0.0057 0.0075 Ω Ω Typ. Max Unit Dynamic Parameter Test conditions Min Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS=25 V, f=1 MHz VGS = 0 1810 565 41 Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD=15 V, ID=17 A VGS=4.5 V (see Figure 14) 18 4.8 5.3 24 nC nC nC Gate input resistance f=1 MHz Gate DC Bias = 0 Test signal level = 20 mV open drain 1.5 3 Ω RG 4/12 On/off states 0.5 pF pF pF STS17NH3LL Electrical characteristics Table 7. Symbol Switching times Parameter Test conditions Min Typ. Max Unit td(on) tr Turn-on delay time Rise time VDD = 15 V, ID = 8.5 A RG = 4.7 Ω , VGS = 10 V (see Figure 16) 8 65 ns ns td(off) tf Turn-off delay time Fall time VDD = 15 V, ID = 8.5 A RG = 4.7 Ω , VGS = 10 V (see Figure 16) 38 20 ns ns Table 8. Symbol ISD ISDM VSD (1) trr Qrr IRRM Source drain diode Parameter Test conditions Min Typ. Source-drain current Source-drain current (pulsed) Forward on voltage ISD = 17 A, VGS = 0 Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 17 A, di/dt = 100 A/µs VDD = 15 V, Tj = 25°C (see Figure 15) 22 32 1.9 Max Unit 17 68 A A 1.3 V ns nC A 1. Pulsed: pulse duration=300µs, duty cycle 1.5% 5/12 Electrical characteristics STS17NH3LL 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Normalized BVDSS vs temperature Figure 7. Static drain-source on resistance 6/12 STS17NH3LL Figure 8. Electrical characteristics Gate charge vs gate-source voltage Figure 9. Figure 10. Normalized gate threshold voltage vs temperature Capacitance variations Figure 11. Normalized on resistance vs temperature Figure 12. Source-drain diode forward characteristics 7/12 Test circuit 3 STS17NH3LL Test circuit Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test switching and diode recovery times circuit Figure 17. Unclamped inductive waveform 8/12 Figure 18. Switching time waveform STS17NH3LL 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 9/12 Package mechanical data STS17NH3LL SO-8 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. TYP. 1.75 0.1 MAX. 0.068 0.25 a2 0.003 0.009 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 D 4.8 5.0 0.188 0.196 E 5.8 6.2 0.228 0.244 c1 45 (typ.) 1.27 e e3 0.050 3.81 0.150 F 3.8 4.0 0.14 L 0.4 1.27 0.015 M S 10/12 MIN. 0.6 0.157 0.050 0.023 8 (max.) STS17NH3LL 5 Revision history Revision history Table 9. Document revision history Date Revision Changes 01-Aug-2006 1 First release 09-Jan-2007 2 Complete version 12-Dec-2007 3 Inserted new Table 4: Avalanche data 11/12 STS17NH3LL Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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