STS25NH3LL N-channel 30 V - 0.0032 Ω - 25 A - SO-8 STripFET™ III Power MOSFET for DC/DC conversion Features Type VDSS STS25NH3LL 30 V RDS(on) ID <0.0035 Ω 25 A (1) 1. This value is rated according to Rthj-pcb ■ Optimal RDS(on) x Qg trade off @ 4.5 V ■ Conduction losses reduced ■ Switching losses reduced SO-8 Applications ■ Switching applications Figure 1. Internal schematic diagram Description This device utilizes the advanced design rules of ST's proprietary STripFET™ technology. The innovative process coupled with unique metallization techniques makes it possible to produce the most advanced low voltage Power MOSFET in an SO-8 package. The device is therefore suitable for demanding DC-DC converter applications where high efficiency at high output current is needed. Table 1. Device summary Order code Marking Package Packaging STS25NH3LL 25H3LL SO-8 Tape & reel November 2007 Rev 10 1/11 www.st.com 11 Electrical ratings 1 STS25NH3LL Electrical ratings Table 2. Symbol Absolute maximum ratings Parameter Value Unit 30 V ± 18 V VDS Drain-source voltage (VGS = 0) VGS Gate-source voltage ID(1) Drain current (continuous) at TC = 25 °C 25 A ID Drain current (continuous) at TC=100 °C 18 A Drain current (pulsed) 100 A Total dissipation at TC = 25 °C 3.2 W Value Unit 47 °C/W -55 to 175 °C Value Unit IDM(2) PTOT (1) 1. This value is rated according to Rthj-pcb 2. Pulse width limited by safe operating area Table 3. Symbol Rthj-pcb (1) Tj Tstg Thermal data Parameter Thermal resistance junction-amb max Operation junction temperature Storage temperature 1. When mounted on FR-4 board of 1 inch², 2 oz Cu, t< 10 sec Table 4. Symbol 2/11 Avalanche characteristics Parameter IAV Not-repetitive avalanche current (pulse width limited by Tj max.) 12.5 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAV, VDD = 24 V) 1.3 J STS25NH3LL 2 Electrical characteristics Electrical characteristics (TCASE=25°C unless otherwise specified) Table 5. Symbol V(BR)DSS On/off states Parameter Drain-source breakdown voltage Test conditions ID = 250 µA, VGS= 0 Zero gate voltage drain current (VGS = 0) IGSS Gate body leakage current (VDS = 0) VGS = ± 18 V VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA RDS(on) Static drain-source on resistance VGS= 10 V, ID= 12.5 A Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd QOSS (2) RG Typ. Max. 30 VDS = Max rating @125 °C 1 10 µA µA ±100 nA 1 V 0.0032 0.0035 0.004 0.005 VGS= 4.5 V, ID= 12.5 A Unit V VDS = Max rating, IDSS Table 6. Min. Ω Ω Dynamic Parameter Test conditions Min. Typ. Max. Unit Forward transconductance VDS = 10 V, ID = 12.5 A 30 S Input capacitance Output capacitance Reverse transfer capacitance VDS =25 V, f = 1 MHz, VGS = 0 4450 655 50 pF pF pF Total gate charge Gate-source charge Gate-drain charge VDD = 15 V, ID = 25 A Output charge VDD= 24 V, VGS = 0 Gate input resistance f = 1 MHz, gate DC bias =0 test signal level = 20 mV open drain 30 12.5 10 VGS = 4.5 V Figure 14 40 23 1 2 nC nC nC nC 3 Ω 1. Pulsed: pulse duration=300 µs, duty cycle 1.5% 2. QOSS = Coss * ∆ Vin, Coss = Cgd + Cds 3/11 Electrical characteristics STS25NH3LL Table 7. Switching times Symbol Parameter td(on) tr td(off) tf Table 8. Symbol Turn-on delay time Rise time Turn-off delay time Fall time Test conditions Typ. Max. 18 50 75 8 VDD= 15 V, ID = 12.5 A, RG= 4.7 Ω, VGS = 10 V Figure 13 Unit ns ns ns ns Source drain diode Max Unit Source-drain current 25 A ISDM(1) Source-drain current (pulsed) 100 A VSD(2) Forward on voltage 1.3 V ISD trr Qrr IRRM Parameter Reverse recovery time Reverse recovery charge Reverse recovery current Test conditions Min Typ. ISD = 25 A, VGS = 0 ISD = 25 A, di/dt = 100 A/µs, VDD = 25 V, TJ = 150 °C Figure 18 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300 µs, duty cycle 1.5% 4/11 Min. 32 34 2.1 ns nC A STS25NH3LL Electrical characteristics 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Normalized BVDSS vs temperature Figure 7. Static drain-source on resistance 5/11 Electrical characteristics Figure 8. Gate charge vs gate-source voltage Figure 9. Figure 10. Normalized gate threshold voltage vs temperature Figure 12. Source-drain diode forward characteristics 6/11 STS25NH3LL Capacitance variations Figure 11. Normalized on resistance vs temperature STS25NH3LL 3 Test circuit Test circuit Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test switching and diode recovery times circuit Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform 7/11 Package mechanical data 4 STS25NH3LL Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 8/11 STS25NH3LL Package mechanical data SO-8 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.25 a2 MAX. 0.003 0.009 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.25 0.5 0.010 0.019 D 4.8 5.0 0.188 0.196 E 5.8 6.2 0.228 c1 45 (typ.) 1.27 e e3 3.81 0.150 F 3.8 4.0 0.14 L 0.4 1.27 0.015 M S 0.244 0.050 0.6 0.157 0.050 0.023 8 (max.) 9/11 Revision history 5 STS25NH3LL Revision history Table 9. 10/11 Document revision history Date Revision Changes 19-Nov-2007 10 Document status promoted from preliminary data to datasheet STS25NH3LL Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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