TS912 Rail-to-Rail CMOS Dual Operational Amplifier ■ Rail-to-rail input and output voltage ranges ■ Single (or dual) supply operation from 2.7V to 16V ■ Extremely low input bias current: 1pA typ. ■ Low input offset voltage: 2mV max. ■ Specified for 600Ω and 100Ω loads ■ Low supply current: 200µA/ampli (VCC = 3V) ■ Latch-up immunity ■ ESD tolerance: 3kV ■ Spice macromodel included in this specification N DIP-8 (Plastic Package) D SO-8 (Plastic Micropackage) Description Pin connections (top view) The TS912 is a rail-to-rail CMOS dual operational amplifier designed to operate with a single or dual supply voltage. The input voltage range Vicm includes the two supply rails VCC+ and VCC-. Output 1 1 Inverting Input 1 2 - Non-inverting Input 1 3 + VCC 4 8 VCC + 7 Output 2 - 6 Inverting Input 2 + 5 Non-inverting Input 2 The output reaches: ■ VCC- +30mV, VCC+ -40mV, with RL = 10kΩ ■ VCC- +300mV, VCC+ -400mV, with R L = 600Ω This product offers a broad supply voltage operating range from 2.7V to 16V and a supply current of only 200µA/amp (VCC = 3V). Source and sink output current capability is typically 40mA (at VCC = 3V), fixed by an internal limitation circuit. February 2006 Rev. 4 1/19 www.st.com 19 Order Codes 1 TS912 Order Codes Part Number Package Packing Marking TS912IN DIP8 Tube TS912IN TS912ID/IDT SO-8 Tube or Tape & Reel 912I TS912AIN DIP8 Tube TS912AIN TS912AID/AIDT TS912BID/BIDT TS912IYD/IYDT TS912AIYD/AIYDT 2/19 Temperature Range -40, +125°C SO-8 SO-8 SO-8 (automotive grade level) 912AI Tube or Tape & Reel 912BI 912IY 912AIY TS912 Absolute Maximum Ratings and Operating Conditions 2 Absolute Maximum Ratings and Operating Conditions Table 1. Key parameters and their absolute maximum ratings Symbol Parameter (1) VCC Supply voltage Vid Differential Input Voltage (2) (3) Value Unit 18 VCC ±18 Vid -0.3 to 18 Vi Vi Input Voltage Iin Current on Inputs ±50 Iin Io Current on Outputs ±130 Io Toper Operating Free Air Temperature Range TS912I/AI/BI -40 to + 125 Toper Tstg Storage Temperature -65 to +150 Tstg 150 Tj 85 125 °C/W Tj Maximum Junction Temperature (4) Rthja Thermal Resistance Junction to Ambient DIP8 SO-8 Rthjc Thermal Resistance Junction to Case DIP8 SO-8 41 40 °C/W HBM: Human Body Model(5) 3 kV 200 V 1500 kV ESD MM: Machine Model(6) CDM: Charged Device Model 1. All voltages values, except differential voltage are with respect to network ground terminal. 2. Differential voltages are non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of input and output voltages must never exceed VCC+ +0.3V. 4. Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous short-circuit on all amplifiers. These values are typical. 5. Human body model, 100pF discharged through a 1.5kΩ resistor into pin of device. 6. Machine model ESD, a 200pF cap is charged to the specified voltage, then discharged directly into the IC with no external series resistor (internal resistor < 5Ω), into pin to pin of device. Table 2. Operating conditions Symbol Parameter VCC Supply voltage Vicm Common Mode Input Voltage Range Value Unit 2.7 to 16 V VCC- -0.2 to VCC+ +0.2 V 3/19 Typical Application Information TS912 3 Typical Application Information Figure 1. Schematic diagram (1/2 TS912) VCC Non-inverting Input Internal Vref Inverting Input Output VCC 4/19 Electrical Characteristics 4 Electrical Characteristics Table 3. VCC+ = 3V, Vcc- = 0V, RL, CL connected to V CC/2, Tamb = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit 10 5 2 12 7 3 mV Vio Input Offset Voltage (Vic = Vo = VCC/2)TS912 TS912A TS912B Tmin. ≤ Tamb ≤ Tmax.TS912 TS912A TS912B ∆Vio Input Offset Voltage Drift 5 Iio Input Offset Current (1) Tmin. ≤ Tamb ≤ Tmax. 1 100 200 pA Iib Input Bias Current 1) Tmin. ≤ Tamb ≤ Tmax. 1 150 300 pA ICC Supply Current (per amplifier, A VCL = 1, no load) Tmin. ≤ Tamb ≤ Tmax. 200 300 400 µA CMR Common Mode Rejection Ratio Vic = 0 to 3V, Vo = 1.5V SVR Supply Voltage Rejection Ratio (VCC+ = 2.7 to 3.3V, Vo = VCC/2) Avd Large Signal Voltage Gain (RL = 10kΩ, Vo = 1.2V to 1.8V) Tmin. ≤ Tamb ≤ Tmax. VOH High Level Output Voltage (Vid = 1V) RL = 100kΩ RL = 10kΩ RL = 600Ω RL = 100Ω Tmin. ≤ Tamb ≤ Tmax.RL = 10kΩ RL = 600Ω VOL Io 5/19 TS912 70 dB 50 80 dB 3 2 10 2.95 2.9 2.3 V/mV 2.96 2.6 2 V 2.8 2.1 Low Level Output Voltage (Vid = -1V) RL = 100kΩ RL = 10kΩ RL = 600Ω RL = 100Ω Tmin. ≤ Tamb ≤ Tmax.RL = 10kΩ RL = 600Ω Output Short Circuit Current (V id = ±1V) Source (V o = VCC-) Sink (V o = VCC+) µV/°C 30 300 900 50 70 400 mV 100 600 20 20 40 40 mA GBP Gain Bandwidth Product (A VCL = 100, RL = 10kΩ, CL = 100pF, f = 100kHz) 0.8 MHz SR+ Slew Rate (A VCL = 1, RL = 10kΩ, CL = 100pF, Vi = 1.3V to 1.7V) 0.4 V/µs SR- Slew Rate (A VCL = 1, RL = 10kΩ, CL = 100pF, Vi = 1.3V to 1.7V) 0.3 V/µs Electrical Characteristics Table 3. TS912 VCC+ = 3V, Vcc- = 0V, RL, CL connected to V CC/2, Tamb = 25°C (unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit φm Phase Margin 30 Degrees en Equivalent Input Noise Voltage (Rs = 100Ω, f = 1kHz) 30 nV/√Hz 1. Maximum values including unavoidable inaccuracies of the industrial test Table 4. VCC+ = 5V, Vcc- = 0V, R L, CL connected to V CC/2, Tamb = 25°C (unless otherwise specified) Symbol Vio Input Offset Voltage (Vic = Vo = V CC/2)TS912 TS912A TS912B Tmin. ≤ Tamb ≤ T max.TS912 TS912A TS912B ∆Vio Input Offset Voltage Drift Min. Input Offset Current Tmin. ≤ Tamb ≤ T max. Iib Input Bias Current 1) Tmin. ≤ Tamb ≤ T max. ICC Supply Current (per amplifier, A VCL = 1, no load) Tmin. ≤ Tamb ≤ T max. Typ. Max. Unit 10 5 2 12 7 3 mV µV/°C 5 (1) Iio 1 100 200 pA 1 150 300 pA 230 350 450 µA CMR Common Mode Rejection Ratio Vic = 1.5 to 3.5V, V o = 2.5V 60 85 dB SVR Supply Voltage Rejection Ratio (V CC+ = 3 to 5V, V o = VCC/2) 55 80 dB Avd Large Signal Voltage Gain (R L = 10kΩ, Vo = 1.5V to 3.5V) Tmin. ≤ Tamb ≤ T max. 10 7 40 VOH High Level Output Voltage (Vid = 1V) RL = 100kΩ RL = 10kΩ RL = 600Ω RL = 100Ω Tmin. ≤ Tamb ≤ T max.RL = 10kΩ RL = 600Ω VOL Io GBP 6/19 Parameter 4.95 4.9 4.25 Gain Bandwidth Product (A VCL = 100, RL = 10kΩ, CL = 100pF, f = 100kHz) 4.95 4.55 3.7 V 4.8 4.1 Low Level Output Voltage (V id = -1V) RL = 100kΩ RL = 10kΩ RL = 600Ω RL = 100Ω Tmin. ≤ Tamb ≤ T max.RL = 10kΩ RL = 600Ω Output Short Circuit Current (V id = ±1V) Source (V o = VCC -) Sink (Vo = VCC+) V/mV 40 350 1400 50 100 500 mV 150 750 45 45 65 65 mA 1 MHz Electrical Characteristics Table 4. TS912 VCC+ = 5V, Vcc- = 0V, R L, CL connected to V CC/2, Tamb = 25°C (unless otherwise specified) Symbol Parameter Min. SR+ Slew Rate (AVCL = 1, R L = 10kΩ, CL = 100pF, Vi = 1V to 4V) 0.8 SR- Slew Rate (AVCL = 1, R L = 10kΩ, CL = 100pF, Vi = 1V to 4V) 0.6 V/µs en Equivalent Input Noise Voltage (R s = 100Ω, f = 1kHz) 30 nV/√Hz 120 dB 30 Degrees VO1/V O2 Channel Separation (f = 1kHz) φm Phase Margin Typ. Max. Unit 1. Maximum values including unavoidable inaccuracies of the industrial test Table 5. VCC+ = 10V, Vcc- = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) Symbol 7/19 Parameter Vio Input Offset Voltage (Vic = Vo = VCC/2)TS912 TS912A TS912B Tmin. ≤ Tamb ≤ Tmax.TS912 TS912A TS912B ∆Vio Input Offset Voltage Drift Min. Input Offset Current Tmin. ≤ Tamb ≤ Tmax. Iib Input Bias Current 1) Tmin. ≤ Tamb ≤ Tmax. ICC Supply Current (per amplifier, A VCL = 1, no load) Tmin. ≤ Tamb ≤ Tmax. CMR Common Mode Rejection Ratio Vic = 3 to 7V, Vo = 5V Vic = 0 to 10V, Vo = 5V SVR Max. Unit 10 5 2 12 7 3 mV µV/°C 5 (1) Iio Typ. 1 100 200 pA 1 150 300 pA 400 600 700 µA 60 50 90 75 dB Supply Voltage Rejection Ratio (VCC + = 5 to 10V, Vo = VCC/2) 60 90 dB Avd Large Signal Voltage Gain (RL = 10kΩ, Vo = 2.5V to 7.5V) Tmin. ≤ Tamb ≤ Tmax. 15 10 50 VOH High Level Output Voltage (Vid = 1V) RL = 100kΩ RL = 10kΩ RL = 600Ω RL = 100Ω Tmin. ≤ Tamb ≤ Tmax.RL = 10kΩ RL = 600Ω 9.95 9.85 9 9.8 8.8 9.95 9.35 7.8 V/mV V Electrical Characteristics Table 5. VCC+ = 10V, Vcc- = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) Symbol VOL Io TS912 Parameter Low Level Output Voltage (Vid = -1V) RL = 100kΩ RL = 10kΩ RL = 600Ω RL = 100Ω Tmin. ≤ Tamb ≤ Tmax.RL = 10kΩ RL = 600Ω Output Short Circuit Current (V id = ±1V) Source (V o = VCC-) Sink (V o = VCC+) Typ. 50 650 2300 Max. Unit 50 150 800 mV 150 900 45 50 65 75 mA GBP Gain Bandwidth Product (A VCL = 100, RL = 10kΩ, CL = 100pF, f = 100kHz) 1.4 MHz SR+ Slew Rate (A VCL = 1, RL = 10kΩ, CL = 100pF, Vi = 2.5V to 7.5V) 1.3 V/µs SR- Slew Rate (A VCL = 1, RL = 10kΩ, CL = 100pF, Vi = 2.5V to 7.5V) 0.8 φm Phase Margin 40 Degrees en Equivalent Input Noise Voltage (Rs = 100Ω, f = 1kHz) 30 nV/√Hz Total Harmonic Distortion (A VCL = 1, RL = 10kΩ, CL = 100pF, Vo = 4.75V to 5.25V, f = 1kHz) 0.02 % Input Capacitance 1.5 pF THD Cin 1. Maximum values including unavoidable inaccuracies of the industrial test 8/19 Min. Electrical Characteristics Figure 2. TS912 Supply current (each amplifier) vs. supply voltage Figure 3. 5 Tamb = 25°C A VCL = 1 V O = VCC / 2 500 OUTPUT VOLTAGE, VOH (V) SUPPLY CURRENT, I CC ( m A) 600 400 300 200 100 0 High level output voltage vs. high level output current 4 8 12 2 VCC = +3V 1 -70 SUPPLY VOLTAGE, V CC (V) Figure 4. Low level output voltage vs. low level output current Figure 5. T amb = 25 ° C V id = -100mV VCC = +3V 2 VCC = +5V 1 0 -14 0 14 28 42 56 70 V CC = 10V V i = 5V No load 10 1 25 50 75 100 125 TEMPERATURE, T amb ( °C) High level output voltage vs. high level output current Figure 7. Low level output voltage vs. low level output current T amb = 25° C Vid = 100mV 16 OUTPUT VOLTAGE, VOL (V) 10 20 OUTPUT VOLTAGE, VOH (V) -28 Input bias current vs. temperature OUTPUT CURRENT, I OL (mA) Figure 6. -42 100 INPUT BIAS CURRENT, I ib (pA) OUTPUT VOLTAGE, V OL (V) 3 -56 OUTPUT CURRENT, I OH (mA) 5 4 VCC = +5V 3 0 16 T amb = 25 °C V id = 100mV 4 VCC = +16V 12 VCC = +10V 8 4 8 T amb = 25 ° C V id = -100mV 6 V CC = 16V 4 V CC = 10V 2 0 -70 -56 -42 -28 -14 OUTPUT CURRENT, IOH (mA) 9/19 0 0 14 28 42 56 70 OUTPUT CURRENT, I OL (mA) Electrical Characteristics GAIN GAIN (dB) 40 30 PHASE 20 Phase Margin Tamb = 25°C VCC = 10V R L = 10k W C L = 100pF A VCL = 100 10 0 0 45 90 135 Gain Bandwidth Product 180 -10 10 2 10 3 4 5 6 10 10 10 FREQUENCY, f (Hz) 10 7 1000 600 200 0 40 30 8 12 30 16 Tamb = 25°C R L = 600W C L = 100pF 1000 600 200 4 8 12 SUPPLY VOLTAGE, VCC (V) 10/19 16 10 2 16 10 3 0 Phase Margin Tamb = 25°C V CC = 10V R L = 600W C L = 100pF A VCL = 100 20 10 135 Gain Bandwidth Product 4 5 10 10 10 FREQUENCY, f (Hz) 90 180 6 10 7 Figure 13. Phase margin vs. supply voltage PHASE MARGIN, fm (Degrees) GAIN BANDW. PROD., GBP (kHz) Figure 12. Gain bandwidth product vs. supply voltage 0 12 45 PHASE SUPPLY VOLTAGE, VCC (V) 1400 8 GAIN 0 10 20 1800 4 40 GAIN (dB) PHASE MARGIN, f m (Degrees) 1400 50 Tamb = 25°C R L = 10kW C L = 100pF 4 Tamb = 25°C R L = 10kW C L = 100pF Figure 11. Gain and phase vs. frequency 60 0 1800 SUPPLY VOLTAGE, VCC (V) Figure 10. Phase margin vs. supply voltage 50 Gain bandwidth product vs. supply voltage PHASE (Degrees) 50 Figure 9. GAIN BANDW. PROD., GBP (kHz) Gain and phase vs. frequency PHASE (Degrees) Figure 8. TS912 60 Tamb = 25°C R L = 600W C L = 100pF 50 40 30 20 0 4 8 12 SUPPLY VOLTAGE, VCC (V) 16 Electrical Characteristics TS912 EQUIVALENT INPUT VOLTAGE NOISE (nV/VHz) Figure 14. Input voltage noise vs. frequency 150 VCC = 10V Tamb = 25°C RS = 100W 100 50 0 10 100 1000 FREQUENCY (Hz) 11/19 10000 Macromodels TS912 5 Macromodels 5.1 Important note concerning this macromodel Please consider following remarks before using this macromodel. – All models are a trade-off between accuracy and complexity (i.e. simulation time). – Macromodels are not a substitute to breadboarding; rather, they confirm the validity of a design approach and help to select surrounding component values. – A macromodel emulates the NOMINAL performance of a TYPICAL device within SPECIFIED OPERATING CONDITIONS (i.e. temperature, supply voltage, etc.). Thus the macromodel is often not as exhaustive as the datasheet, its goal is to illustrate the main parameters of the product. – Data issued from macromodels used outside of its specified conditions (Vcc, Temperature, etc.) or even worse: outside of the device operating conditions (Vcc, Vicm, etc.) are not reliable in any way. In Section 5.2 and Section 5.4, the electrical characteristics resulting from the use of these macromodels are presented. 5.2 Electrical characteristics from macromodelization Table 6. Electrical characteristics resulting from macromodel simulation at V CC+ = 3V, V CC- = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) Symbol Conditions Vio Unit 0 mV Avd RL = 10kΩ 10 V/mV ICC No load, per operator 200 µA -0.2 to 3.2 V Vicm 5.3 Value VOH RL = 10kΩ 2.96 V VOL RL = 10kΩ 30 mV Isink VO = 3V 40 mA Isource VO = 0V 40 mA GBP RL = 10kΩ, C L = 100pF 0.8 MHz SR RL = 10kΩ, C L = 100pF 0.3 V/µs Macromodel code Applies to: TS912 (VCC = 3V) ** Standard Linear Ics Macromodels, 1993. ** CONNECTIONS : * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT 12/19 Macromodels TS912 * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY .SUBCKT TS912_3 1 3 2 4 5 (analog) ***************************************************** ***** .MODEL MDTH D IS=1E-8 KF=6.564344E-14 CJO=10F * INPUT STAGE CIP 2 5 1.000000E-12 CIN 1 5 1.000000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 6.500000E+00 RIN 15 16 6.500000E+00 RIS 11 15 1.271505E+01 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 0.000000E+00 VOFN 13 14 DC 0 IPOL 13 5 4.000000E-05 CPS 11 15 2.125860E-08 DINN 17 13 MDTH 400E-12 VIN 17 5 0.000000e+00 DINR 15 18 MDTH 400E-12 VIP 4 18 0.000000E+00 FCP 4 5 VOFP 5.000000E+00 FCN 5 4 VOFN 5.000000E+00 * AMPLIFYING STAGE FIP 5 19 VOFP 2.750000E+02 FIN 5 19 VOFN 2.750000E+02 RG1 19 5 1.916825E+05 RG2 19 4 1.916825E+05 CC 19 29 2.200000E-08 HZTP 30 29 VOFP 1.3E+03 HZTN 5 30 VOFN 1.3E+03 DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 3800 VIPM 28 4 150 HONM 21 27 VOUT 3800 VINM 5 27 150 EOUT 26 23 19 5 1 VOUT 23 5 0 ROUT 26 3 75 COUT 3 5 1.000000E-12 DOP 19 68 MDTH 400E-12 VOP 4 25 1.724 HSCP 68 25 VSCP1 0.8E8 DON 69 19 MDTH 400E-12 VON 24 5 1.7419107 HSCN 24 69 VSCN1 0.8E+08 VSCTHP 60 61 0.0875 ** VSCTHP = le seuil au dessus de vio * 500 ** c.a.d 275U-000U dus a l’offset DSCP1 61 63 MDTH 400E-12 VSCP1 63 64 0 ISCP 64 0 1.000000E-8 DSCP2 0 64 MDTH 400E-12 DSCN2 0 74 MDTH 400E-12 ISCN 74 0 1.000000E-8 VSCN1 73 74 0 DSCN1 71 73 MDTH 400E-12 VSCTHN 71 70 -0.55 ** VSCTHN = le seuil au dessous de vio * 2000 13/19 Macromodels TS912 ** c.a.d -375U-000U dus a l’offset ESCP 60 0 2 1 500 ESCN 70 0 2 1 -2000 .ENDS 5.4 Electrical characteristics from macromodelization Table 7. Electrical characteristics resulting from macromodel simulation at V CC+ = 5V, V CC- = 0V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise specified) Symbol Conditions Vio Unit 0 mV Avd RL = 10kΩ 50 V/mV ICC No load, per operator 230 µA -0.2 to 5.2 V Vicm 5.5 Value VOH RL = 10kΩ 4.95 V VOL RL = 10kΩ 40 mV Isink VO = 5V 65 mA Isource VO = 0V 65 mA GBP RL = 10kΩ, C L = 100pF 1 MHz SR RL = 10kΩ, C L = 100pF 0.8 V/µs Macromodel code Applies to: TS912 (VCC = 5V) ** Standard Linear Ics Macromodels, 1993. ** CONNECTIONS : * 1 INVERTING INPUT * 2 NON-INVERTING INPUT * 3 OUTPUT * 4 POSITIVE POWER SUPPLY * 5 NEGATIVE POWER SUPPLY * 6 STANDBY .SUBCKT TS912_5 1 3 2 4 5 (analog) ***************************************************** ***** .MODEL MDTH D IS=1E-8 KF=6.564344E-14 CJO=10F * INPUT STAGE CIP 2 5 1.000000E-12 CIN 1 5 1.000000E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 6.500000E+00 RIN 15 16 6.500000E+00 RIS 11 15 7.322092E+00 DIP 11 12 MDTH 400E-12 DIN 15 14 MDTH 400E-12 VOFP 12 13 DC 0.000000E+00 VOFN 13 14 DC 0 IPOL 13 5 4.000000E-05 CPS 11 15 2.498970E-08 DINN 17 13 MDTH 400E-12 14/19 Macromodels TS912 VIN 17 5 0.000000e+00 DINR 15 18 MDTH 400E-12 VIP 4 18 0.000000E+00 FCP 4 5 VOFP 5.750000E+00 FCN 5 4 VOFN 5.750000E+00 ISTB0 5 4 500N * AMPLIFYING STAGE FIP 5 19 VOFP 4.400000E+02 FIN 5 19 VOFN 4.400000E+02 RG1 19 5 4.904961E+05 RG2 19 4 4.904961E+05 CC 19 29 2.200000E-08 HZTP 30 29 VOFP 1.8E+03 HZTN 5 30 VOFN 1.8E+03 DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 3800 VIPM 28 4 230 HONM 21 27 VOUT 3800 VINM 5 27 230 EOUT 26 23 19 5 1 VOUT 23 5 0 ROUT 26 3 82 COUT 3 5 1.000000E-12 DOP 19 68 MDTH 400E-12 VOP 4 25 1.724 HSCP 68 25 VSCP1 0.8E+08 DON 69 19 MDTH 400E-12 VON 24 5 1.7419107 HSCN 24 69 VSCN1 0.8E+08 VSCTHP 60 61 0.0875 ** VSCTHP = le seuil au dessus de vio * 500 ** c.a.d 275U-000U dus a l’offset DSCP1 61 63 MDTH 400E-12 VSCP1 63 64 0 ISCP 64 0 1.000000E-8 DSCP2 0 64 MDTH 400E-12 DSCN2 0 74 MDTH 400E-12 ISCN 74 0 1.000000E-8 VSCN1 73 74 0 DSCN1 71 73 MDTH 400E-12 VSCTHN 71 70 -0.55 ** VSCTHN = le seuil au dessous de vio * 2000 ** c.a.d -375U-000U dus a l’offset ESCP 60 0 2 1 500 ESCN 70 0 2 1 -2000 .ENDS 15/19 Package Mechanical Data 6 TS912 Package Mechanical Data In order to meet environmental requirements, ST offers these devices in ECOPACK ® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 6.1 DIP-8 Package Plastic DIP-8 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 3.3 0.7 B 1.39 1.65 0.055 B1 0.91 1.04 0.036 b1 0.028 0.5 0.38 0.065 0.041 0.020 0.5 D 0.015 0.020 9.8 0.386 E 8.8 0.346 e 2.54 0.100 e3 7.62 0.300 e4 7.62 0.300 F 7.1 I 4.8 L Z 0.280 0.189 3.3 0.44 MAX. 0.130 a1 b TYP. 0.130 1.6 0.017 0.063 P001F 16/19 Package Mechanical Data 6.2 TS912 SO-8 Package SO-8 MECHANICAL DATA DIM. mm. MIN. TYP inch MAX. MIN. TYP. MAX. 0.053 0.069 A 1.35 1.75 A1 0.10 0.25 0.04 0.010 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 4.80 5.00 0.189 0.197 E 3.80 4.00 0.150 0.157 e 1.27 0.050 H 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 k ddd 8˚ (max.) 0.1 0.04 0016023/C 17/19 Revision History TS912 7 Revision History Table 8. Document revision history Date Revision Dec. 2001 1 First Release July 2005 2 1 - PPAP references inserted in the datasheet see Table : on page 1 2 - ESD protection inserted in Table l: Key parameters and their absolute maximum ratings on page 2 Oct. 2005 3 The following changes were made in this revision: – Some errors in the Order Codes table was corrected on page 1. – Reorganization of Chapter 5: Macromodels on page 12. Feb. 2006 4 – Parameters added in Table 1. on page 3 (Tj, ESD, Rthja, Rthjc). 18/19 Changes TS912 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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