STV300NH02L N-channel 24V - 0.8mΩ - 280A - PowerSO-10 STripFET™ Power MOSFET PRELIMINARY DATA General features Type VDSS RDS(on) ID STV300NH02L 24V 0.001Ω 280A 10 ■ RDS(on)*Qg industry’s benchmark ■ Conduction losses reduced ■ Low profile, very low parasitic inductance ■ Switching losses reduced 1 PowerSO-10 Description Internal schematic diagram This product utilizes the latest advanced design rules of ST’s proprietary STripFET™ technology. This is suitable for high current OR-ing application. Applications ■ Switching application – OR-ing – Specially designed and optimized for high efficiency DC/DC converters. Connection diagram (top view) Order code Part number Marking Package Packaging STV300NH02L V300NH02L PowerSO-10 Tape & reel February 2007 Rev 1 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/9 www.st.com 9 Electrical ratings 1 STV300NH02L Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit 24 V VDS Drain-source voltage (vgs = 0) VGS Gate-source voltage ± 20 V ID (1) Drain current (continuous) at TC = 25°C 280 A ID (1) Drain current (continuous) at TC = 100°C 200 A Drain current (pulsed) 1120 A Total dissipation at TC = 25°C 300 W 2 W/°C 2296 mJ -55 to 175 °C Rthj-case Thermal resistance junction-case max 0.5 °C/W Rthj-amb Thermal resistance junction-ambient max 50 °C/W IDM (2) PTOT (3) Derating factor EAS (4) Tstg Tj Single pulse avalanche energy Storage temperature Operating junction temperature 1. This value is limited by package 2. Pulse with limited by safe operating area 3. This value is rated according to Rthj-c 4. Starting Tj = 25°C, ID = 60A, VDD = 20V Table 2. 2/9 Thermal data STV300NH02L 2 Electrical characteristics Electrical characteristics (Tcase =25°C unless otherwise specified) Table 3. Symbol V(BR)DSS On /off states Parameter Drain-source breakdown voltage Test conditions ID = 1mA, VGS= 0 IDSS VDS = Max rating, Zero gate voltage drain current (VGS = 0) VDS = Max rating, Tc=125°C IGSS Gate body leakage current (VDS = 0) Min. Typ. 24 1 10 µA µA ±100 nA 1.5 2 V 1 mΩ VDS = ± 20V Gate threshold voltage VDS= VGS, ID = 250µA RDS(on) Static drain-source on resistance VGS= 10V, ID= 80A 0.8 RDS(on) Static drain-source on resistance VGS= 10V, ID= 80A @100°C 1.1 Symbol Ciss Coss Crss Qg mΩ Dynamic Parameter Input capacitance Output capacitance Reverse transfer capacitance Test conditions VDS = 15V, f = 1 MHz, VGS =0 VDD= 12V, ID= 120A, VGS= 10V Qgd Total gate charge Gate-source charge Gate-drain charge RG Gate input resistance VDS = 0V, f = 1 MHz, VGS =0 Qgs 1 Unit V VGS(th) Table 4. Max. (see Figure 2) Min. Typ. Max. Unit 7055 3251 307 pF pF pF 109.4 30.2 26.4 nC nC nC 4.4 Ω 3/9 Electrical characteristics Table 5. Switching times Symbol Parameter td(on) tr td(off) tf Table 6. Turn-on delay time Rise time Turn-off delay time Fall time Parameter ISD Source-drain current Source-drain current (pulsed) VSD (1) trr Qrr IRRM trr Qrr IRRM 1. Test conditions Min. VDD = 12V, ID = 60A RG= 4.7Ω, VGS= 10V, (see Figure 1) VDD = 12V, ID = 60A RG= 4.7Ω, VGS= 10V, (see Figure 1) Typ. Max Unit 18 275 ns ns 138 94.4 ns ns Source drain diode Symbol ISDM 4/9 STV300NH02L Test conditions Forward on voltage ISD = 120A, VGS = 0 Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 120A,di/dt = 100A/µs Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 120A,di/dt = 100A/µs VDD = 20V, Tj = 25°C (see Figure 6) VDD = 20V, Tj = 150°C (see Figure 6) Pulsed: Pulse duration = 300 µs, duty cycle 1.5% Min. Typ. Max. Unit 300 1200 A A 1.3 V 63 85 2.7 ns nC A 63.2 88 2.8 ns nC A STV300NH02L Test circuits 3 Test circuits Figure 1. Switching times test circuit for resistive load Figure 3. Test circuit for inductive load Figure 4. switching and diode recovery times Unclamped inductive load test circuit Figure 5. Unclamped inductive waveform Switching time waveform Figure 2. Figure 6. Gate charge test circuit 5/9 Package mechanical data 4 STV300NH02L Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 6/9 STV300NH02L Package mechanical data PowerSO-10 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 3.35 3.65 0.132 A1 0.00 0.10 0.000 0.004 B 0.40 0.60 0.016 0.024 C 0.35 0.55 0.013 0.022 D 9.40 9.60 0.370 0.378 D1 7.40 7.60 0.291 e 1.27 0.144 0.300 0.050 E 9.30 9.50 0.366 0.374 E1 7.20 7.40 0.283 0.291 E2 7.20 7.60 0.283 0.300 E3 6.10 6.35 0.240 0.250 E4 5.90 6.10 0.232 0.240 F 1.25 1.35 0.049 0.053 h 0.50 0.002 H 13.80 14.40 0.543 L 1.20 1.80 0.047 q 1.70 0.071 0.067 0o α 0.567 8o B 0.10 A B 10 = = E4 = = E1 = E3 = E2 = E = = = H 6 = = 1 5 B e 0.25 SEATING PLANE DETAIL "A" A C M Q h D = D1 = = = SEATING PLANE A F A1 A1 L DETAIL "A" α 0068039-C 7/9 Revision history 5 STV300NH02L Revision history Table 7. 8/9 Revision history Date Revision 08-Feb-2007 1 Changes First release STV300NH02L Please Read Carefully: Information in this document is provided solely in connection with ST products. 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