VISHAY SI4620DY-T1-GE3

Si4620DY
Vishay Siliconix
N-Channel 30-V (D-S) MOSFET with Schottky Diode
FEATURES
MOSFET PRODUCT SUMMARY
VDS (V)
30
RDS(on) (Ω)
ID (A)
0.035 at VGS = 10 V
7.4
0.052 at VGS = 4.5 V
6.1
• Halogen-free According to IEC 61249-2-21
Definition
• LITTLE FOOT® Plus Power MOSFET
• Compliant to RoHS Directive 2002/95/EC
Qg (Typ.)
4.2 nC
SCHOTTKY PRODUCT SUMMARY
APPLICATIONS
VKA (V)
VF (V)
Diode Forward Voltage
IF (A)a
30
0.470 at 3 A
3
• Load Switch for Portable Applications
- Ideal for Boost Circuits
• HDD Driver
SO-8
K
D
A
1
8
K
A
2
7
K
S
3
6
D
G
4
5
D
G
Top View
S
Ordering Information: Si4620DY-T1-E3 (Lead (Pb)-free)
Si4620DY-T1-GE3 (Lead (Pb)-free and Halogen-free)
A
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Drain-Source Voltage (MOSFET)
Reverse Voltage (Schottky)
Gate-Source Voltage (MOSFET)
Continuous Drain Current (TJ = 150 °C) (MOSFET)
Symbol
VDS
VKA
VGS
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
IDM
Pulsed Drain Current (MOSFET)
Continuous Source Current (MOSFET Diode Conduction)
TC = 25 °C
TA = 25 °C
Maximum Power Dissipation (Schottky)
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Document Number: 73862
S09-1341-Rev. D, 13-Jul-09
IS
IF
Average Forward Current (Schottky)
Pulsed Forward Current (Schottky)
Maximum Power Dissipation (MOSFET)
ID
IFM
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
PD
TJ, Tstg
Limit
30
30
± 20
7.5
6
6
4.8
40
2.6
Unit
V
A
1.7a, b
3
8
3.1
2
2a, b
1.3a, b
3
1.9
1.8
1.1
- 55 to 150
260
W
°C
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Si4620DY
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter
Symbol
Typical
Maximum
Maximum Junction-to-Ambient (MOSFET)a, c
Maximum Junction-to-Foot (Drain) (MOSFET)
RthJA
53
62.5
RthJF
30
40
Maximum Junction-to-Ambient (Schottky)
RthJA
55
65
Maximum Junction-to-Foot (Drain) (Schottky)
RthJF
32
42
Unit
°C/W
Notes:
a. Surface Mounted on FR4 board.
b. t ≤ 10 s.
c. Maximum under Steady State conditions for MOSFETS is 110 °C/W.
d. Maximum under Steady State conditions for Schottky is 115 °C/W.
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
VDS
VGS = 0 V, ID = 250 µA
30
Typ.
Max.
Unit
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
ΔVDS/TJ
VGS(th) Temperature Coefficient
ΔVGS(th)/TJ
Gate-Source Threshold Voltage
V
32.5
ID = 250 µA
mV/°C
- 5.3
VGS(th)
VDS = VGS, ID = 250 µA
2.5
V
Gate-Source Leakage
IGSS
VDS = 0 V, VGS = ± 20 V
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 30 V, VGS = 0 V
1
VDS = 30 V, VGS = 0 V, TJ = 55 °C
10
On-State Drain Currenta
ID(on)
Drain-Source On-State Resistancea
Forward Transconductancea
RDS(on)
gfs
VDS ≤ 5 V, VGS = 10 V
1.2
30
µA
A
VGS = 10 V, ID = 6 A
0.028
0.035
VGS = 4.5 V, ID = 4.9 A
0.041
0.052
VDS = 15 V, ID = 6 A
12
520
1040
VDS = 15 V, VGS = 0 V, f = 1 MHz
115
230
55
110
Ω
S
Dynamicb
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
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Rg
VDS = 15 V, VGS = 10 V, ID = 6 A
VDS = 15 V, VGS = 4.5 V, ID = 6 A
td(off)
tf
13
4.2
6.5
1.8
nC
1.5
f = 1 MHz
td(on)
tr
8.6
pF
VDD = 15 V, RL = 3.1 Ω
ID ≅ 4.8 A, VGEN = 4.5 V, Rg = 6 Ω
Ω
2.8
16
30
36
54
21
40
17
40
ns
Document Number: 73862
S09-1341-Rev. D, 13-Jul-09
Si4620DY
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
IS
TC = 25 °C
Min.
Typ.
Max.
Unit
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current
ISM
Body Diode Voltage
VSD
Body Diode Reverse Recovery Time
trr
Body Diode Reverse Recovery Charge
Qrr
Reverse Recovery Fall Time
ta
Reverse Recovery Rise Time
tb
2.6
40
IS = 1.7 A, VGS = 0 V
IF = 1.7 A, dI/dt = 100 A/µs, TJ = 25 °C
A
0.8
1.2
V
20
40
ns
14
30
nC
14
ns
6
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
SCHOTTKY SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Forward Voltage Drop
Maximum Reverse Leakage Current
Junction Capacitance
Symbol
VF
Irm
CT
Test Conditions
Typ.
Max.
IF = 3 A
Min.
0.39
0.470
IF = 3 A, TJ = 125 °C
0.35
0.420
Vr = 5 V
0.1
0.2
Vr = 5 V, TJ = 85 °C
3.5
17.5
Vr = 5 V, TJ = 106 °C
12
60
Vr = 30 V
0.22
0.5
Vr = 30 V, TJ = 85 °C
10
50
Vr = 30 V, TJ = 125 °C
40
200
Vr = 15 V
100
Unit
V
mA
pF
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Document Number: 73862
S09-1341-Rev. D, 13-Jul-09
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Si4620DY
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
10
40
VGS = 10 V thru 6 V
35
5V
8
I D - Drain Current (A)
I D - Drain Current (A)
30
25
20
4V
15
6
4
TC = 125 °C
10
2
5
0
0.0
0
0
1
2
3
4
- 55 °C
25 °C
3V
5
0.5
1.0
VDS - Drain-to-Source Voltage (V)
1.5
2.0
2.5
3.0
3.5
4.0
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
0.10
800
600
C - Capacitance (pF)
R D S(on) - On-Resistance (Ω)
700
0.08
0.06
VGS = 4.5 V
0.04
VGS = 10 V
Ciss
500
400
300
200
Coss
0.02
100
Crss
0.00
0
0
5
10
15
20
25
30
35
40
0
5
ID - Drain Current (A)
10
20
25
30
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current and Gate Voltage
Capacitance
10
1.6
VGS = 10 V
ID = 6 A
ID = 6 A
8
1.4
R D S(on) - On-Resistance
(Normalized)
VG S - Gate-to-Source Voltage (V)
15
VDS = 15 V
6
VDS = 24 V
4
2
1.2
1.0
0.8
0
0
2
4
6
Qg - Total Gate Charge (nC)
Gate Charge
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4
8
10
0.6
- 50
- 25
0
25
50
75
100
125
150
TJ - Junction Temperature (°C)
On-Resistance vs. Junction Temperature
Document Number: 73862
S09-1341-Rev. D, 13-Jul-09
Si4620DY
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
0.12
40
R DS(on) - On-Resistance (mΩ)
I S - Source Current (A)
ID = 6 A
TJ = 150 °C
10
TJ = 25 °C
0.10
0.08
0.06
125 °C
25 °C
0.04
0.02
1
0.0
0.00
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0
1.6
2
VSD - Source-to-Drain Voltage (V)
4
6
8
10
VGS - Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
2.4
50
2.2
40
ID = 250 µA
Power (W)
VGS(th) (V)
2.0
1.8
30
20
1.6
10
1.4
1.2
- 50
- 25
0
25
50
75
100
125
0
10-3
150
10-2
TJ - Temperature (°C)
10-1
1
10
100
600
Time (s)
Threshold Voltage
Single Pulse Power
100
Limited by RDS(on)*
P(t) = 0.0001
I D - Drain Current (A)
10
P(t) = 0.001
1
P(t) = 0.01
P(t) = 0.1
P(t) = 1
P(t) = 10
0.1
DC
TA = 25 °C
Single Pulse
0.01
0.1
BVDSS Limited
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Ambient
Document Number: 73862
S09-1341-Rev. D, 13-Jul-09
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Si4620DY
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
10
4
Power Dissipation (W)
I D - Drain Current (A)
8
6
4
3
2
1
2
0
0
0
25
50
75
100
TC - Case Temperature (°C)
Current Derating*
125
150
25
50
75
100
125
150
TC - Case Temperature (°C)
Power Derating
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
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Document Number: 73862
S09-1341-Rev. D, 13-Jul-09
Si4620DY
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
Notes:
0.1
PDM
0.1
0.05
t1
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = RthJA = 92 °C/W
0.02
3. TJM - TA = PDMZthJA(t)
Single Pulse
0.01
10-4
10-3
4. Surface Mounted
10-2
10-1
1
10
100
600
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10-4
10-3
10-2
10-1
1
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
Document Number: 73862
S09-1341-Rev. D, 13-Jul-09
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Si4620DY
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1000
10
I F - Forward Current (A)
I R - Reverse Current (mA)
100
10
I R = 30 V
1
I R = 10 V
0.1
0.01
TJ = 150 °C
1
TJ = 25 °C
0.1
0.001
0.0001
- 50
0.01
- 25
0
25
50
75
100
125
150
0
0.1
0.2
0.3
0.4
0.5
0.6
VF - Forward Voltage Drop (V)
TC - Junction Temperature (°C)
Forward Voltage Drop
Reverse Current vs. Junction Temperature
C T - Junction Capacitance (pF)
300
240
180
120
60
0
0
4
8
12
16
20
VKA - Reverse Voltage (V)
Capacitance
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Document Number: 73862
S09-1341-Rev. D, 13-Jul-09
Si4620DY
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.1
Notes:
0.05
PDM
0.02
t1
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = RthJA = 93 °C
3. TJM - TA = PDMZthJA(t)
Single Pulse
0.01
10-4
4. Surface Mounted
10-3
10-2
10-1
10
1
100
1000
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10 -4
10-3
10-2
10-1
1
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?73862.
Document Number: 73862
S09-1341-Rev. D, 13-Jul-09
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Package Information
Vishay Siliconix
SOIC (NARROW): 8-LEAD
JEDEC Part Number: MS-012
8
6
7
5
E
1
3
2
H
4
S
h x 45
D
C
0.25 mm (Gage Plane)
A
e
B
All Leads
q
A1
L
0.004"
MILLIMETERS
INCHES
DIM
Min
Max
Min
Max
A
1.35
1.75
0.053
0.069
A1
0.10
0.20
0.004
0.008
B
0.35
0.51
0.014
0.020
C
0.19
0.25
0.0075
0.010
D
4.80
5.00
0.189
0.196
E
3.80
4.00
0.150
e
0.101 mm
1.27 BSC
0.157
0.050 BSC
H
5.80
6.20
0.228
0.244
h
0.25
0.50
0.010
0.020
L
0.50
0.93
0.020
0.037
q
0°
8°
0°
8°
S
0.44
0.64
0.018
0.026
ECN: C-06527-Rev. I, 11-Sep-06
DWG: 5498
Document Number: 71192
11-Sep-06
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VISHAY SILICONIX
TrenchFET® Power MOSFETs
Application Note 808
Mounting LITTLE FOOT®, SO-8 Power MOSFETs
Wharton McDaniel
Surface-mounted LITTLE FOOT power MOSFETs use
integrated circuit and small-signal packages which have
been been modified to provide the heat transfer capabilities
required by power devices. Leadframe materials and
design, molding compounds, and die attach materials have
been changed, while the footprint of the packages remains
the same.
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/ppg?72286), for the
basis of the pad design for a LITTLE FOOT SO-8 power
MOSFET. In converting this recommended minimum pad
to the pad set for a power MOSFET, designers must make
two connections: an electrical connection and a thermal
connection, to draw heat away from the package.
0.288
7.3
0.050
1.27
0.196
5.0
0.027
0.69
0.078
1.98
0.2
5.07
Figure 1. Single MOSFET SO-8 Pad
Pattern With Copper Spreading
Document Number: 70740
Revision: 18-Jun-07
0.050
1.27
0.088
2.25
0.088
2.25
0.027
0.69
0.078
1.98
0.2
5.07
Figure 2. Dual MOSFET SO-8 Pad Pattern
With Copper Spreading
The minimum recommended pad patterns for the
single-MOSFET SO-8 with copper spreading (Figure 1) and
dual-MOSFET SO-8 with copper spreading (Figure 2) show
the starting point for utilizing the board area available for the
heat-spreading copper. To create this pattern, a plane of
copper overlies the drain pins. The copper plane connects
the drain pins electrically, but more importantly provides
planar copper to draw heat from the drain leads and start the
process of spreading the heat so it can be dissipated into the
ambient air. These patterns use all the available area
underneath the body for this purpose.
Since surface-mounted packages are small, and reflow
soldering is the most common way in which these are
affixed to the PC board, “thermal” connections from the
planar copper to the pads have not been used. Even if
additional planar copper area is used, there should be no
problems in the soldering process. The actual solder
connections are defined by the solder mask openings. By
combining the basic footprint with the copper plane on the
drain pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces.
The absolute minimum power trace width must be
determined by the amount of current it has to carry. For
thermal reasons, this minimum width should be at least
0.020 inches. The use of wide traces connected to the drain
plane provides a low impedance path for heat to move away
from the device.
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APPLICATION NOTE
In the case of the SO-8 package, the thermal connections
are very simple. Pins 5, 6, 7, and 8 are the drain of the
MOSFET for a single MOSFET package and are connected
together. In a dual package, pins 5 and 6 are one drain, and
pins 7 and 8 are the other drain. For a small-signal device or
integrated circuit, typical connections would be made with
traces that are 0.020 inches wide. Since the drain pins serve
the additional function of providing the thermal connection
to the package, this level of connection is inadequate. The
total cross section of the copper may be adequate to carry
the current required for the application, but it presents a
large thermal impedance. Also, heat spreads in a circular
fashion from the heat source. In this case the drain pins are
the heat sources when looking at heat spread on the PC
board.
0.288
7.3
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR SO-8
0.172
(4.369)
0.028
0.022
0.050
(0.559)
(1.270)
0.152
(3.861)
0.047
(1.194)
0.246
(6.248)
(0.711)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
APPLICATION NOTE
Return to Index
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Document Number: 72606
Revision: 21-Jan-08
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Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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including but not limited to the warranty expressed therein.
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Document Number: 91000
Revision: 11-Mar-11
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