ONSEMI NTLLD4901NFTWG

NTLLD4901NF
Dual N-Channel Power
MOSFET with Integrated
Schottky
30 V, High Side 11 A / Low Side 13 A,
Dual N−Channel, WDFN (3 mm x 3 mm)
Features
•
•
•
•
•
Co−Packaged Power Stage Solution to Minimize Board Space
Low Side MOSFET with Integrated Schottky
Minimized Parasitic Inductances
Optimized Devices to Reduce Power Losses
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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V(BR)DSS
RDS(ON) MAX
ID MAX
Q1 Top FET
30 V
17.4 mW @ 10 V
Q2 Bottom
FET 30 V
13.3 mW @ 10 V
11 A
25 mW @ 4.5 V
13 A
20 mW @ 4.5 V
D1
(2, 3, 4, 9)
Applications
• DC−DC Converters
• System Voltage Rails
• Point of Load
(1) G1
S1/D2 (10)
(8) G2
S2 (5, 6, 7)
PIN CONNECTIONS
D1 4
D1 3
D1 2
5 S2
9
10
D1 S1/D2
6 S2
7 S2
G1 1
8 G2
(Bottom View)
MARKING
DIAGRAM
1
4901
A
Y
WW
G
WDFN8
CASE 511BP
1
4901
AYWWG
G
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
July, 2012 − Rev. 1
1
Publication Order Number:
NTLLD4901NF/D
NTLLD4901NF
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Drain−to−Source Voltage
Q1
Drain−to−Source Voltage
Q2
Gate−to−Source Voltage
Q1
Gate−to−Source Voltage
Q2
Continuous Drain Current RqJA (Note 1)
TA = 25°C
Q1
Symbol
Value
Unit
VDSS
30
V
VGS
±20
V
ID
8.3
TA = 85°C
TA = 25°C
6.0
Q2
9.6
TA = 85°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
Continuous Drain Current RqJA ≤ 10 s (Note 1)
TA = 25°C
6.9
Q1
PD
Q2
Q1
Steady
State
ID
TA = 25°C
Continuous Drain Current
RqJA (Note 2)
TA = 25°C
13
Q1
PD
Q1
ID
Pulsed Drain Current
TA = 25°C
tp = 10 ms
6.3
A
4.5
Q1
PD
Q2
Operating Junction and Storage Temperature
W
5.5
4.0
Q2
TA = 85°C
TA = 25 °C
3.23
3.27
TA = 85°C
Power Dissipation
RqJA (Note 2)
A
9.1
Q2
TA = 25°C
W
11
8
Q2
TA = 85°C
Power Dissipation
RqJA ≤ 10 s (Note 1)
1.82
1.88
TA = 85°C
TA = 25°C
A
Q1
W
0.81
IDM
65
TJ, TSTG
−55 to +150
°C
IS
4.2
A
Q2
Q1
0.80
A
70
Q2
Source Current (Body Diode)
Q1
Q2
Drain to Source DV/DT
6.0
dV/dt
6
V/ns
mJ
Single Pulse Drain−to−Source Avalanche Energy (TJ = 25C, VDD = 50 V,
VGS = 10 V, IL = 9.0 Apk, L = 0.3 mH, RG = 25 W)
Q1
EAS
12
Single Pulse Drain−to−Source Avalanche Energy (TJ = 25C, VDD = 50 V,
VGS = 10 V, IL = 9.5 Apk, L = 0.3 mH, RG = 25 W)
Q2
EAS
13.5
TL
260
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 2 oz Cu
2. Surface−mounted on FR4 board using the minimum recommended pad size of 90 mm2
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2
NTLLD4901NF
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Junction−to−Ambient – Steady State (Note 3)
FET
Symbol
Value
Q1
RqJA
68.8
Q2
Junction−to−Ambient – Steady State (Note 4)
66.4
Q1
RqJA
156.4
Q2
Junction−to−Ambient – (t ≤ 10 s) (Note 3)
Unit
°C/W
153.9
Q1
RqJA
38.7
Q2
38.2
3. Surface−mounted on FR4 board using 1 sq−in pad, 2 oz Cu
4. Surface−mounted on FR4 board using the minimum recommended pad size of 90 mm2
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
FET
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
Q1
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage Temperature
Coefficient
Q1
Zero Gate Voltage Drain
Current
Q1
Typ
Max
Unit
OFF CHARACTERISTICS
Q2
Q2
30
V(BR)DSS
/ TJ
IDSS
Q2
Gate−to−Source Leakage
Current
Q1
V
15
VGS = 0 V,
VDS = 24 V
TJ = 25°C
1
TJ = 125°C
10
TJ = 25°C
500
VGS = 0 V,
VDS = 24 V
IGSS
mV /
°C
18
VGS = 0 V, VDS = ±20 V
±100
Q2
mA
nA
±100
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Q1
VGS(TH)
VGS = VDS, ID = 250 mA
Q2
Negative Threshold Temperature Coefficient
Q1
Drain−to−Source On Resistance
Q1
Q2
VGS(TH) /
TJ
RDS(on)
Q2
Forward Transconductance
Q1
gFS
1.2
2.2
1.2
2.2
mV /
°C
4.5
4.0
VGS = 10 V
ID = 9 A
14
17.4
VGS = 4.5 V
ID = 9 A
20
25
VGS = 10 V
ID = 11 A
11
13.3
VGS = 4.5 V
ID = 11 A
16
20
VDS = 1.5 V, ID = 9 A
Q2
16
V
mW
S
18
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
Output Capacitance
Reverse Capacitance
Q1
Q2
Q1
Q2
Q1
Q2
605
CISS
COSS
660
VGS = 0 V, f = 1 MHz, VDS = 15 V
190
325
102
CRSS
17.5
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%
6. Switching characteristics are independent of operating junction temperatures.
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3
pF
NTLLD4901NF
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
FET
Symbol
Test Condition
Min
Typ
Max
Unit
CHARGES, CAPACITANCES & GATE RESISTANCE
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
Q1
Q2
Q1
Q2
Q1
Q2
1.1
VGS = 4.5 V, VDS = 15 V; ID = 9 A
QGS
Q2
Q2
5.0
QG(TH)
Q1
Q1
6.5
QG(TOT)
nC
1.9
2.0
3.2
QGD
QG(TOT)
1.1
1.46
VGS = 10 V, VDS = 15 V; ID = 9 A
12
nC
10.6
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Q1
Q2
Q1
tr
Q2
Q1
Q2
8.0
td(ON)
7.5
7.2
VGS = 4.5 V, VDS = 15 V,
ID = 9 A, RG = 3.0 W
td(OFF)
Q1
ns
11
11.6
3.3
tf
Q2
11.2
1.9
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
4.2
td(ON)
tr
4.3
11.6
VGS = 10 V, VDS = 15 V,
ID = 9 A, RG = 3.0 W
td(OFF)
11.4
ns
14.1
14.3
2.0
tf
1.3
DRAIN−SOURCE DIODE CHARACTERISTICS
VGS = 0 V,
IS = 3 A
Q1
VSD
Forward Voltage
Q2
VGS = 0 V,
IS = 2 A
TJ = 25°C
0.80
TJ = 125°C
0.65
TJ = 25°C
0.50
TJ = 125°C
0.45
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%
6. Switching characteristics are independent of operating junction temperatures.
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4
1.2
0.80
V
NTLLD4901NF
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
FET
Symbol
Test Condition
Min
Typ
Max
Unit
DRAIN−SOURCE DIODE CHARACTERISTICS
Reverse Recovery Time
Q1
Q2
Q1
Charge Time
Q2
Q1
Discharge Time
Q2
Reverse Recovery Charge
Q1
Q2
17.9
tRR
23.3
9.0
ta
VGS = 0 V, dIS/dt = 100 A/ms, IS = 3 A
tb
11.3
ns
9.0
12
8.0
QRR
12
nC
PACKAGE PARASITIC VALUES
Source Inductance
Drain Inductance
Gate Inductance
Gate Resistance
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
0.36
LS
0.36
0.054
LD
TA = 25°C
LG
0.054
1.3
1.3
0.8
RG
0.8
nH
nH
nH
W
5. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%
6. Switching characteristics are independent of operating junction temperatures.
ORDERING INFORMATION
Device
NTLLD4901NFTWG
Package
Shipping†
WDFN8
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NTLLD4901NF
TYPICAL CHARACTERISTICS − Q1
3.6 V
3.8 V
25
3.4 V
VDS = 5 V
25
ID, DRAIN CURRENT (A)
4.5 V thru 4 V
3.2 V
7.5 V
20
3.0 V
15
2.8 V
10
5
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
VGS = 2.2 V
2.6 V
20
15
TJ = 125°C
10
0
1
2
3
4
0
5
TJ = −55°C
ID = 10 A
40
35
30
25
20
15
3
4
5
6
7
8
9
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
3.0
3.5
4.0
23
22
VGS = 4.5 V
T = 25°C
21
20
19
18
17
16
15
14
13
VGS = 10 V
0
5
10
15
20
25
30
ID, DRAIN CURRENT (A)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1E−05
ID = 9 A
VGS = 10 V
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
−50
TJ = 150°C
1E−06
IDSS, LEAKAGE (A)
1.5
1.4
2.5
Figure 2. Transfer Characteristics
45
1.7
1.6
2.0
Figure 1. On−Region Characteristics
50
2
1.5
VGS, GATE−TO−SOURCE VOLTAGE (V)
55
10
1.0
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 3. On−Resistance vs. Gate−to−Source
Resistance
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
TJ = 25°C
5
2.4 V
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
ID, DRAIN CURRENT (A)
30
10 V
TJ = 125°C
1E−07
1E−08
1E−09
TJ = 25°C
1E−10
−25
0
25
50
75
100
125
150
1E−11
0
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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6
30
NTLLD4901NF
TYPICAL CHARACTERISTICS − Q1
C, CAPACITANCE (pF)
700
500
400
300
Coss
200
Crss
100
0
100
5
10
15
20
25
30
tf
tr
4
Qgs
Qgd
ID = 9 A
TJ = 25°C
VGS = 4.5 V
VDD = 15 V
3
2
1
0
0
2
4
6
8
10
12
8
VGS = 0 V
7
TJ = 25°C
6
5
4
3
2
1
1
10
0
100
0
0.1 0.2 0.3 0.4
0.5 0.6
0.7 0.8 0.9
1.0 1.1
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
ID, DRAIN CURRENT (A)
5
9
100
10 ms
10
100 ms
VGS = 20 V
SINGLE PULSE
TC = 25°C
0.1
0.01
7
6
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
td(off)
1
8
Figure 7. Capacitance Variation
td(on)
1
QT
9
Qg, TOTAL GATE CHARGE (nC)
VGS = 10 V
VDD = 15 V
ID = 10 A
10
10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
IS, SOURCE CURRENT (A)
0
t, TIME (ns)
TJ = 25°C
VGS = 0 V
Ciss
600
VGS, GATE−TO−SOURCE VOLTAGE (V)
800
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
1 ms
10 ms
dc
1
10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
100
14
12
ID = 9 A
10
8
6
4
2
0
25
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
40
55
70
85 100 115 130 145 160
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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7
NTLLD4901NF
THERMAL RESISTANCE, RqJA(t) (°C/W)
TYPICAL CHARACTERISTICS − Q1
100
D = 0.5
0.2
10 0.1
0.05
0.02
1 0.01
SINGLE PULSE
0.1
0.000001
0.00001
0.0001
0.001
0.01
0.1
t, PULSE TIME (sec)
Figure 13. Thermal Response
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8
1
10
100
1000
NTLLD4901NF
TYPICAL CHARACTERISTICS − Q2
3.6 V
30
3.4 V
7.5 V
25
3.2 V
20
3.0 V
15
2.8 V
VGS = 2.2 V
10
2.6 V
2.4 V
5
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
0
0
1
2
3
4
25
20
TJ = 25°C
15
10
0
TJ = 125°C
5
TJ = −55°C
1
20
10
3
4
5
6
7
8
9
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
4.5
20
T = 25°C
VGS = 4.5 V
18
16
14
12
VGS = 10 V
10
8
0
5
10
15
20
25
30
35
40
ID, DRAIN CURRENT (A)
Figure 16. On−Resistance vs. Gate−to−Source
Resistance
Figure 17. On−Resistance vs. Drain Current
and Gate Voltage
1E−02
ID = 11 A
VGS = 10 V
TJ = 150°C
IDSS, LEAKAGE (A)
RDS(on), DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
4
3.5
Figure 15. Transfer Characteristics
30
1.2
1.0
0.8
0.6
−50
3
Figure 14. On−Region Characteristics
40
1.4
2.5
2
VGS, GATE−TO−SOURCE VOLTAGE (V)
50
1.6
1.5
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
ID = 10 A
2
30
5
60
0
VDS = 5 V
35
4.5 thru 4.0 V
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
ID, DRAIN CURRENT (A)
35
40
3.8 V
10 V
ID, DRAIN CURRENT (A)
40
−25
0
25
50
75
100
125
150
TJ = 125°C
1E−03
1E−04
TJ = 25°C
1E−05
1E−06
VGS = 0 V
0
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 18. On−Resistance Variation with
Temperature
Figure 19. Drain−to−Source Leakage Current
vs. Voltage
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9
30
NTLLD4901NF
Ciss
Coss
100
Crss
10
1
TJ = 25°C
VGS = 0 V
0
t, TIME (ns)
100
5
10
15
20
25
30
td(off)
tr
tf
1
10
Qgs
4
Qgd
ID = 9 A
TJ = 25°C
VGS = 4.5 V
VDD = 15 V
3
2
1
0
0
2
4
7
VGS = 0 V
6
TJ = 25°C
8
6
10
5
4
3
2
1
0
100
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9 1.0
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 22. Resistive Switching Time Variation
vs. Gate Resistance
Figure 23. Diode Forward Voltage vs. Current
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
ID, DRAIN CURRENT (A)
5
8
10 ms
10
100 ms
0 V < VGS < 20 V
SINGLE PULSE
TC = 25°C
0.1
0.01
7
6
Figure 21. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
100
1
8
Figure 20. Capacitance Variation
td(on)
1
QT
9
Qg, TOTAL GATE CHARGE (nC)
VGS = 10 V
VDD = 15 V
ID = 10 A
10
10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
IS, SOURCE CURRENT (A)
C, CAPACITANCE (pF)
1000
VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS − Q2
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
1 ms
10 ms
dc
1
10
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
100
14
12
ID = 9.5 A
10
8
6
4
2
0
25
Figure 24. Maximum Rated Forward Biased
Safe Operating Area
40
55
70
85 100 115 130 145 160
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 25. Maximum Avalanche Energy vs.
Starting Junction Temperature
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10
NTLLD4901NF
THERMAL RESISTANCE, RqJA(t) (°C/W)
TYPICAL CHARACTERISTICS − Q2
100
D = 0.5
0.2
0.1
0.05
0.02
1 0.01
10
0.1
SINGLE PULSE
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
t, PULSE TIME (sec)
Figure 26. Thermal Response
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11
1
10
100
1000
NTLLD4901NF
PACKAGE DIMENSIONS
WDFN8 3x3, 0.65P
CASE 511BP
ISSUE A
A
D
PIN ONE
REFERENCE
0.15 C
L
DETAIL A
ALTERNATE
CONSTRUCTIONS
E
ÇÇÇ
ÉÉ
ÇÇÇ
ÉÉÉ ÉÉ
ÇÇ
EXPOSED Cu
TOP VIEW
A
DETAIL B
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.05 AND 0.15 MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. POSITIONAL TOLERANCE APPLIES TO ALL
OF THE EXPOSED PADS.
L
L1
ÇÇÇ
ÇÇÇ
ÇÇÇ
ÇÇÇ
0.15 C
B
MOLD CMPD
A3
A1
A3
DETAIL B
ALTERNATE
CONSTRUCTIONS
0.08 C
A1
0.10
M
D2
DETAIL A
1
SEATING
PLANE
C
SIDE VIEW
NOTE 4
C A B
NOTE 5
K
4
2.60
1.80
5X
0.10
G
8
5
e
e/2
8X
M
0.50
C A B
0.43
NOTE 5
E2
MILLIMETERS
MIN
MAX
0.70
0.80
0.00
0.05
0.20 REF
0.30
0.50
3.00 BSC
2.35
2.55
3.00 BSC
0.90
1.10
0.40
0.60
0.65 BSC
0.43 BSC
0.68 BSC
0.20
−−−
0.20
0.40
0.00
0.15
RECOMMENDED
SOLDERING FOOTPRINT*
E3
G2
DIM
A
A1
A3
b
D
D2
E
E2
E3
e
G
G2
K
L
L1
0.68
1.15
b
0.10
M
C A B
0.05
M
C
3.30
NOTE 3
BOTTOM VIEW
0.65
1
0.65
PITCH
6X
0.50
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
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