PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 10-A, 2.2-V to 5.5-V INPUT, NON-ISOLATED POWER MODULE FOR 3-GHz DSP SYSTEMS FEATURES 1 • • • • • • 2 • • • • • • • • Up to 10-A Output Current 2.2-V to 5.5-V Input Voltage Wide-Output Voltage Adjust (0.69 V to 2.0 V) ±1.5% Total Output Voltage Variation Efficiencies up to 94% Output Overcurrent Protection (Nonlatching, Auto-Reset) Operating Temperature: –40°C to 85°C Safety Agency Approvals: – UL/IEC/CSA-C22.2 60950-1 Prebias Startup On/Off Inhibit Differential Output Voltage Remote Sense Adjustable Undervoltage Lockout Auto-Track™ Sequencing SmartSync Technology • • • TurboTrans™ Technology Designed to meet Ultra-Fast Transient Requirements for 3-GHz DSP Systems 15 mV Output Voltage Deviation (CO = 2000 µF, ΔI = 3 A) APPLICATIONS • Wireless Infrastructure Base Stations DESCRIPTION The PTH04T240F is a high-performance 10-A rated, non-isolated power module designed to meet ultra-fast transient requirements for 3-GHz DSP systems like Texas Instruments' TMS320TCI6488. This module is an addition to the 2nd generation of the popular PTH series power modules which include a reduced footprint and additional features. Operating from an input voltage range of 2.2 V to 5.5 V, the PTH04T240F requires a single resistor to set the output voltage to any value over the range, 0.69 V to 2.0 V. The output voltage range makes the PTH04T240F particularly suitable for the 3-GHz DSP's core voltage requirements. The module incorporates a comprehensive list of features. Output over-current and over-temperature shutdown protects against most load faults. A differential remote sense ensures tight load regulation. An adjustable under-voltage lockout allows the turn-on voltage threshold to be customized. Auto-Track™sequencing is a popular feature that greatly simplifies the simultaneous power-up and power-down of multiple modules in a power system. The PTH04T240F includes new patent pending technologies, TurboTrans™ and SmartSync. The TurboTrans feature optimizes the transient response of the regulator while simultaneously reducing the quantity of external output capacitors required to meet a target voltage deviation specification. TurboTrans allows the PTH04T240F to meet the tight transient voltage tolerances required by 3-GHz DSPs with minimal output capacitance. SmartSync allows for switching frequency synchronization of multiple modules, thus simplifying EMI noise suppression tasks and reducing input capacitor RMS current requirements. The module uses double-sided surface mount construction to provide a low profile and compact footprint. Package options include both through-hole and surface mount configurations that are lead (Pb) - free and RoHS compatible. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Auto-Track, TurboTrans, TMS320 are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. PTH04T240F SmartSync Track TurboTrans™ 10 VI Track 2 1 SYNC TT +Sense VI 11 INH/UVLO + RUVLO 1% 0.05 W (Optional) CI 220 mF (Required) CI2 22 mF (Optional) 6 +Sense 5 PTH04T240F Inhibit RTT 1% 0.05W (Required) 9 VO VO -Sense GND GND VOAdj 3 4 8 7 RSET[A] 1% 0.05 W (Required) L O A D + CO 1000 mF (Required) GND -Sense GND UDG-08158 A. 2 `RSET required to set the output voltage to a value higher than 0.69 V. See Electrical Characteristics table. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 ORDERING INFORMATION For the most current package and ordering information, see the Package Option Addendum at the end of this datasheet, or see the TI website at www.ti.com. DATASHEET TABLE OF CONTENTS DATASHEET SECTION PAGE NUMBER ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS 3 ELECTRICAL CHARACTERISTICS TABLE (PTH04T240F) 4 TERMINAL FUNCTIONS 6 TYPICAL CHARACTERISTICS (VI = 5V) 7 TYPICAL CHARACTERISTICS (VI = 3.3V) 8 ADJUSTING THE OUTPUT VOLTAGE 9 INPUT & OUTPUT CAPACITOR RECOMMENDATIONS 11 TURBOTRANS™ INFORMATION 15 UNDERVOLTAGE LOCKOUT (UVLO) 19 SOFT-START POWER-UP 20 OUTPUT ON/OFF INHIBIT 21 SYCHRONIZATION (SMARTSYNC) 22 OVER-CURRENT PROTECTION 23 OVER-TEMPERATURE PROTECTION 23 REMOTE SENSE 23 AUTO-TRACK SEQUENCING 24 PREBIAS START-UP 27 TAPE & REEL DRAWING 28 SHIPPING TRAY DRAWING 29 ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS (Voltages are with respect to GND) UNIT VTrack Track pin voltage –0.3 to VI + 0.3 TA Operating temperature range Over VI range Twave Wave soldering temperature Surface temperature of module body or pins for 5 seconds maximum. Treflow Solder reflow temperature Surface temperature of module body or pins Tstg Storage temperature (2) suffix AS suffix AZ 260 235 (1) 260 (1) Mechanical shock Per Mil-STD-883D, Method 2002.3 1 msec, 1/2 sine, mounted 500 Mechanical vibration Mil-STD-883D, Method 2007.2 20-2000 Hz suffix AD 20 suffix AS & AZ 15 Flammability (1) suffix AD –55 to 125 Weight V –40 to 85 °C (2) 3.8 G grams Meets UL94V-O During reflow of surface mount package version do not elevate peak temperature of the module, pins or internal components above the stated maximum. The shipping tray or tape and reel cannot be used to bake parts at temperatures higher than 65°C. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 3 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com ELECTRICAL CHARACTERISTICS PTH04T240F TA = 25°C, VI = 5 V, VO = 1.0 V, CI = 220 µF, CO = 1000 µF, and IO = IO max (unless otherwise stated) PARAMETER TEST CONDITIONS PTH04T240F MIN IO Output current Over VO range VI Input voltage range Over IO range VOADJ Output voltage adjust range Over IO range 25°C, natural convection 0.69 ≤ VO ≤ 1.7 1.7 < VO ≤ 2.0 η 0 10 5.5 VO+0.5 (1) 5.5 0.69 ±0.3 %Vo ±3 mV Load regulation Over IO range ±2 Total output variation Includes set-point, line, load, –40°C ≤ TA ≤ 85°C IO = 10 A RSET = 2.83 kΩ, VO = 2.0 V 91% RSET = 4.78 kΩ, VO = 1.8 V 90% RSET = 7.09 kΩ, VO = 1.5 V 88% RSET = 12.1 kΩ, VO = 1.2 V 87% RSET = 20.8 kΩ, VO = 1.0 V 85% RSET = 689 kΩ, VO = 0.7 V 80% 20 Reset, followed by auto-recovery 20 A 200 µs VO over/undershoot 28 mV Recovery time 300 µs VO over/undershoot 15 mV 2.5 A/µs load step 0.5 A to 3.5 A VO = 0.9 V dVtrack/dt Track slew rate capability CO ≤ CO (max) Adjustable Under-voltage lockout (pin 11) CO = 1000 µF, TypeB RTT = open CO = 2000 µF, TypeB, RTT = 23.7 kΩ Recovery time 1 VI increasing, RUVLO = OPEN 1.95 VI decreasing, RUVLO = OPEN 1.5 Hysteresis, RUVLO = OPEN 0.5 Inhibit control (pin 11) -0.2 Input low current (IIL), Pin 11 to GND Input standby current Inhibit (pin 11) to GND, Track (pin 10) open fs Switching frequency Over VI and IO ranges, SmartSync (pin 1) to GND fSYNC Synchronization (SYNC) frequency VSYNCH SYNC High-Level Input Voltage VSYNCL SYNC Low-Level Input Voltage tSYNC SYNC Minimum Pulse Width CI External input capacitance 4 0.8 V µA 5 mA 300 kHz 240 400 kHz 2 5.5 V 200 Ceramic V/ms 235 0.8 Nonceramic µA V Open (4) Input low voltage (VIL) Iin mVPP –130 (3) Input high voltage (VIH) (5) %Vo Overcurrent threshold Pin to GND (4) (2) 20-MHz bandwidth Track input current (pin 10) (3) mV ±1.5 VO Ripple (peak-to-peak) IIL (1) (2) V %Vo Over VI range ΔVtrTT UVLOADJ (2) –40°C < TA < 85°C Transient response ttrTT ±1 V Line regulaltion ttr ΔVtr 2.0 ±0.5 A Temperature variation Efficiency ILIM UNIT MAX 2.2 Set-point voltage tolerance VO TYP 220 V ns (5) 22 (5) µF The minimum input voltage is 2.2 V or (VO + 0.5) V, whichever is greater. The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/C or better temperature stability. A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 10. The open-circuit voltage is less than VI. This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. The open-circuit voltage is less than 3.5Vdc. For additional information, see the related application information section. A 220 µF input capacitor is required for proper operation. The input capacitor must be rated for a minimum of 500 mA rms of ripple current. An additional 22-µF ceramic input capacitor is recommended to reduce rms ripple current. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 ELECTRICAL CHARACTERISTICS (continued) PTH04T240F TA = 25°C, VI = 5 V, VO = 1.0 V, CI = 220 µF, CO = 1000 µF, and IO = IO max (unless otherwise stated) PARAMETER TEST CONDITIONS PTH04T240F MIN CO External output capacitance w/ TurboTrans Capacitance Value Capacitance × ESR product (CO × ESR) MTBF (6) (7) Reliability Per Telcordia SR-332, 50% stress, TA = 40°C, ground benign see table (6) (7) 1000 (7) TYP UNIT MAX 10000 10000 (7) 4.5 µF µF×mΩ 106 Hr 1000 µF of external non-ceramic output capacitance is required for basic operation. Adding additional capacitance at the load further improves transient response. Up to 500 µF of ceramic capacitance may be added in addition to the required non-ceramic capacitance. See Capacitor Application Information section for more guidance. When using TurboTrans™ technology, a minimum value of output capacitance is required for proper operation. Additionally, low ESR capacitors are required for proper operation. See the application notes for further guidance. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 5 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com TERMINAL FUNCTIONS TERMINAL NAME NO. DESCRIPTION VI 2 The positive input voltage power node to the module, which is referenced to common GND. VO 5 The regulated positive power output with respect to GND. GND 3, 4 Inhibit (1) and UVLO Vo Adjust 11 This is the common ground connection for the VI and VO power connections. It is also the 0 Vdc reference for the control inputs. The Inhibit pin is an open-collector/drain, negative logic input that is referenced to GND. Applying a low level ground signal to this input disables the module’s output and turns off the output voltage. When the Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left open-circuit, the module produces an output whenever a valid input source is applied. This pin is also used for input undervoltage lockout (UVLO) programming. Connecting a resistor from this pin to GND (pin 3) allows the ON threshold of the UVLO to be adjusted higher than the default value. For more information, see the Application Information section. 8 A 0.05 W 1% resistor must be connected between this pin and pin7 (–Sense), close to the module to set the output voltage to a value higher than 0.69V. The temperature stability of the resistor should be 100 ppm/°C (or better). The setpoint range for the output voltage is from 0.69V to 2.0V. If left open circuit, the output voltage will default to its lowest value. For further information, on output voltage adjustment see the related application note. The specification table gives the preferred resistor values for a number of standard output voltages. + Sense 6 The sense input allows the regulation circuit to compensate for voltage drop between the module and the load. For optimal voltage accuracy, +Sense must be connected to VO, very close to the load. – Sense 7 The sense input allows the regulation circuit to compensate for voltage drop between the module and the load. For optimal voltage accuracy –Sense must be connected to GND (pin4) very close to the module (within 10cm). 10 This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage from 0 V up to the nominal set-point voltage. Within this range the module's output voltage follows the voltage at the Track pin on a volt-for-volt basis. When the control voltage is raised above this range, the module regulates at its set-point voltage. The feature allows the output voltage to rise simultaneously with other modules powered from the same input bus. If unused, this input should be connected to VI. Track NOTE: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage during power up. For more information, see the related application note. TurboTrans™ 9 This input pin adjusts the transient response of the regulator. To set the TurboTrans™ feature, a 1%, 50mW resistor must be connected between this pin and pin 6 (+Sense) very close to the module. For a given value of output capacitance, a reduction in peak output voltage deviation is achieved by utililizing this feature. The resistance requirement can be selected from the TurboTrans™ resistor table in the Application Information section. SmartSync 1 This input pin sychronizes the switching frequency of the module to an external clock frequency. The SmartSync feature can be used to sychronize the switching fequency of multiple modules, aiding EMI noise suppression efforts. If unused, this pin should be connected to GND (pin3). For more information, please review the Application Information section. (1) Denotes negative logic: Open = Normal operation, Ground = Function active 11 1 10 9 2 8 7 PTH04T240/241F PTH04T240 (Top View) 6 5 3 6 4 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 TYPICAL CHARACTERISTICS (1) (2) CHARACTERISTIC DATA (VI = 5 V) EFFICIENCY vs LOAD CURRENT OUTPUT RIPPLE vs LOAD CURRENT 100 POWER DISSIPATION vs LOAD CURRENT 32 2.5 h - Efficiency - % 90 80 1.5 V 1.0 V 0.7 V 70 1.2 V VO (V) 60 1.8 V 1.5 V 1.2 V 1.0 V 0.7 V VO (V) 1.2 V 0.7 V 28 24 20 1.2 V 16 0.7 V 2 4 6 8 10 1.5 0.7 V 1.0 1.2 V 0 8 0 1.8 V 0.5 12 50 VO (V) 1.8 1.2 0.7 2.0 PD - Power Dissipation - W VO - Output Voltage Ripple - mVP-P 1.8 V 0 2 IO - Output Current - A 4 6 8 10 IO - Output Current - A Figure 1. 0 2 4 6 8 10 IO - Output Current - A Figure 2. Figure 3. SAFE OPERATING AREA 90 Natural Convection For All VO TA − Ambient Temperature − °C 80 70 60 50 40 30 20 0 2 4 6 8 10 IO − Output Current − A Figure 4. (1) (2) The electrical characteristic data has been developed from actual products tested at 25C. This data is considered typical for the converter. Applies to Figure 1, Figure 2, and Figure 3. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper. For surface mount packages (AS and AZ suffix), multiple vias must be utilized. Please refer to the mechanical specification for more information. Applies to Figure 4. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 7 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com TYPICAL CHARACTERISTICS (1) (2) CHARACTERISTIC DATA (VI = 3.3 V) EFFICIENCY vs LOAD CURRENT OUTPUT RIPPLE vs LOAD CURRENT 16 100 2.0 1.8 V VO (V) 1.2 V 0.7 V 90 80 1.5 V 1.0 V 0.7 V 1.2 V 70 VO (V) 60 1.8 V 1.5 V 1.2 V 1.0 V 0.7 V 14 VO (V) 12 1.2 V 10 4 6 8 0.8 1.2 V 1.8 V 0.7 V 6 2 1.2 0.4 8 50 0 1.8 V 1.2 V 0.7 V 1.6 PD - Power Dissipation - W VO - Output Voltage Ripple - mVP-P 0.7 V h - Efficiency - % POWER DISSIPATION vs LOAD CURRENT 10 8 0 2 IO - Output Current - A 4 6 8 10 IO - Output Current - A Figure 5. 0 2 4 6 8 10 IO - Output Current - A Figure 6. Figure 7. SAFE OPERATING AREA 90 Natural Convection For All VO TA − Ambient Temperature − °C 80 70 60 50 40 30 20 0 2 4 6 8 10 IO − Output Current − A Figure 8. (1) (2) 8 The electrical characteristic data has been developed from actual products tested at 25C. This data is considered typical for the converter. Applies to Figure 5, Figure 6, and Figure 7. The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper. For surface mount packages (AS and AZ suffix), multiple vias must be utilized. Please refer to the mechanical specification for more information. Applies to Figure 8. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 APPLICATION INFORMATION ADJUSTING THE OUTPUT VOLTAGE The VOAdjust control (pin 8) sets the output voltage of the PTH04T240F. The adjustment range is between 0.69 V and 2.0 V. The adjustment method requires the addition of a single external resistor, RSET, that must be connected directly between the VOAdjust and – Sense pins. Table 1 gives the standard value of the external resistor for a number of standard voltages, along with the actual output voltage that this resistance value provides. For other output voltages, the value of the required resistor can either be calculated using the following formula, or simply selected from the range of values given in Table 2. Figure 9 shows the placement of the required resistor. 0.69 R SET + 10 kW * 1.43 kW V O * 0.69 (1) Table 1. Standard Values of RSET for Standard Output Voltages VO (Standard) (V) (1) RSET (Standard Value) (kΩ) VO (Actual) (V) 2.0 (1) 3.83 2.002 1.8 (1) 4.75 1.807 1.5 (1) 6.98 1.510 1.2 12.1 1.200 1 20.5 1.004 0.7 681 0.700 The minimum input voltage is 2.2 V or (VO + 0.5) V, whichever is greater. +Sense PTH04T240F 6 +Sense 5 VO VO -Sense GND 3 7 VOAdj 4 8 RSET 1% 0.05 W -Sense GND UDG-08159 (1) RSET: Use a 0.05 W resistor with a tolerance of 1% and temperature stability of 100 ppm/°C (or better). Connect the resistor directly between VOAdjust (pin 8) and -Sense (pin 7), as close to the regulator as possible, using dedicated PCB traces. (2) Never connect capacitors from VOAdjust (pin 8) to either +Sense (pin 6), GND, or VO (pin 5). Any capacitance added to the VOAdjust pin affects the stability of the regulator. Figure 9. VO Adjust Resistor Placement Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 9 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com Table 2. Output Voltage Set-Point Resistor Values (Standard Values) (1) (1) 10 OUTPUT VOLTAGE (VO) REQUIRED (V) SET POINT RESISTOR RSET (kΩ) 0.70 681 0.75 113 0.80 61.9 0.85 41.2 0.90 31.6 0.95 24.9 1.00 20.5 1.05 17.8 1.10 15.4 1.15 13.7 1.20 12.1 1.25 10.7 1.30 9.88 1.35 9.09 1.40 8.25 1.45 7.68 1.50 6.98 1.55 6.49 1.60 6.04 1.65 5.76 1.70 5.36 1.75 5.11 1.80 4.75 1.85 4.53 1.90 4.22 1.95 4.02 2.00 3.83 The minimum input voltage is 2.2 V or (VO + 0.5) V, whichever is greater. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 CAPACITOR RECOMMENDATIONS FOR THE PTH04T240/241W POWER MODULE Capacitor Technologies Electrolytic Capacitors When using electrolytic capacitors, high quality, computer-grade electrolytic capacitors are recommended. Aluminum electrolytic capacitors provide adequate decoupling over the frequency range, 2 kHz to 150 kHz, and are suitable when ambient temperatures are above -20°C. For operation below -20°C, tantalum, ceramic, or OS-CON type capacitors are required. Ceramic Capacitors Above 150 kHz the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic capacitors have very low ESR and a resonant frequency higher than the bandwidth of the regulator. They can be used to reduce the reflected ripple current at the input as well as improve the transient response of the output. Tantalum, Polymer-Tantalum Capacitors Tantalum type capacitors may only used on the output bus, and are recommended for applications where the ambient operating temperature is less than 0°C. The AVX TPS series and Kemet capacitor series are suggested over many other tantalum types due to their lower ESR, higher rated surge, power dissipation, and ripple current capability. Tantalum capacitors that have no stated ESR or surge current rating are not recommended for power applications. Input Capacitor (Required) The PTH04T240F requires a minimum input capacitance of 220µF. The ripple current rating of the input capacitor must be at least 500mArms. An additional 22-µF, X5R/X7R ceramic capacitor is recommended to reduce the RMS ripple current. Input Capacitor Information The size and value of the input capacitor is determined by the converter transient performance capability. This minimum value assumes that the converter is supplied with a responsive, low inductance input source. This source should have ample capacitive decoupling, and be distributed to the converter via PCB power and ground planes. Ceramic capacitors should be located as close as possible to the module's input pins, within 0.5 inch (1,3 cm). Adding ceramic capacitance is necessary to reduce the high-frequency ripple voltage at the module input. This reduces the magnitude of the ripple current through the electroytic capacitor, as well as the amount of ripple current reflected back to the input source. Additional ceramic capacitors can be added to further reduce the RMS ripple current requirement for the electrolytic capacitor. Increasing the minimum input capacitance to 680µF is recommended for high-performance applications, or wherever the input source performance is degraded. The main considerations when selecting input capacitors are the RMS ripple current rating, temperature stability, and less than 100 mΩ of equivalent series resistance (ESR). Regular tantalum capacitors are not recommended for the input bus. These capacitors require a recommended minimum voltage rating of 2 × (maximum dc voltage + ac ripple). This is standard practice to ensure reliability. No tantalum capacitors were found with a sufficient voltage rating to meet this requirement. When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these applications, OS-CON, poly-aluminum, and polymer-tantalum types should be considered. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 11 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com Output Capacitor (Required) The PTH04T240F requires a minimum output capacitance of 1000µF of aluminum, polymer-aluminum, tantulum, or polymer-tantalum type. The required capacitance above the minimum will be determined by actual transient deviation requirements. See the TurboTrans Technology Application section within this document for specific capacitance selection. Output Capacitor Information When selecting output capacitors, the main considerations are capacitor type, temperature stability, and ESR. When using the TurboTrans feature, the capacitance x ESR product should also be considered (see the following section). Ceramic output capacitors added for high-frequency bypassing should be located as close as possible to the load to be effective. Ceramic capacitor values below 10µF should not be included when calculating the total output capacitance value. When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these applications, OS-CON, poly-aluminum, and polymer-tantalum types should be considered. TurboTrans Output Capacitance TurboTrans allows the designer to optimize the output capacitance according to the system transient design requirement. High quality, ultra-low ESR capacitors are required to maximize TurboTrans effectiveness. When using TurboTrans, the capacitor's capacitance (µF) × ESR (mΩ) product determines its capacitor type; Type B, or Type C. These two types are defined as follows: • Type B = (1000 < capacitance × ESR ≤ 5000) (e.g. polymer-tantalum) • Type C = (5000 < capacitance × ESR ≤ 10,000) (e.g. OS-CON) When using more than one type of output capacitor, select the capacitor type that makes up the majority of your total output capacitance. When calculating the C×ESR product, use the maximum ESR value from the capacitor manufacturer's datasheet. Working Examples: A capacitor with a capacitance of 330µF and an ESR of 5mΩ, has a C×ESR product of 1650µFxmΩ (330µF × 5mΩ). This is a Type B capacitor. A capacitor with a capacitance of 1000µF and an ESR of 8mΩ, has a C×ESR product of 8000µFxmΩ (1000µF × 8mΩ). This is a Type C capacitor. See the TurboTrans Technology application section within this document for specific capacitance selection. Table 3 includes a preferred list of capacitors by type and vendor. See the Output Bus / TurboTrans column. Designing for Fast Load Transients The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of 2.5A/µs. The typical voltage deviation for this load transient is given in the Electrical Characteristics table using the minimum required value of output capacitance. As the di/dt of a transient is increased, the response of a converter’s regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional low ESR ceramic capacitor decoupling. Generally, with load steps greater than 100A/µs, adding multiple 10µF ceramic capacitors plus 10×1µF, and numerous high frequency ceramics (≤0.1µF) is all that is required to soften the transient higher frequency edges. The PCB location of these capacitors in relation to the load is critical. DSP, FPGA and ASIC vendors identify types, location and amount of capacitance required for optimum performance. Low impedance buses, unbroken PCB copper planes, and components located as close as possible to the high-frequency devices are essential for optimizing transient performance. 12 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 Table 3. Input/Output Capacitors (1) Capacitor Characteristics Quantity Max Ripple Current at 85°C (Irms) (mA) Output Bus Physical Size (mm) Input Bus Turbo-Trans Capacitor Type (2) Working Voltage (V) Value (µF) Max ESR at 100 kHz (mΩ) SP series (UE) 6.3 220 15 3000 7,3×4,3 2 B ≥ 5 (2) FC (Radial) 6.3 390 117 555 8 × 11,5 1 N/R (3) EEUFC0J391 FK (SMD) 6.3 470 160 600 10 × 10,2 1 N/R (3) EEVFK0J471P PTB, Poly-Tantalum (SMD) 6.3 330 25 2600 7,3×4,3×2,8 1 C ≥ 3 (2) LXZ, Aluminum (Radial) 6.3 680 120 555 8 × 12 1 N/R (3) PS, Poly-Alum (Radial) 6.3 390 12 4770 8 × 11,5 1 B ≥ 3 (2) PT Poly-Tantalum (SMD) 6.3 330 40 3000 7,3×4,3 1 N/R (3) Capacitor Vendor, Type Series (Style) Vendor Part No. Panasonic EEFUE0J221R United Chemi-Con PXA, Poly-Alum (Radial) B≥3 6PTB337MD6TER LXZ6.3VB681M8X12LL 6PS390MH11 6PT337MD8TER (2) 10 330 14 4420 8 × 12,2 1 PXA10VC331MH12 WG (SMD) 10 470 150 670 10 × 10 1 N/R (3) UWG1A471MNR1GS HD (Radial) 10 470 72 760 8 × 11,5 1 N/R (3) UHD1A471MPR Panasonic, Poly-Aluminum SE Series (SMD) 2.0 560 5 4000 7,3×4,3×4,2 N/R (4) B ≥ 2 (2) EEFSE0J561R(VO≤ 1.6V) (5) 10 330 25 3300 7,3×4,3 1 Nichicon, Aluminum Sanyo TPE, POSCAP (SMD) C ≥31 (2) 10TPE330MF (4) B ≥ 2 (2) 2R5TPE470M7 TPE, POSCAP (SMD) 2.5 470 7 4400 7,3×4,3 N/R TPD, POSCAP (SMD) 2.5 1000 5 6100 7,3×4,3 N/R (4) B ≥ 1 (2) 2R5TPD1000M5 SEP, OS-CON (Radial) 6.3 470 15 4210 10 × 12 1 C ≥ 2 (2) 6SEP470M SVPA, OS-CON (Radial) 6.3 470 19 4130 10 × 7,9 1 C ≥ 2 (2) 6SVPA470M SVP, OS-CON (SMD) 10 330 25 3700 10 × 7,9 1 C ≥ 3 (2) 10SVP330MX TPM Multianode 10 330 23 3000 7,3×4,3×4,1 1 C ≥ 3 (2) TPME337M010R0035 TPS Series III (SMD) 10 330 40 1830 7,3×4,3×4,1 1 N/R (3) TPSE337M010R0040 TPS Series III (SMD) 4 1000 25 2400 7,3×6,1×3.5 N/R (4) N/R (3) TPSV108K004R0035 T520 (SMD) 10 330 25 2600 7,3×4,3×4,1 1 C ≥ 3 (2) T520X337M010ASE025 T530 (SMD) 6.3 330 15 3800 7,3×4,3×4,1 1 B ≥ 3 (2) T530X337M010ASE015 (5) T530 (SMD) 4 680 5 7300 7,3×4,3×4,1 N/R (4) B ≥ 2 (2) T530X687M004ASE005 7,3×4,3×4,1 (4) (2) T530X108M2R5ASE005 AVX, Tantalum Kemet, Poly-Tantalum T530 (SMD) (1) (2) (3) (4) (5) 2.5 1000 5 7300 N/R B≥1 Capacitor Supplier Verification Please verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because of limited availability or obsolete products. RoHS, Lead-free and Material Details See the capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing process requirements. Component designators or part number deviations can occur when material composition or soldering requirements are updated. Required capacitors with TurboTrans. See the TurboTrans Application information for Capacitor Selection Capacitor Types: a. Type A = (100 < capacitance × ESR ≤ 1000) (Use Type A capacitors in addition to Type B or Type C) b. Type B = (1,000 < capacitance × ESR ≤ 5,000) c. Type C = (5,000 < capacitance × ESR ≤ 10,000) Aluminum Electrolytic capacitor not recommended for TurboTrans due to higher ESR × capacitance products. Aluminum and higher ESR capacitors can be used in conjunction with lower ESR capacitance. N/R – Not recommended. The voltage rating does not meet the minimum operating limits. The voltage rating of this capacitor only allows it to be used at a voltage that is equal to or less than 80% of the working voltage. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 13 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com Table 3. Input/Output Capacitors (continued) Capacitor Characteristics Quantity Max Ripple Current at 85°C (Irms) (mA) Output Bus Physical Size (mm) Input Bus Working Voltage (V) Value (µF) Max ESR at 100 kHz (mΩ) 597D, Tantalum (SMD) 10 330 35 2500 7,3×5,7×4,1 1 N/R (6) 94SP, OS-CON (Radial) 6.3 390 16 3810 8 × 10,5 1 C ≥ 3 (7) 94SP397X06R3EBP 94SVP OS-CON (SMD) 6.3 470 17 3960 8 × 12 1 C ≥ 2 (7) 94SVP477X06F12 Capacitor Vendor, Type Series (Style) Turbo-Trans Capacitor Type (2) Vendor Part No. Vishay-Sprague 1 A C1210C107M9PAC 1 A (7) C1210C476K9PAC 1 A (7) GRM32ER60J107M 6.3 100 2 (SMD) 6.3 47 2 Murata, Ceramic X5R 6.3 100 2 (SMD) 6.3 47 1 A (7) GRM32ER60J476ME20L 16 22 1 A (7) GRM32ER61CE226KE20L 16 10 1 A (7) GRM32DR61C106K TDK, Ceramic X5R 6.3 100 1 A (7) C3225X5R0J107MT (SMD) 6.3 47 1 A (7) C3225X5R0J476MT 16 10 1 A (7) C3225X5R1C106MT0 16 22 1 A (7) C3225X5R1C226MT (6) (7) 14 – – 3225 (7) Kemet, Ceramic X5R 2 – 597D337X010E2T 3225 3225 Aluminum Electrolytic capacitor not recommended for TurboTrans due to higher ESR × capacitance products. Aluminum and higher ESR capacitors can be used in conjunction with lower ESR capacitance. Required capacitors with TurboTrans. See the TurboTrans Application information for Capacitor Selection Capacitor Types: a. Type A = (100 < capacitance × ESR ≤ 1000) (Use Type A capacitors in addition to Type B or Type C) b. Type B = (1,000 < capacitance × ESR ≤ 5,000) c. Type C = (5,000 < capacitance × ESR ≤ 10,000) Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 TurboTrans™ Technology TurboTrans technology is a feature introduced in the T2 generation of the PTH/PTV family of power modules. TurboTrans optimizes the transient response of the regulator with added external capacitance using a single external resistor. Benefits of this technology include reduced output capacitance, minimized output voltage deviation following a load transient, and enhanced stability when using ultra-low ESR output capacitors. The amount of output capacitance required to meet a target output voltage deviation is reduced with TurboTrans activated. Likewise, for a given amount of output capacitance, with TurboTrans engaged, the amplitude of the voltage deviation following a load transient will be reduced. Applications requiring tight transient voltage tolerances and minimized capacitor footprint area will benefit greatly from this technology. TurboTrans™ Selection Utilizing TurboTrans requires connecting a resistor, RTT, between the +Sense pin (pin6) and the TurboTrans pin (pin9). The value of the resistor directly corresponds to the amount of output capacitance required. All T2 products require a minimum value of output capacitance. For the PTH04T240F, the minimum required capacitance is 1000µF. When using TurboTrans, capacitors with a capacitance × ESR product below 10,000 µF × mΩ are required. (Multiply the capacitance (in µF) by the ESR (in mΩ) to determine the capacitance × ESR product.) See the Capacitor Selection section of the datasheet for a variety of capacitors that meet this criteria. Figure 10 thru Figure 13 show the amount of output capacitance required to meet a desired transient voltage deviation with and without TurboTrans for two capacitor types; TypeB (e.g. polymer-tantalum) and TypeC (e.g. OS-CON). To calculate the proper value of RTT, first determine the required transient voltage deviation limits and magnitude of the transient load step. Next, determine what type of output capacitors will be used. (If more than one type of output capacitor is used, select the capacitor type that makes up the majority of your total output capacitance.) Knowing this information, use the chart in Figure 10 through Figure 13 that corresponds to the capacitor type selected. To use the chart, begin by dividing the maximum voltage deviation limit (in mV) by the magnitude of your load step (in amperes). This gives a mV/A value. Find this value on the Y-axis of the appropriate chart. Read across the graph to the 'With TurboTrans' plot. From this point, read down to the X-axis which lists the minimum required capacitance, CO, to meet that transient voltage deviation. The required RTT resistor value can then be calculated using the equation or selected from the TurboTrans table. The TurboTrans tables include both the required output capacitance and the corresponding RTT values to meet several values of transient voltage deviation for 25%(2.5A), 50%(5A), and 75%(7.5A) output load steps. The chart can also be used to determine the achievable transient voltage deviation for a given amount of output capacitance. By selecting the amount of output capacitance along the X-axis, reading up to the desired 'With TurboTrans'' curve, and then over to the Y-axis, gives the transient voltage deviation limit for that value of output capacitance. The required RTT resistor value can be calculated using the equation or selected from the TurboTrans table. As an example, consider a 5-V application requiring a 15 mV deviation during an 3A load transient. A majority of 330µF, 10 mΩ ouput capacitors will be used. Use the 5-V, Type B capacitor chart, Figure 10. Dividing 15mV by 3A gives 5mV/A transient voltage deviation per ampere of transient load step. Select 5mV/A on the Y-axis and read across to the 'With TurboTrans'' plot. Following this point down to the X-axis gives a minimum required output capacitance of approximately 1900µF. The required RTT resistor value for 1900µF can then be calculated or selected from Table 4. The required RTT resistor is approximately 27.4kΩ. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 15 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com PTH04T240F Type B Capacitors 20 20 3.3-V INPUT 6000 7000 8000 9000 10000 4000 2000 7000 8000 9000 10000 1 6000 1 5000 2 3000 2 5000 3 4000 3 4 3000 4 5 2000 5 10 9 8 7 6 1000 Transient - mV/A 10 9 8 7 6 1000 Transient - mV/A 5-V INPUT C - Capacitance - mF C - Capacitance - mF Figure 10. Capacitor Type B, 1000 < C(µF)×ESR(mΩ) ≤ 5000 (e.g. Polymer-Tantalum) Figure 11. Capacitor Type B, 1000 < C(µF)×ESR(mΩ) ≤ 5000 (e.g. Polymer-Tantalum) Table 4. Type B TurboTrans CO Values and Required RTT Selection Table TRANSIENT VOLTAGE DEVIATION (mV) 5-V INPUT 3.3-V INPUT 25% load step (2.5 A) 50% load step (5 A) 75% load step (7.5 A) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) 25 50 75 1000 open 1000 open 22 44 66 1065 487 1120 261 20 40 60 1180 169 1230 130 18 36 54 1300 97.6 1360 80.6 15 30 45 1580 47.5 1640 42.2 12 24 36 2000 23.7 2060 22.1 10 20 30 2400 15.0 2470 13.7 8 16 24 3020 7.87 3090 7.32 5 10 5 4900 0.21 5000 short RTT Resistor Selection The TurboTrans resistor value, RTT can be determined from the TurboTrans programming, see Equation 2. RTT = 40 ´ éë1 - (CO 5000 )ùû (kW ) éë(CO 1000 ) - 1ùû (2) Where CO is the total output capacitance in µF. CO values greater than or equal to 5000 µF require RTT to be a short, 0Ω. (RTT results in a negative value when CO > 5000µF). To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The value of RTT must be calculated using the minimum required output capacitance determined from the capacitor transient response charts above. 16 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 PTH04T240F Type C Capacitors 20 20 3.3-V INPUT 6000 7000 8000 9000 10000 4000 2000 7000 8000 9000 10000 1 6000 1 5000 2 3000 2 5000 3 4000 3 4 3000 4 5 2000 5 10 9 8 7 6 1000 Transient - mV/A 10 9 8 7 6 1000 Transient - mV/A 5-V INPUT C - Capacitance - mF C - Capacitance - mF Figure 12. Capacitor Type C, 5000 < C(µF)×ESR(mΩ) ≤ 10,000 (e.g. OS-CON) Figure 13. Capacitor Type C, 5000 < C(µF)×ESR(mΩ) ≤ 10,000 (e.g. OS-CON) Table 5. Type C TurboTrans CO Values and Required RTT Selection Table TRANSIENT VOLTAGE DEVIATION (mV) 5-V INPUT 3.3-V INPUT 25% load step (2.5 A) 50% load step (5 A) 75% load step (7.5 A) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) CO Minimum Required Output Capacitance (µF) RTT Required TurboTrans Resistor (kΩ) 25 50 75 1000 open 1000 open 22 44 66 1150 205 1170 178 20 40 60 1280 107 1300 97.6 18 36 54 1440 64.9 1450 63.4 15 30 45 1750 34.8 1750 34.8 12 24 36 2250 17.4 2220 18.2 10 20 30 2740 10.5 2680 11.0 8 16 24 3500 4.75 3400 5.36 5 10 5 6900 short 6300 short RTT Resistor Selection The TurboTrans resistor value, RTT can be determined from the TurboTrans programming, see Equation 3. RTT = 40 ´ éë1 - (CO 5000 )ùû (kW ) éë(CO 1000 ) - 1ùû (3) Where CO is the total output capacitance in µF. CO values greater than or equal to 5000 µF require RTT to be a short, 0 Ω. (RTT results in a negative value when CO > 5000µF). To ensure stability, the value of RTT must be calculated using the minimum required output capacitance determined from the capacitor transient response charts above. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 17 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com TurboTrans 10 9 Auto Track 1 VI TurboTrans +Sense Smart Sync 2 VI PTH04T240F 11 Inhibit/ Prog UVLO 3 CI 220 mF Required) 4 6 +Sense 5 VO VO -Sense GND + RTT 18.7 kW 7 VOAdj L O A D + 8 RSET 1% 0.05 W CO 2200 mF -Sense GND GND UDG-08160 Figure 14. Typical TurboTrans™ Application PTH04T240F CO = 2200 mF Without TurboTrans (20 mV/div) With TurboTrans (20 mV/div) 2.5 A/ms 3 A Load Step T - Time - 200 ms/div Figure 15. Typical TurboTrans Waveforms 18 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 UNDERVOLTAGE LOCKOUT (UVLO) The PTH04T240F power modules incorporate an input undervoltage lockout (UVLO). The UVLO feature prevents the operation of the module until there is sufficient input voltage to produce a valid output voltage. This enables the module to provide a clean, monotonic powerup for the load circuit, and also limits the magnitude of current drawn from the regulator input source during the power-up sequence. The UVLO characteristic is defined by the ON threshold (VTHD) voltage. Below the ON threshold, the Inhibit control is overridden, and the module does not produce an output. The hysteresis voltage, which is the difference between the ON and OFF threshold voltages, is set at 500 mV. The hysteresis prevents start-up oscillations, which can occur if the input voltage droops slightly when the module begins drawing current from the input source. The UVLO feature of the PTH04T240F module allows for limited adjustment of the ON threshold voltage. The adjustment is made via the Inhbit/UVLO Prog control pin (pin 11) using a single resistor (see Figure 16). When pin 11 is left open circuit, the ON threshold voltage is internally set to the 1.95-V default value. The ON threshold might need to be raised if the module is powered from a tightly regulated 5-V bus. Adjusting the threshold prevents the module from operating if the input bus fails to completely rise to its specified regulation voltage. Equation 4 determines the value of RUVLO required to adjust VTHD to a new value. The default value is 1.95 V, and it may be adjusted to a higher value only. 68.54 * V THD R UVLO + kW V THD * 2.07 (4) Table 6 lists the standard resistor values for RUVLO for different values of the on-threshold (VTHD) voltage. Table 6. Standard RUVLO values for Various VTHD values VTHD(V) 2.5 3.0 3.5 4.0 4.5 RUVLO (kΩ) 154 71.5 53.6 33.2 26.7 PTH04T240F VI 2 VI 11 + CI GND Inhibit/ UVLO Prog GND 3 4 RUVLO UDG-08161 Figure 16. Undervoltage Lockout Adjustment Resistor Placement Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 19 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com Soft-Start Power Up The Auto-Track feature allows the power-up of multiple PTH/PTV modules to be directly controlled from the Track pin. However in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track pin should be directly connected to the input voltage, VI (see Figure 17). When the Track pin is connected to the input voltage the Auto-Track function is permanently disengaged. This allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate. From the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically 5 ms–15 ms) before allowing the output voltage to rise. The output then progressively rises to the module’s setpoint voltage. Figure 18 shows the soft-start power-up characteristic of the PTH04T240F operating from a 5-V input bus and configured for a 1.8-V output. The waveforms were measured with a 10-A constant current load and the Auto-Track feature disabled. The initial rise in input current when the input voltage first starts to rise is the charge current drawn by the input capacitors. Power-up is complete within 30 ms. 10 VI (2 V/div) Track PTH04T240F VI VO (500 mV/div) 2 VI GND + CI 3 II (1 A/div) 4 GND UDG-08162 T - Time - 4 ms/div Figure 17. Defeating the Auto-Track Function 20 Submit Documentation Feedback Figure 18. Power-Up Waveform Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 On/Off Inhibit For applications requiring output voltage on/off control, the PTH04T240F incorporates an Inhibit control pin. The inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned off. The power modules function normally when the Inhibit pin is left open-circuit, providing a regulated output whenever a valid source voltage is connected to VI with respect to GND. Figure 19 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit input has its own internal pull-up. An external pull-up resistor should never be used with the inhibit pin. The input is not compatible with TTL logic devices. An open-collector (or open-drain) discrete transistor is recommended for control. Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is then turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within 40 ms. Figure 20 shows the typical rise in both the output voltage and input current, following the turn-off of Q1. The turn off of Q1 corresponds to the rise in the waveform, VINH. The waveforms were measured with a 10-A constant current load. VI PTH04T240F 2 VI VO (500 mV/div) 11 + CI 1=Inhibit Inhibit/ UVLO Prog GND 3 II (1 A/div) 4 VI (2 V/div) GND UDG-08163 T - Time - 4 ms/div Figure 19. On/Off Inhibit Control Circuit Figure 20. Power-Up Response from Inhibit Control Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 21 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com Smart Sync Smart Sync is a feature that allows multiple power modules to be synchronized to a common frequency. Driving the Smart Sync pins with an external oscillator set to the desired frequency, synchronizes all connected modules to the selected frequency. The synchronization frequency can be higher or lower than the nominal switching frequency of the modules within the range of 240 kHz to 400 kHz (see Electrical Specifications table for synchronization limits). Synchronizing modules powered from the same bus, eliminates beat frequencies reflected back to the input supply, and also reduces EMI filtering requirements. Eliminating the low beat frequencies (usually < 10 kHz) allows the EMI filter to be designed to attenuate only the synchronization frequency. Power modules can also be synchronized out of phase to minimize source current loading and minimize input capacitance requirements. Figure 21 shows a standard circuit with two modules syncronized 180° out of phase using a D flip-flop. Track 0° VI = 5 V TT SYNC +Sense VI VO1 PTH08T220W SN74LVC2G74 + VCC fCLK = 2 x fMODULE CLR PRE CLK Q D Q GND VO Inhibit/ UVLO -Sense GND CI1 330 mF + VOAdj CO1 220 mF RSET1 GND 180° Track Sync TT +Sense VI VO2 PTH04T240F Inhibit/ UVLO + VO -Sense GND VoAdj CI2 220 mF + CO2 1000 mF RSET2 GND UDG-08164 Figure 21. Smart Sync Schematic 22 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 Overcurrent Protection For protection against load faults, all modules incorporate output overcurrent protection. Applying a load that exceeds the regulator's overcurrent threshold causes the regulated output to shut down. Following shutdown, the module periodically attempts to recover by initiating a soft-start power-up. This is described as a hiccup mode of operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is removed, the module automatically recovers and returns to normal operation. Overtemperature Protection (OTP) A thermal shutdown mechanism protects the module’s internal circuitry against excessively high temperatures. A rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the internal temperature exceeds the OTP threshold, the module’s Inhibit control is internally pulled low. This turns the output off. The output voltage drops as the external output capacitors are discharged by the load circuit. The recovery is automatic, and begins with a soft-start power up. It occurs when the sensed temperature decreases by about 10°C below the trip point. The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator. Operation at or close to the thermal shutdown temperature is not recommended and reduces the long-term reliability of the module. Always operate the regulator within the specified safe operating area (SOA) limits for the worst-case conditions of ambient temperature and airflow. Differential Output Voltage Remote Sense Differential remote sense improves the load regulation performance of the module by allowing it to compensate for any IR voltage drop between its output and the load in either the positive or return path. An IR drop is caused by the output current flowing through the small amount of pin and trace resistance. With the sense pins connected, the difference between the voltage measured directly between the VO and GND pins, and that measured at the Sense pins, is the amount of IR drop being compensated by the regulator. This should be limited to a maximum of 0.3V. Connecting the +Sense (pin 6) to the positive load terminal improves the load regulation at the connection point. For optimal behavior the –Sense (pin 7) must be connected to GND (pin 4) close to the module (within 10 cm). If the remote sense feature is not used at the load, connect the +Sense pin to VO (pin5) and connect the –Sense pin to the module GND (pin 4). The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency dependent components that may be placed in series with the converter output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense connection they are effectively placed inside the regulation control loop, which can adversely affect the stability of the regulator. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 23 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com Auto-Track™ Function The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track was designed to simplify the amount of circuitry required to make the output voltage from each module power up and power down in sequence. The sequencing of two or more supply voltages during power up is a common requirement for complex mixed-signal applications that use dual-voltage VLSI ICs such as the TMS320™ DSP family, microprocessors, and ASICs. How Auto-Track™ Works Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin (1). This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is raised above the set-point voltage, the module output remains at its set-point (2). As an example, if the Track pin of a 2.5-V regulator is at 1 V, the regulated output is 1 V. If the voltage at the Track pin rises to 3 V, the regulated output does not go higher than 2.5 V. When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow a common signal during power up and power down. The control signal can be an externally generated master ramp waveform, or the output voltage from another power supply circuit (3). For convenience, the Track input incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising waveform at power up. Typical Application The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track compliant modules. Connecting the Track inputs of two or more modules forces their track input to follow the same collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a common Track control signal. This can be an open-collector (or open-drain) device, such as a power-up reset voltage supervisor IC. See U3 in Figure 22. To coordinate a power-up sequence, the Track control must first be pulled to ground potential. This should be done at or before input power is applied to the modules. The ground signal should be maintained for at least 20 ms after input power has been applied. This brief period gives the modules time to complete their internal soft-start initialization (4), enabling them to produce an output voltage. A low-cost supply voltage supervisor IC, that includes a built-in time delay, is an ideal component for automatically controlling the Track inputs at power up. Figure 22 shows how a TPS3808 supply voltage supervisor IC (U3) can be used to coordinate the sequenced power up of 5-V PTH modules. The output of the TPS3808 supervisor becomes active above an input voltage of 0.8 V, enabling it to assert a ground signal to the common track control well before the input voltage has reached the module's undervoltage lockout threshold. The ground signal is maintained until approximately 27ms after the input voltage has risen above U3's voltage threshold, which is 4.65V. The 27-ms time period is controlled by the capacitor C3. The value of 4700pF provides sufficient time delay for the modules to complete their internal soft-start initialization. The output voltage of each module remains at zero until the track control voltage is allowed to rise. When U3 removes the ground signal, the track control voltage automatically rises. This causes the output voltage of each module to rise simultaneously with the other modules, until each reaches its respective set-point voltage. Figure 23 shows the output voltage waveforms after input voltage is applied to the circuit. The waveforms, VO1 and VO2, represent the output voltages from the two power modules, U1 (3.3 V) and U2 (1.8 V), respectively. VTRK, VO1, and VO2 are shown rising together to produce the desired simultaneous power-up characteristic. The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage threshold, the ground signal is re-applied to the common track control. This pulls the track inputs to zero volts, forcing the output of each module to follow, as shown in Figure 24. Power down is normally complete before the input voltage has fallen below the modules' undervoltage lockout. This is an important constraint. Once the modules recognize that an input voltage is no longer present, their outputs can no longer follow the voltage applied at their track input. During a power-down sequence, the fall in the output voltage from the modules is limited by the Auto-Track slew rate capability. 24 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 Notes on Use of Auto-Track™ 1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module regulates at its adjusted set-point voltage. 2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp speeds of up to 1 V/ms. 3. The absolute maximum voltage that may be applied to the Track pin is the input voltage VI. 4. The module cannot follow a voltage at its track control input until it has completed its soft-start initialization. This takes about 20 ms from the time that a valid voltage has been applied to its input. During this period, it is recommended that the Track pin be held at ground potential. 5. The Auto-Track function is disabled by connecting the Track pin to the input voltage (VI). When Auto-Track is disabled, the output voltage rises according to its softstart rate after input power has been applied. 6. The Auto-Track pin should never be used to regulate the module's output voltage for long-term, steady-state operation. Auto Track VI = 5 V +Sense VI U1 PTH04T230W C4 0.1 mF VCC MR SENSE -Sense CT RESET VOAdj GND + 5 CO1 RSET1 1.21 kW CI1 U3 TPS3808G50 4 VO1 3.3 V VO 6 3 RTT TurboTrans 1 GND Auto Track 2 RTT TurboTrans +Sense C3 4700 mF VI U2 PTH04T240F VO2 1.8 V Vo -Sense + GND VOAdj RSET2 4.75 kW CI2 CO2 UDG-08157 Figure 22. Sequenced Power Up and Power Down Using Auto-Track Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 25 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com VTRK (1 V/div) VTRK (1 V/div) VO1 (1 V/div) VO1 (1 V/div) VO2 (1 V/div) VO2 (1 V/div) T − Time − 200 µs/div T − Time − 20 ms/div Figure 23. Simultaneous Power Up With Auto-Track Control Figure 24. Simultaneous Power Down With Auto-Track Control Prebias Startup Capability A prebias startup condition occurs as a result of an external voltage being present at the output of a power module prior to its output becoming active. This often occurs in complex digital systems when current from another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another path might be via clamp diodes as part of a dual-supply power-up sequencing arrangement. A prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under most operating conditions, these types of modules can sink as well as source output current. The PTH family of power modules incorporate synchronous rectifiers, but does not sink current during startup(1), or whenever the Inhibit pin is held low. However, to ensure satisfactory operation of this function, certain conditions must be maintained(2). Figure 25 shows an application demonstrating the prebias startup capability. The startup waveforms are shown in Figure 26. Note that the output current (IO) is negligible until the output voltage rises above the voltage backfed through the intrinsic diodes. The prebias start-up feature is not compatible with Auto-Track. When the module is under Auto-Track control, it sinks current if the output voltage is below that of a back-feeding source. To ensure a pre-bias hold-off one of two approaches must be followed when input power is applied to the module. The Auto-Track function must either be disabled(3), or the module’s output held off (for at least 50 ms) using the Inhibit pin. Either approach ensures that the Track pin voltage is above the set-point voltage at start up. 1. Startup includes the short delay (approximately 10 ms) prior to the output voltage rising, followed by the rise of the output voltage under the module’s internal soft-start control. Startup is complete when the output voltage has risen to either the set-point voltage or the voltage at the Track pin, whichever is lowest. 2. To ensure that the regulator does not sink current when power is first applied (even with a ground signal applied to the Inhibit control pin), the input voltage must always be greater than the output voltage throughout the power-up and power-down sequence. 3. The Auto-Track function can be disabled at power up by immediately applying a voltage to the module’s Track pin that is greater than its set-point voltage. This can be easily accomplished by connecting the Track pin to VI. 26 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 3.3 V Track VI = 5 V VI +Sense PTH04T240W Inhibit GND Vadj VO Vo = 2.5 V Io -Sense VCCIO VCORE + CI 330 mF RSET 2.37 kW CO 200 mF ASIC Figure 25. Application Circuit Demonstrating Prebias Startup VIN (1 V/div) VO (1 V/div) IO (2 A/div) t - Time = 4 ms/div Figure 26. Prebias Startup Waveforms Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 27 PTH04T240F SLTS293 – DECEMBER 2008............................................................................................................................................................................................ www.ti.com TAPE AND REEL 28 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F PTH04T240F www.ti.com............................................................................................................................................................................................ SLTS293 – DECEMBER 2008 TRAY Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH04T240F 29 PACKAGE OPTION ADDENDUM www.ti.com 22-Dec-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty PTH04T240FAD ACTIVE DIP MOD ULE EBS 11 49 TBD Call TI N / A for Pkg Type PTH04T240FAS ACTIVE DIP MOD ULE EBT 11 49 TBD Call TI Level-1-235C-UNLIM/ Level-3-260C-168HRS PTH04T240FAST ACTIVE DIP MOD ULE EBT 11 250 TBD Call TI Level-1-235C-UNLIM/ Level-3-260C-168HRS PTH04T240FAZ ACTIVE DIP MOD ULE BBT 11 49 TBD Call TI Level-3-260C-168 HR PTH04T240FAZT ACTIVE DIP MOD ULE BBT 11 250 TBD Call TI Level-3-260C-168 HR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. 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