TI PTH04T260WAD

PTH04T260W, PTH04T261W
www.ti.com.................................................................................................................................................. SLTS273E – SEPTEMBER 2006 – REVISED JULY 2009
3-A, 2.2-V to 5.5-V INPUT, NON-ISOLATED,
WIDE-OUTPUT, ADJUSTABLE POWER MODULE WITH TurboTrans™
FEATURES
1
•
•
•
•
•
•
2
•
•
•
•
•
•
•
•
Up to 3-A Output Current
2.2-V to 5.5-V Input Voltage
Wide-Output Voltage Adjust (0.69 V to 3.6 V)
±1.5% Total Output Voltage Variation
Efficiencies up to 96%
Output Overcurrent Protection
(Nonlatching, Auto-Reset)
Operating Temperature: –40°C to 85°C
Safety Agency Approvals:
– UL60950, CSA 22.2 950, EN60950 VDE
Prebias Startup
On/Off Inhibit
Differential Output Voltage Remote Sense
Adjustable Undervoltage Lockout
Auto-Track™ Sequencing
Ceramic Capacitor Version (PTH04T261W)
•
•
•
TurboTrans™ Technology
Designed to meet Ultra-Fast Transient
Requirements up to 300 A/µs
SmartSync Technology
APPLICATIONS
•
•
•
Complex Multi-Voltage Systems
Microprocessors
Bus Drivers
DESCRIPTION
The PTH04T260/261W is a high-performance, 3-A rated, non-isolated power module. This regulator represents
the 2nd generation of the PTH series of power modules which include a reduced footprint and improved features.
The PTH04T261W is optimized to be used in applications requiring all ceramic capacitors.
Operating from an input voltage range of 2.2 V to 5.5 V, the PTH04T260/261W requires a single resistor to set
the output voltage to any value over the range, 0.69 V to 3.6 V. The wide input voltage range makes the
PTH04T260/261W particularly suitable for advanced computing and server applications that use a 2.5-V, 3.3-V or
5-V intermediate bus architecture.
The module incorporates a comprehensive list of features. Output over-current and over-temperature shutdown
protects against most load faults. A differential remote sense ensures tight load regulation. An adjustable
under-voltage lockout allows the turn-on voltage threshold to be customized. Auto-Track™ sequencing is a
popular feature that greatly simplifies the simultaneous power-up and power-down of multiple modules in a
power system.
The PTH04T260/261W includes new patent pending technologies, TurboTrans™ and SmartSync. The
TurboTrans feature optimizes the transient response of the regulator while simultaneously reducing the quantity
of external output capacitors required to meet a target voltage deviation specification. Additionally, for a target
output capacitor bank, TurboTrans can be used to significantly improve the regulators transient response by
reducing the peak voltage deviation. SmartSync allows for switching frequency synchronization of multiple
modules, thus simplifying EMI noise suppression tasks and reduces input capacitor RMS current requirements.
Double-sided surface mount construction provides a low profile and compact footprint. Package options include
both through-hole and surface mount configurations that are lead (Pb) - free and RoHS compatible.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TurboTrans, TMS320 are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006–2009, Texas Instruments Incorporated
PTH04T260W, PTH04T261W
SLTS273E – SEPTEMBER 2006 – REVISED JULY 2009.................................................................................................................................................. www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
PTH04T260W
SmartSync
TurboTransE
Track
VI
2
9
1
Track
SYNC
8
TT
+Sense
VI
5
RTT
1%
0.05 W
(Optional)
+Sense
4
PTH04T260W
Inhibit
10
Vo
Vo
6
INH/UVLO
−Sense
GND
VoAdj
3
7
L
O
A
D
+
+
GND
RUVLO
1%
0.05 W
(Optional)
RSET
1%
0.05 W
(Required)
(Note A)
CI
330 µF
(Required)
(Note B)
CO1
100 µF
Ceramic
(Required)
CO2
150 µF
(Required)
−Sense
GND
UDG−06046
A.
RSET required to set the output voltage to a value higher than 0.69 V. See the Electrical Characteristics table.
B.
An additional 22-µF ceramic input capacitor is recommended to reduce RMS ripple current.
PTH04T261W - Ceramic Capacitor Version
SmartSync
TurboTransE
Track
VI
2
9
1
Track
SYNC
8
TT
+Sense
VI
5
RTT
1%
0.05 W
(Optional)
+Sense
4
PTH04T261W
Inhibit
GND
2
10
RUVLO
1%
0.05 W
(Optional)
6
INH/UVLO
CI
300 µF
(Required)
Vo
Vo
−Sense
GND
VoAdj
3
7
RSET
1%
0.05 W
(Required)
(Note A)
CO
300 µF
Ceramic
(Required)
L
O
A
D
−Sense
GND
A.
RSET required to set the output voltage to a value higher than 0.69 V. See the Electrical Characteristics table.
B.
300 µF of ceramic or 330 µF of electrolytic input capacitance is required for proper operation.
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Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): PTH04T260W PTH04T261W
PTH04T260W, PTH04T261W
www.ti.com.................................................................................................................................................. SLTS273E – SEPTEMBER 2006 – REVISED JULY 2009
ORDERING INFORMATION
For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or see
the TI website at www.ti.com.
DATASHEET TABLE OF CONTENTS
DATASHEET SECTION
PAGE NUMBER
ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS
3
ELECTRICAL CHARACTERISTICS TABLE (PTH04T260W)
4
ELECTRICAL CHARACTERISTICS TABLE (PTH04T261W)
6
PIN-OUT AND TERMINAL FUNCTIONS
8
TYPICAL CHARACTERISTICS (VI = 5V)
9
TYPICAL CHARACTERISTICS (VI = 3.3V)
10
ADJUSTING THE OUTPUT VOLTAGE
11
CAPACITOR RECOMMENDATIONS
13
TURBOTRANS™ INFORMATION
17
UNDERVOLTAGE LOCKOUT (UVLO)
22
SOFT-START POWER-UP
23
REMOTE SENSE
23
OUTPUT ON/OFF INHIBIT
24
OVER-CURRENT PROTECTION
24
OVER-TEMPERATURE PROTECTION
25
SYCHRONIZATION (SMARTSYNC)
25
AUTO-TRACK SEQUENCING
26
PREBIAS START-UP
28
TAPE & REEL AND TRAY DRAWINGS
30
ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS
(Voltages are with respect to GND)
UNIT
VTrack
Track pin voltage
–0.3 to VI + 0.3
TA
Operating temperature range Over VI range
Twave
Wave soldering temperature
Surface temperature of module body or pins
(5 seconds maximum)
Treflow
Solder reflow temperature
Surface temperature of module body or pins
Tstg
Storage temperature
Storage temperature of module removed from shipping package
Tpkg
Packaging temperature
Shipping Tray or Tape and Reel storage or bake temperature
Mechanical shock
Per Mil-STD-883D, Method 2002.3 1 msec, 1/2
sine, mounted
Mechanical vibration
Mil-STD-883D, Method 2007.2 20-2000 Hz
(1)
AD suffix
260
AS suffix
235 (1)
AZ suffix
260 (1)
45
500
Suffix AS and AZ
250
Suffix AD
20
Suffix AS and AZ
°C
–55 to 125
Suffix AD
Weight
Flammability
V
–40 to 85
G
15
2.7
grams
Meets UL94V-O
During reflow of surface mount package version do not elevate peak temperature of the module, pins or internal components above the
stated maximum.
Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): PTH04T260W PTH04T261W
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3
PTH04T260W, PTH04T261W
SLTS273E – SEPTEMBER 2006 – REVISED JULY 2009.................................................................................................................................................. www.ti.com
ELECTRICAL CHARACTERISTICS
PTH04T260W
TA =25°C, VI = 5 V, VO = 3.3 V, CI = 330 µF, CO1 = 100 µF ceramic, CO2 = 150 µF non-ceramic, and IO = IO max (unless
otherwise stated)
PARAMETER
TEST CONDITIONS
PTH04T260W
MIN
IO
Output current
VI
Over VO range
Input voltage range
Over IO range
Output adjust range
Over IO range
25°C, natural convection
0.69 ≤ VO ≤ 1.7
1.7 < VO ≤ 3.6
η
0
3
5.5
VO+0.5 (1)
5.5
0.69
3.6
±0.5
±0.3
%Vo
Over VI range
±2
mV
Load regulation
Over IO range
±2
Total output variation
Includes set-point, line, load, –40°C ≤ TA ≤ 85°C
IO = 3 A
RSET = 1.21 kΩ, VO = 3.3 V
95%
RSET = 2.38 kΩ, VO = 2.5 V
93%
RSET = 4.78 kΩ, VO = 1.8 V
91%
RSET = 7.09 kΩ, VO = 1.5 V
90%
RSET = 12.1 kΩ, VO = 1.2 V
88%
RSET = 20.8 kΩ, VO = 1.0 V
87%
RSET = 689 kΩ, VO = 0.7 V
84%
20-MHz bandwidth
1
Overcurrent threshold
Reset, followed by auto-recovery
6
2.5 A/µs load step
50% to 100% IOmax
VI = 3.3 V
VO = 2.5 V
Track input current (pin 9)
Pin to GND
dVtrack/dt
Track slew rate capability
CO ≤ CO (max)
UVLOADJ
Adjustable Under-voltage lockout
(pin 10)
%VO
A
µSec
VO Overshoot
50
mV
w/o TurboTrans
CO1 = 100 µF ceramic
CO2 = 990 µF, Type B
Recovery Time
120
µSec
VO Overshoot
30
mV
with TurboTrans
CO1 = 100 µF ceramic
CO2 = 990 µF, Type B
RTT = 1.54 kΩ
Recovery Time
180
µSec
VO Overshoot
18
mV
(4)
-130
1.95
VI decreasing, RUVLO = OPEN
1.3
Inhibit (pin 10) to GND, Track (pin 9) open
fs
Switching frequency
Over VI and IO ranges, SmartSync (pin 1) to GND
fSYNC
Synchronization (SYNC) frequency
VSYNCH
SYNC High-Level Input Voltage
V/ms
2.19
V
Open (6)
-0.2
Input low current (IIL), Pin 10 to GND
Input standby current
µA
1
0.5
Input low voltage (VIL)
Iin
(5)
1.5
Input high voltage (VIH)
4
%VO
100
Hysteresis, RUVLO ≤ 52.3 kΩ
(6)
(3)
Recovery Time
VI increasing, RUVLO = OPEN
Inhibit control (pin 10)
mV
±1.5
VO Ripple (peak-to-peak)
IIL
(4)
(5)
V
%Vo
–40°C < TA < 85°C
Transient response
(3)
(2)
V
Line regulaltion
w/o TurboTrans
CO1 = 100 µF, ceramic
CO2 = 150 µF,
non-ceramic
(1)
(2)
±1
A
Temperature variation
Efficiency
ILIM
UNIT
MAX
2.2
Set-point voltage tolerance
VO
TYP
0.6
V
125
µA
5
mA
300
kHz
240
400
kHz
2
5.5
V
The minimum input voltage is 2.2 V or (VO + 0.5) V, whichever is greater.
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with 100 ppm/C or better temperature stability. .
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with 200 ppm/C or better temperature stability.
Without TurboTrans, the minimum ESR limit of 7 mΩ must not be violated.
A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 9. The
open-circuit voltage is less than VI.
This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when
input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. The open-circuit voltage is less than
3.5Vdc. For additional information, see the related application information section.
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Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): PTH04T260W PTH04T261W
PTH04T260W, PTH04T261W
www.ti.com.................................................................................................................................................. SLTS273E – SEPTEMBER 2006 – REVISED JULY 2009
ELECTRICAL CHARACTERISTICS (continued)
PTH04T260W
TA =25°C, VI = 5 V, VO = 3.3 V, CI = 330 µF, CO1 = 100 µF ceramic, CO2 = 150 µF non-ceramic, and IO = IO max (unless
otherwise stated)
PARAMETER
TEST CONDITIONS
PTH04T260W
MIN
VSYNCL
SYNC Low-Level Input Voltage
tSYNC
SYNC Minimum Pulse Width
CI
External input capacitance
0.8
Reliability
Capacitance value
330
(7)
Nonceramic
150
(8)
Ceramic
100
(8)
Equivalent series resistance (non-ceramic)
External output capacitance
with
Turbotrans
MTBF
UNIT
MAX
200
without
TurboTrans
CO
TYP
Capacitance value
(10)
Capacitance × ESR product (CO × ESR)
Per Telcordia SR-332, 50% stress,
TA = 40°C, ground benign
µF
5000
(9)
500
7
see table
1000
V
ns
µF
mΩ
5,000
(11)
10,000
5.6
µF
µF×mΩ
106 Hr
(7)
A 330 µF input capacitor is required for proper operation. The capacitor must be rated for a minimum of 400 mA rms of ripple current.
An additional 22-µF ceramic input capacitor is recommended to reduce rms ripple current.
(8) 100 µF ceramic and 150 F non-ceramic external output capacitance is required for basic operation. The minimum output capacitance
requirement increases when TurboTrans™ (TT) technology is used. See the Application Information for more guidance.
(9) This is the calculated maximum disregarding TurboTrans™ technology. When the TurboTrans feature is used, the minimum output
capacitance must be increased. See the TurboTrans application notes for further guidance.
(10) When using TurboTrans™ technology, a minimum value of output capacitance is required for proper operation. Additionally, low ESR
capacitors are required for proper operation. See the TurboTrans application notes for further guidance.
(11) This is the calaculated maximum when using the TurboTrans feature. Additionally, low ESR capacitors are required for proper operation.
See the TurboTrans application notes for further guidance.
Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): PTH04T260W PTH04T261W
Submit Documentation Feedback
5
PTH04T260W, PTH04T261W
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ELECTRICAL CHARACTERISTICS
PTH04T261W (Ceramic Capacitors)
TA = 25°C, VI = 5 V, VO = 3.3 V, CI = 300 µF ceramic, CO = 300 µF ceramic, and IO = IO max (unless otherwise stated)
PARAMETER
TEST CONDITIONS
PTH04T261W
MIN
IO
Output current
Over VO range
VI
Input voltage range
Over IO range
VOADJ
Output voltage adjust range
Over IO range
25°C, natural convection
η
0
3
5.5
1.7 < VO ≤ 3.6 VO+0.5 (1)
5.5
0.69
3.6
±0.5
±0.3
%Vo
Over VI range
±2
mV
Load regulation
Over IO range
±2
Total output variation
Includes set-point, line, load, –40°C ≤ TA ≤ 85°C
IO = 3 A
RSET = 1.21 kΩ, VO = 3.3 V
95%
RSET = 2.38 kΩ, VO = 2.5 V
93%
RSET = 4.78 kΩ, VO = 1.8 V
91%
RSET = 7.09 kΩ, VO = 1.5 V
90%
RSET = 12.1 kΩ, VO = 1.2 V
88%
RSET = 20.8 kΩ, VO = 1.0 V
87%
RSET = 689 kΩ, VO = 0.7 V
84%
(2)
%Vo
20-MHz bandwidth
1
Overcurrent threshold
Reset, followed by auto-recovery
6
A
100
µs
VO over/undershoot
35
mV
Recovery time
100
µs
VO over/undershoot
28
mV
Recovery time
150
µs
VO over/undershoot
18
2.5 A/µs load step
50 to 100% IOmax
VI = 3.3 V
VO = 2.5 V
Track input current (pin 9)
Pin to GND
dVtrack/dt
Track slew rate capability
CO ≤ CO (max)
UVLOADJ
Adjustable Under-voltage lockout
(pin 10)
w/o TurboTrans
CO= 800 µF, TypeA
RTT = open
w/ TurboTrans
CO=800 µF, TypeA
RTT = 11.3 kΩ
Recovery time
1.95
Vi decreasing, RUVLO = OPEN
1.3
Hysteresis, RUVLO = OPEN
Inhibit (pin 10) to GND, Track (pin 9) open
fs
Switching frequency
Over VI and IO ranges, SmartSync (pin 1) to GND
fSYNC
Synchronization (SYNC)
frequency
VSYNCH
SYNC High-Level Input Voltage
VSYNCL
SYNC Low-Level Input Voltage
tSYNC
SYNC Minimum Pulse Width
V/ms
2.19
V
Open (4)
-0.2
Input low current (IIL ), Pin 10 to GND
Input standby current
µA
1
0.5
Input low voltage (VIL)
Iin
mV
(3)
1.5
Input high voltage (VIH)
Inhibit control (pin 10)
%VO
–130
VI increasing, RUVLO = OPEN
6
mV
±1.5
VO Ripple (peak-to-peak)
IIL
(4)
V
%Vo
–40°C < TA < 85°C
Transient response
(3)
(2)
V
Line regulaltion
w/o TurboTrans
CO= 300 µF, TypeA
(1)
(2)
±1
A
Temperature variation
Efficiency
ILIM
UNIT
MAX
2.2
0.69 ≤ VO ≤ 1.7
Set-point voltage tolerance
VO
TYP
0.8
V
-235
µA
5
mA
300
kHz
240
400
kHz
2
5.5
V
0.8
200
V
nSec
The minimum input voltage is 2.2 V or (VO + 0.5) V, whichever is greater.
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with 100 ppm/C or better temperature stability. .
A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 9. The
open-circuit voltage is less than VI.
This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when
input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. The open-circuit voltage is less than
3.5Vdc. For additional information, see the related application note.
Submit Documentation Feedback
Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): PTH04T260W PTH04T261W
PTH04T260W, PTH04T261W
www.ti.com.................................................................................................................................................. SLTS273E – SEPTEMBER 2006 – REVISED JULY 2009
ELECTRICAL CHARACTERISTICS (continued)
PTH04T261W (Ceramic Capacitors)
TA = 25°C, VI = 5 V, VO = 3.3 V, CI = 300 µF ceramic, CO = 300 µF ceramic, and IO = IO max (unless otherwise stated)
PARAMETER
TEST CONDITIONS
PTH04T261W
MIN
CI
External input capacitance
w/o TurboTrans
CO
External output capacitance
w/ TurboTrans
Capacitance Value
Ceramic
Capacitance Value
Capacitance × ESR product (CO × ESR)
MTBF
(5)
(6)
(7)
Reliability
Per Telcordia SR-332, 50% stress,
TA = 40°C, ground benign
300
(5)
300
(6)
TYP
UNIT
MAX
µF
(7)
µF
(6)
5000
µF
100
1000
µF×mΩ
see table
5000
5.6
106 Hr
300 µF of input capacitance is required for proper operation. 300 µF of ceramic or 330 µF of electrolytic input capacitance can be used.
Electrolytic capacitance must be rated for a minimum of 400 mA rms of ripple current. An additional 22-µF ceramic input capacitor is
recommended to reduce rms ripple current.
300 µF of ceramic output capacitance is required for basic operation. The minimum output capacitance requirement increases when
TurboTrans™ (TT) technology is utilized. Additionally, low ESR capacitors are required for proper operation. See related Application
Information for more guidance.
This is the calculated maximum disregarding TurboTrans™ technology.
Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): PTH04T260W PTH04T261W
Submit Documentation Feedback
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PTH04T260W, PTH04T261W
SLTS273E – SEPTEMBER 2006 – REVISED JULY 2009.................................................................................................................................................. www.ti.com
PTH04T260/261W
(TOP VIEW)
1
10
9
2
8
7
6
5
3
4
TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
DESCRIPTION
VI
2
The positive input voltage power node to the module, which is referenced to common GND.
VO
4
The regulated positive power output with respect to the GND.
GND
3
This is the common ground connection for the VI and VO power connections. It is also the 0 Vdc reference for
the control inputs.
Inhibit and
UVLO (1)
VO Adjust
10
The Inhibit pin is an open-collector/drain, negative logic input that is referenced to GND. Applying a low level
ground signal to this input disables the module’s output and turns off the output voltage. When the Inhibit control
is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left open-circuit, the
module produces an output whenever a valid input source is applied.
This pin is also used for input undervoltage lockout (UVLO) programming. Connecting a resistor from this pin to
GND (pin 3) allows the ON threshold of the UVLO to be adjusted higher than the default value. For more
information, see the Application Information section.
7
A 0.05 W 1% resistor must be directly connected between this pin and pin 6 (– Sense), close to the module to
set the output voltage to a value higher than 0.69 V. The temperature stability of the resistor should be 100
ppm/°C (or better). The setpoint range for the output voltage is from 0.69 V to 3.6 V. If left open circuit, the
output voltage defaults to its lowest value. For further information, on output voltage adjustment see the related
application note.
The specification table gives the preferred resistor values for a number of standard output voltages.
+ Sense
5
The sense input allows the regulation circuit to compensate for voltage drop between the module and the load.
For optimal voltage accuracy, +Sense must be connected to VO, close to the load.
– Sense
6
The sense input allows the regulation circuit to compensate for voltage drop between the module and the load.
For optimal voltage accuracy, –Sense must be connected to GND (pin 3), very close to the module (within 10
cm).
9
This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes
active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage
from 0 V up to the nominal set-point voltage. Within this range the module's output voltage follows the voltage at
the Track pin on a volt-for-volt basis. When the control voltage is raised above this range, the module regulates
at its set-point voltage. The feature allows the output voltage to rise simultaneously with other modules powered
from the same input bus. If unused, this input should be connected to VI.
Track
NOTE: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage
during power up. For more information, see the related application note.
TurboTrans™
SmartSync
(1)
8
8
This input pin adjusts the transient response of the regulator. To activate the TurboTrans feature, a 1%, 0.05 W
resistor must be connected between this pin and pin 5 (+Sense) very close to the module. For a given value of
output capacitance, a reduction in peak output voltage deviation is achieved by using this feature. If unused, this
pin must be left open-circuit. The resistance requirement can be selected from the TurboTrans resistor table in
the Application Information section. External capacitance must never be connected to this pin unless the
TurboTrans resistor is a short, 0Ω.
1
This input pin sychronizes the switching frequency of the module to an external clock frequency. The SmartSync
feature can be used to sychronize the switching fequency of multiple PTH04T260/261W modules, aiding EMI
noise suppression efforts. If unused, this pin should be connected to GND (pin 3). For more information, please
review the Application Information section.
Denotes negative logic: Open = Normal operation, Ground = Function active
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Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): PTH04T260W PTH04T261W
PTH04T260W, PTH04T261W
www.ti.com.................................................................................................................................................. SLTS273E – SEPTEMBER 2006 – REVISED JULY 2009
TYPICAL CHARACTERISTICS (1) (2)
CHARACTERISTIC DATA (VI = 5 V)
EFFICIENCY
vs
OUTPUT CURRENT
0.6
24
VIN = 5 V
2.5 V
VIN = 5 V
VO − Output Voltage Ripple − VPP(mV)
3.3 V
Efficiency − %
90
80
1.8 V
1.0 V
1.2 V
1.5 V
70
VO
0.7 V
3.3 V
2.5 V
1.8 V
1.5 V
1.2 V
1.0 V
0.7 V
60
50
0
0.5
1.0
1.5
2.0
IO − Output Current − A
2.5
POWER DISSIPATION
vs
OUTPUT CURRENT
2.5 V
3.3 V
20
3.3 V
2.5 V
1.8 V
1.5 V
1.2 V
1.0 V
0.7 V
1.8 V
1,5 V
16
12
0.5
0.4
VO
3.3 V
2.5 V
1.8 V
1.2 V
1.0 V
0.7 V
VIN = 5 V
3.3 V
1.8 V
2.5 V
1.0 V
0.3
1.2 V
0.7 V
0.2
8
1.2 V
0.7 V
4
3.0
VO
PD − Power Dissipation − W
100
OUTPUT RIPPLE
vs
OUTPUT CURRENT
0
0.5
1.0 V
1.0
1.5
2.0
2.5
IO − Output Current − A
Figure 1.
3.0
Figure 2.
0.1
0
0.5
1.0
1.5
2.0
IO − Output Current − A
2.5
3.0
Figure 3.
AMBIENT TEMPERATURE
vs
OUTPUT CURRENT
90
PD − Ambient Temperature − °C
80
07
Natural
Convection
60
50
40
30
All VO
20
0
0.5
1.0
1.5
2.0
2.5
3.0
IO − Output Current − A
Figure 4.
(1)
(2)
The electrical characteristic data has been developed from actual products tested at 25C. This data is considered typical for the
converter. Applies to Figure 1, Figure 2, and Figure 3.
The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper.
Applies to Figure 4.
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TYPICAL CHARACTERISTICS (1) (2)
CHARACTERISTIC DATA (VI = 3.3 V)
EFFICIENCY
vs
OUTPUT CURRENT
14
VIN = 3.3 V
2.5 V
VO − Output Voltage Ripple − VPP(mV)
90
Efficiency − %
0.6
1.5 V
1.8 V
1.2 V
1.0 V
70
0.7 V
VO
2.5 V
1.8 V
1.5 V
1.2 V
1.0 V
0.7 V
60
2.5 V
1.8 V
1.2 V
1.0 V
0.7 V
12
1.8 V
1.2 V
10
8
0.5
1.0
1.5
2.0
IO − Output Current − A
2.5
3.0
0.4
1.8 V
0.3
1.0 V
2.5 V
1.2 V
1.0 V
2.5 V
0.7 V
0.1
4
0
0.5
VIN = 3.3 V
2.5 V
1.8 V
1.2 V
1.0 V
0.7 V
0.2
6
0.7 V
50
VO
VIN = 3.3 V
VO
80
POWER DISSIPATION
vs
OUTPUT CURRENT
PD − Power Dissipation − W
100
OUTPUT RIPPLE
vs
OUTPUT CURRENT
0
0.5
1.0
1.5
2.0
2.5
3.0
IO − Output Current − A
Figure 5.
Figure 6.
0
0.5
1.0
1.5
2.0
IO − Output Current − A
2.5
3.0
Figure 7.
AMBIENT TEMPERATURE
vs
OUTPUT CURRENT
90
PD − Ambient Temperature − °C
80
07
Natural
Convection
60
50
40
30
All VO
20
0
0.5
1.0
1.5
2.0
2.5
3.0
IO − Output Current − A
Figure 8.
(1)
(2)
10
The electrical characteristic data has been developed from actual products tested at 25C. This data is considered typical for the
converter. Applies to Figure 5, Figure 6, and Figure 7.
The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper.
Applies to Figure 8.
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APPLICATION INFORMATION
ADJUSTING THE OUTPUT VOLTAGE
The VO Adjust control (pin 7) sets the output voltage of the PTH04T260/261W. The adjustment range of the
PTH04T260/261W is 0.69V to 3.6V. The adjustment method requires the addition of a single external resistor,
RSET, that must be connected directly between the VO Adjust and the –Sense pins. Table 1 gives the standard
value of the external resistor for a number of standard voltages, along with the actual output voltage that this
resistance value provides.
For other output voltages, the value of the required resistor can either be calculated using the following formula,
or simply selected from the range of values given in Table 2. Figure 9 shows the placement of the required
resistor.
0.69
R SET + 10 kW
* 1.43 kW
V O * 0.69
(1)
Table 1. Preferred Values of RSET for Standard Output Voltages
VO (Standard) (V)
(1)
RSET (Standard Value) (kΩ)
VO (Actual) (V)
3.3
(1)
1.21
3.304
2.5
(1)
2.37
2.506
1.8
(1)
4.75
1.807
1.5
(1)
6.98
1.510
1.2
12.1
1.200
1.0
20.5
1.004
0.7
681
0.700
The minimum input voltage is 2.2 V or (VO + 0.5) V, whichever is greater.
+Sense
PTH04T260/261W
5
+Sense
4
VO
VO
−Sense
GND
3
6
VoAdj
7
RSET
1%
0.05 W
−Sense
GND
UDG−06043
(1)
RSET: Use a 0.05 W resistor with a tolerance of 1% and temperature stability of 100 ppm/°C (or better). Connect the
resistor directly between pins 7 and 6, as close to the regulator as possible, using dedicated PCB traces.
(2)
Never connect capacitors from VO Adjust to either GND, VO, or +Sense. Any capacitance added to the VO Adjust pin
affects the stability of the regulator.
Figure 9. VO Adjust Resistor Placement
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Table 2. Output Voltage Set-Point Resistor Values (Standard Values)
12
VO Required (V)
RSET (kΩ)
VO Required (V)
RSET (kΩ)
0.70
681
1.80
4.75
0.75
113
1.85
4.53
0.80
61.9
1.90
4.22
0.85
41.2
1.95
4.02
0.90
31.6
2.00
3.83
0.95
24.9
2.10
3.40
1.00
20.5
2.20
3.09
1.05
17.8
2.30
2.87
1.10
15.4
2.40
2.61
1.15
13.7
2.50
2.37
1.20
12.1
2.60
2.15
1.25
10.7
2.70
2.00
1.30
9.88
2.80
1.82
1.35
9.09
2.90
1.69
1.40
8.25
3.00
1.54
1.45
7.68
3.10
1.43
1.50
6.98
3.20
1.33
1.55
6.49
3.30
1.21
1.60
6.04
3.40
1.13
1.65
5.76
3.50
1.02
1.70
5.36
3.60
0.931
1.75
5.11
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CAPACITOR RECOMMENDATIONS FOR THE PTH04T260/261W POWER MODULE
Capacitor Technologies
Electrolytic Capacitors
When using electrolytic capacitors, high-quality, computer-grade electrolytic capacitors are recommended.
Aluminum electrolytic capacitors provide adequate decoupling over the frequency range of 2 kHz to 150 kHz,
and are suitable when ambient temperatures are above -20°C. For operation below -20°C, tantalum,
ceramic, or OS-CON type capacitors are required.
Ceramic Capacitors
The performance of aluminum electrolytic capacitors is less effective above 150 kHz. Multilayer ceramic
capacitors have a low ESR and a resonant frequency higher than the bandwidth of the regulator. They can
be used to reduce the reflected ripple current at the input as well as improve the transient response of the
output.
Tantalum, Polymer-Tantalum Capacitors
Tantalum type capacitors may only used on the output bus, and are recommended for applications where the
ambient operating temperature is less than 0°C. The AVX TPS series and Kemet capacitor series are
suggested over many other tantalum types due to their lower ESR, higher rated surge, power dissipation,
and ripple current capability. Tantalum capacitors that have no stated ESR or surge current rating are not
recommended for power applications.
Input Capacitor (Required)
The PTH04T261W requires a minimum input capacitance of 300µF of ceramic type.
The PTH04T260W requires a minimum input capacitance of 330µF of electrolytic type. The ripple current rating
of the electrolytic capacitor must be at least 400mArms. An optional 22-µF X5R/X7R ceramic capacitor is
recommended to reduce the RMS ripple current.
Input Capacitor Information
The size and value of the input capacitor is determined by the converter’s transient performance capability. This
minimum value assumes that the converter is supplied with a responsive, low-inductance input source. This
source should have ample capacitive decoupling, and be distributed to the converter via PCB power and ground
planes.
Ceramic capacitors should be located as close as possible to the module's input pins, within 0.5 inch (1,3 cm).
Adding ceramic capacitance is necessary to reduce the high-frequency ripple voltage at the module's input. This
reduces the magnitude of the ripple current through the electroytic capacitor, as well as the amount of ripple
current reflected back to the input source. Additional ceramic capacitors can be added to further reduce the RMS
ripple current requirement for the electrolytic capacitor.
Increasing the minimum input capacitance to 680-µF is recommended for high-performance applications, or
wherever the input source performance is degraded.
The main considerations when selecting input capacitors are the RMS ripple current rating, temperature stability,
and maintaining less than 100 mΩ of equivalent series resistance (ESR).
Regular tantalum capacitors are not recommended for the input bus. These capacitors require a recommended
minimum voltage rating of 2 × (maximum dc voltage + ac ripple). This is standard practice to ensure reliability.
No tantalum capacitors were found to have voltage ratings sufficient to meet this requirement.
When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these
applications, Os-Con, poly-aluminum, and polymer-tantalum types should be considered.
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Output Capacitor (Required)
The PTH04T261W requires a minimum output capacitance of 300µF of ceramic type.
The PTH04T260W requires a minimum 100µF of ceramic and 150 F of non-ceramic output capacitance.
Additional non-ceramic, low-ESR capacitance is recommended for improved performance.
The required capacitance above the minimum is determined by actual transient deviation requirements. See the
TurboTrans Technology application section within this document for specific capacitance selection.
Output Capacitor Information
When selecting output capacitors, the main considerations are capacitor type, temperature stability, and ESR.
When using the TurboTrans feature, the capacitance X ESR product should also be considered (see the
following section).
Ceramic output capacitors added for high-frequency bypassing should be located as close as possible to the
load to be effective. Ceramic capacitor values below 10µF should not be included when calculating the total
output capacitance value.
When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these
applications, Os-Con, poly-aluminum, and polymer-tantalum types should be considered.
TurboTrans Output Capacitance
TurboTrans allows the designer to optimize the output capacitance according to the system transient design
requirement. High quality, ultra-low ESR capacitors are required to maximize TurboTrans effectiveness. When
using TurboTrans, the capacitor's capacitance (µF) × ESR (mΩ) product determines its capacitor type; Type A,
B, or C. These three types are defined as follows:
Type A = (100 ≤ capacitance × ESR ≤ 1000) (e.g. ceramic)
Type B = (1000 < capacitance × ESR ≤ 5000) (e.g. polymer-tantalum)
Type C = (5000 < capacitance × ESR ≤ 10,000) (e.g. Os-Con)
When using more than one type of output capacitor, select the capacitor type that makes up the majority of the
total output capacitance. When calculating the C × ESR product, use the maximum ESR value from the capacitor
manufacturer's data sheet.
The PTH04T261W should be used when only Type A (ceramic) capacitors are used on the output.
Working Examples:
A capacitor with a capacitance of 330µF and an ESR of 5mΩ, has a C×ESR product of 1650µFxmΩ (330µF ×
5mΩ). This is a Type B capacitor.
A capacitor with a capacitance of 1000µF and an ESR of 8mΩ, has a C×ESR product of 8000µFxmΩ (1000µF ×
8mΩ). This is a Type C capacitor.
See the TurboTrans Technology application section within this document for specific capacitance selection.
Table 3 includes a preferred list of capacitors by type and vendor. See the Output Bus / TurboTrans column.
Non-TurboTrans Output Capacitance
If the TurboTrans feature is not used, minimum ESR and maximum capacitor limits must be followed. System
stability may be effected and increased output capacitance may be required without TurboTrans.
When using the PTH04T260W without the TurboTrans feature, observe the minimum ESR of the entire output
capacitor bank. The minimum ESR limit of the output capacitor bank is 7mΩ. A list of preferred low-ESR type
capacitors, are identified in Table 3.
When using the PTH04T261W without the TurboTrans feature, the maximum amount of capacitance is 3000µF
of ceramic type. Large amounts of capacitance may reduce system stability.
Using the TurboTrans feature improves system stability, improves transient response, and reduces the
amount of output capacitance required to meet system transient design requirements.
14
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Designing for Fast Load Transients
The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of
2.5A/µs. The typical voltage deviation for this load transient is given in the Electrical Characteristics table using
the minimum required value of output capacitance. As the di/dt of a transient is increased, the response of a
converter’s regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent
limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability.
If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with
additional low ESR ceramic capacitor decoupling. Generally, with load steps greater than 100A/µs, adding
multiple 10-µF ceramic capacitors plus 10×1µF, and numerous high frequency ceramics (≤0.1µF) is all that is
required to soften the transient higher frequency edges. The PCB location of these capacitors in relation to the
load is critical. DSP, FPGA and ASIC vendors identify types, location and amount of capacitance required for
optimum performance. Low impedance buses, unbroken PCB copper planes, and components located as close
as possible to the high frequency devices are essential for optimizing transient performance.
Table 3. Input/Output Capacitors (1)
Capacitor Characteristics
Capacitor Vendor,
Type Series (Style)
Working
Value
Voltage
(µF)
(V)
Quantity
Output Bus
(2)
Max
ESR
at 100
kHz
(mΩ)
Max
Ripple
Current
at 85°C
(Irms)
(mA)
Physical
Size (mm)
Input
Bus
No
TurboTrans
TurboTrans
Capacitor
Type (3)
Vendor Part No.
Panasonic
SP series (UE)
6.3
220
15
3000
7,3×4,3
2
1≤ 2
B ≥ 1 (3)
FC (Radial)
6.3
390
117
555
8 X 11,5
1
≥1
N/R (4)
EEUFC0J391
FK (SMD)
6.3
470
160
600
10 X 10,2
1
≥1
N/R (4)
EEVFK0J471P
PTB, Poly-Tantalum(SMD)
6.3
330
25
2600
7,3×4,3×2,8
1
1≤3
C ≥ 2 (3)
LXZ, Aluminum (Radial)
6.3
680
120
555
8 X 12
1
1
N/R (4)
PS, Poly-Alum (Radial)
6.3
390
12
4770
8 X 11,5
1
≤1
B ≥ 2 (3)
PT Poly-Tantalum (SMD)
6.3
330
40
3000
7,3×4,3
1
1
N/R (4)
MVY, Aluminum SMD)
10
680
150
670
10 × 10
1
1
B ≥ 2 (3)
MVY10VC681MJ10TP
10 V
330
14
4420
8 × 12,2
1
1≤2
B ≥ 1 (3)
PXA10VC331MH12
WG (SMD)
10
470
150
670
10 × 10
1
1
N/R (4)
UWG1A471MNR1GS
HD (Radial)
10
470
72
760
8 X 11,5
1
1
N/R (4)
UHD1A471MPR
Panasonic, Poly-Aluminum
SE Series (SMD)
2.0
560
5
4000
7,3×4,3×4,2
N/R (5)
N/R (6)
B ≥ 2 (3)
EEFUE0J221R
United Chemi-Con
PXA, Poly-Alum (Radial)
6PTB337MD6TER
LXZ6.3VB681M8X12LL
6PS390MH11
6PT337MD8TER
Nichicon, Aluminum
(1)
(2)
(3)
(4)
(5)
(6)
(7)
EEFSE0J561R(VO≤ 1.6V) (7)
Capacitor Supplier Verification
Please verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because of
limited availability or obsolete products.
RoHS, Lead-free and Material Details
See the capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing process requirements.
Component designators or part number deviations can occur when material composition or soldering requirements are updated.
Additional output capacitance must include the required 100 µF of ceramic type.
Required capacitors with TurboTrans. See the TurboTrans Application information for Capacitor Selection
Capacitor Types:
a. Type A = (100 < capacitance × ESR ≤ 1000)
b. Type B = (1,000 < capacitance × ESR ≤ 5,000)
c. Type C = (5,000 < capacitance × ESR ≤ 10,000)
Aluminum Electrolytic capacitor not recommended for the TurboTrans due to higher ESR × capacitance products. Aluminum and higher
ESR capacitors can be used in conjunction with lower ESR capacitance.
N/R – Not recommended. The voltage rating does not meet the minimum operating limits.
N/R – Not recommended. The ESR value of this capacitor is below the required minimum when not using TurboTrans.
The voltage rating of this capacitor only allows it to be used for output voltage that is equal to or less than 80% of the working voltage.
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Table 3. Input/Output Capacitors (continued)
Capacitor Characteristics
Capacitor Vendor,
Type Series (Style)
Working
Value
Voltage
(µF)
(V)
Quantity
Max
ESR
at 100
kHz
(mΩ)
Max
Ripple
Current
at 85°C
(Irms)
(mA)
Output Bus
Physical
Size (mm)
(2)
Input
Bus
No
TurboTrans
TurboTrans
Capacitor
Type (3)
Vendor Part No.
Sanyo
TPE, POSCAP (SMD)
10
330
25
3300
7,3×4,3
1
1 ≤3
C ≥ 1 (8)
10TPE330MF
TPE, POSCAP (SMD)
2.5
470
7
4400
7,3×4,3
N/R (9)
≤1
B ≥ 2 (8)
2R5TPE470M7(VO≤ 1.8V) (10)
TPD, POSCAP (SMD)
2.5
1000
5
6100
7,3×4,3
N/R (9)
N/R (11)
B ≥ 1 (8)
2R5TPD1000M5(VO≤ 1.8V) (10)
C≥1
(8)
SEP, OS-CON (Radial)
6.3
470
15
4210
10 × 12
1
1≤2
SVPA, OS-CON (Radial)
6.3
470
19
4130
10 × 7,9
1
1≤2
C ≥ 2 (8)
6SVPA470M
SVP, OS-CON (SMD)
10
330
25
3700
10 × 7,9
1
1 ≤3
C ≥ 1 (8)
10SVP330MX
TPM Multianode
10
330
23
3000
7,3×4,3×4,1
1
1≤3
C ≥ 2 (8)
TPME337M010R0035
TPS Series III (SMD)
10
330
40
1830
7,3×4,3×4,1
1
1≤6
N/R (12)
TPSE337M010R0040
TPS Series III (SMD)
4
1000
25
2400
7,3×6,1×3.5
N/R (9)
1≤5
N/R (12)
TPSV108K004R0035 (VO≤ 2.1V) (13)
T520 (SMD)
10
330
25
2600
7,3×4,3×4,1
1
1≤3
C ≥ 2 (8)
T520X337M010ASE025
T530 (SMD)
6.3
330
15
3800
7,3×4,3×4,1
1
1≤2
B ≥ 2 (8)
T530X337M010ASE015 (10)
6SEP470M
AVX, Tantalum
Kemet, Poly-Tantalum
T530 (SMD)
T530 (SMD)
4
680
5
7300
7,3×4,3×4,1
N/R
(9)
(9)
N/R
(11)
N/R
(11)
B≥1
(8)
T530X687M004ASE005 (VO≤ 3.2V) (10)
B≥1
(8)
T530X108M2R5ASE005 (VO≤ 2.0V) (10)
2.5
1000
5
7300
7,3×4,3×4,1
N/R
597D, Tantalum (SMD)
10
330
35
2500
7,3×5,7×4,1
1
1≤5
N/R (12)
597D337X010E2T
94SP, OS-CON (Radial)
6.3
390
16
3810
8 X 10,5
1
1 ≤2
C ≥ 2 (8)
94SP397X06R3EBP
94SVP OS-CON(SMD)
6.3
470
17
3960
8 × 12
1
1≤2
C ≥ 1 (8)
94SVP477X06F12
Kemet, Ceramic X5R
6.3
100
2
–
3225
1
1 (14)
A (8)
C1210C107M9PAC
(SMD)
6.3
47
2
Murata, Ceramic X5R
6.3
100
2
(SMD)
6.3
47
Vishay-Sprague
–
3225
1
≥2
(14)
A (8)
C1210C476K9PAC
1
≥ 1 (14)
A (8)
GRM32ER60J107M
1
≥2
(14)
A (8)
GRM32ER60J476ME20L
(14)
(8)
16
22
1
≥5
16
10
1
≥ 1 (14)
A (8)
GRM32DR61C106K
TDK, Ceramic X5R
6.3
100
1
≥ 1 (14)
A (8)
C3225X5R0J107MT
(SMD)
6.3
47
1
≥ 1 (14)
A (8)
C3225X5R0J476MT
16
10
1
≥ 1 (14)
A (8)
C3225X5R1C106MT0
16
22
1
≥ 1 (14)
A (8)
C3225X5R1C226MT
(8)
(9)
(10)
(11)
(12)
(13)
(14)
16
2
–
3225
A
GRM32ER61CE226KE20L
Required capacitors with TurboTrans. See the TurboTrans Application information for Capacitor Selection
Capacitor Types:
a. Type A = (100 < capacitance × ESR ≤ 1000)
b. Type B = (1,000 < capacitance × ESR ≤ 5,000)
c. Type C = (5,000 < capacitance × ESR ≤ 10,000)
N/R – Not recommended. The voltage rating does not meet the minimum operating limits.
The voltage rating of this capacitor only allows it to be used for output voltage that is equal to or less than 80% of the working voltage.
N/R – Not recommended. The ESR value of this capacitor is below the required minimum when not using TurboTrans.
Aluminum Electrolytic capacitor not recommended for the TurboTrans due to higher ESR × capacitance products. Aluminum and higher
ESR capacitors can be used in conjunction with lower ESR capacitance.
The voltage rating of this capacitor only allows it to be used for output voltage that is equal to or less than 50% of the working voltage.
Any combination of ceramic capacitor values is limited as listed in the Electrical Characteristics table.
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TURBOTRANS
TurboTrans™ Technology
TurboTrans technology is a feature introduced in the T2 generation of the PTH/PTV family of power modules.
TurboTrans optimizes the transient response of the regulator with added external capacitance using a single
external resistor. Benefits of this technology include reduced output capacitance, minimized output voltage
deviation following a load transient, and enhanced stability when using ultra-low ESR output capacitors. The
amount of output capacitance required to meet a target output voltage deviation is reduced with TurboTrans
activated. Likewise, for a given amount of output capacitance, with TurboTrans engaged, the amplitude of the
voltage deviation following a load transient is reduced. Applications requiring tight transient voltage tolerances
and minimized capacitor footprint area benefits greatly from this technology.
TurboTrans™ Selection
Using TurboTrans requires connecting a resistor, RTT, between the +Sense pin (pin5) and the TurboTrans pin
(pin8). The value of the resistor directly corresponds to the amount of output capacitance required. All T2
products require a minimum value of output capacitance whether or not TurboTrans is used. For the
PTH04T260W, the minimum required capacitance is 200µF ceramic. When using TurboTrans, capacitors with a
capacitance × ESR product below 10,000 µF×mΩ are required. (Multiply the capacitance (in µF) by the ESR (in
mΩ) to determine the capacitance × ESR product.) See the Capacitor Selection section of the datasheet for a
variety of capacitors that meet this criteria.
Figure 10 shows the amount of output capacitance required to meet a desired transient voltage deviation with
and without TurboTrans for several capacitor types; TypeA (e.g. ceramic), TypeB (e.g. polymer-tantalum), and
TypeC (e.g. OS-CON). To calculate the proper value of RTT, first determine the required transient voltage
deviation limits and magnitude of the transient load step. Next, determine what type of output capacitors is used.
(If more than one type of output capacitor is used, select the capacitor type that makes up the majority of the
total output capacitance). Knowing this information, use the chart in Figure 10 that corresponds to the capacitor
type selected. To use the chart, begin by dividing the maximum voltage deviation limit (in mV) by the magnitude
of the load step (in Amps). This gives a mV/A value. Find this value on the Y-axis of the appropriate chart. Read
across the graph to the 'With TurboTrans' plot. From this point, read down to the X-axis which lists the minimum
required capacitance, CO, to meet that transient voltage deviation. The required RTT resistor value can then be
calculated using the equation or selected from the TurboTrans table. The TurboTrans tables include both the
required output capacitance and the corresponding RTT values to meet several values of transient voltage
deviation for 25%(0.75A), 50%(1.5A), and 75%(2.25A) output load steps.
The chart can also be used to determine the achievable transient voltage deviation for a given amount of output
capacitance. Selecting the amount of output capacitance along the X-axis, reading up to the 'With TurboTrans'
curve, and then over to the Y-axis, gives the transient voltage deviation limit for that value of output capacitance.
The required RTT resistor value can be calculated using the equation or selected from the TurboTrans table.
As an example, consider a 5-V application requiring a 30mV deviation during a 1.5-A, 50% load transient. A
majority of 330µF, 10mΩ ouput capacitors are used. Use the Type B capacitor chart, Figure 11. Dividing 30mV
by 1.5A gives 20mV/A transient voltage deviation per amp of transient load step. Select 20mV/A on the Y-axis
and read across to the 'With TurboTrans' plot. Following this point down to the X-axis gives us a minimum
required output capacitance of approximately 570µF. The required RTT resistor value for 570µF can then be
calculated or selected from Table 5. The required RTT resistor is approximately 16.9kΩ.
To see the benefit of TurboTrans, follow the 20mV/A marking across to the 'Without TurboTrans' plot. Following
that point down shows that you would need a minimum of 1200µF of output capacitance to meet the same
transient deviation limit. This is the benefit of TurboTrans. A typical TurboTrans schematic is shown in Figure 16.
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PTH04T261W - Type A Ceramic Capacitors
5-V Input
40
30
30
Without TurboTrans
10
9
8
Without TurboTrans
20
Transient − mV/A
20
With TurboTrans
7
10
9
8
With TurboTrans
7
6
PTH04T261 Type A
Ceramic Capacitors
5000
4000
2000
200
C − Capacitance − µF
3000
4
5000
4000
3000
2000
400
500
600
700
800
900
1000
300
4
200
PTH04T261 Type A
Ceramic Capacitors
5
400
5
500
600
700
800
900
1000
6
300
Transient − mV/A
3.3-V Input
40
C − Capacitance − µF
Figure 10. Capacitor Type A, 100 < C(µF) x ESR(mΩ) ≤
1000
(e.g. Ceramic)
Figure 11. Capacitor Type A, 100 < C(µF) x ESR(mΩ) ≤
1000
(e.g. Ceramic)
Table 4. Type A TurboTrans CO Values and Required RTT Selection Table
Transient Voltage Deviation (mV)
5-V Input
3.3-V input
25% load step
(0.75 A)
50% load step
(1.5 A)
75% load step
(2.25 A)
CO
Minimum
Required Output
Capacitance (µF)
RTT
Required
TurboTrans
Resistor (kΩ)
CO
Minimum
Required Output
Capacitance (µF)
RTT
Required
TurboTrans
Resistor (kΩ)
25
50
75
300
open
300
open
20
40
60
300
open
300
open
15
30
45
400
93.1
340
226
10
20
30
700
15.8
610
23.2
8
16
24
960
6.49
840
9.76
6
12
18
1500
short
1300
short
RTT Resistor Selection
The TurboTrans resistor value, RTT can be determined from the TurboTrans programming equation:
R TT + 40
1 * ǒCO ń1500Ǔ
ǒCO ń300Ǔ * 1
kW
(2)
Where CO is the total output capacitance in µF. CO values greater than or equal to 1500 µF require RTT to be
a short, 0 Ω.
To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The
value of RTT must be calculated using the minimum required output capacitance determined from the
capacitor transient response charts above.
18
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PTH04T260W Type B Capacitors
5-V Input
3.3-V Input
40
40
30
30
Without TurboTrans
20
5000
4000
2000
3000
With TurboTrans
200
5000
2000
4000
4
3000
4
400
5
500
600
700
800
900
1000
5
300
6
200
6
500
600
700
800
900
1000
With TurboTrans
10
9
8
7
400
10
9
8
7
300
Transient − mV/A
20
Transient − mV/A
Without TurboTrans
C − Capacitance − µF
C − Capacitance − µF
Figure 12. Capacitor Type B, 1000 < C(µF) x ESR(mΩ) ≤
5000
(e.g. Polymer-Tantalum)
Figure 13. Capacitor Type B, 1000 < C(µF) x ESR(mΩ) ≤
5000
(e.g. Polymer-Tantalum)
Table 5. Type B TurboTrans CO Values and Required RTT Selection Table
Transient Voltage Deviation (mV)
5-V Input
3.3-V Input
25% load step
(0.75 A)
50% load step
(1.5 A)
75% load step
(2.25 A)
CO
Minimum
Required Output
Capacitance (µF)
RTT
Required
TurboTrans
Resistor (kΩ)
CO
Minimum
Required Output
Capacitance (µF)
RTT
Required
TurboTrans
Resistor (kΩ)
30
60
90
250
open
250
open
25
50
75
300
165
300
165
20
40
60
400
47.5
400
47.5
15
30
45
570
16.9
570
16.9
10
20
30
940
3.57
960
3.32
8
16
24
1250
short
1280
short
6
12
18
3200
short
3200
short
RTT Resistor Selection
The TurboTrans resistor value, RTT can be determined from the TurboTrans programming equation:
R TT + 40
1 * ǒCO ń1250Ǔ
ǒCO ń250Ǔ * 1
kW
(3)
Where CO is the total output capacitance in µF. CO values greater than or equal to 1250 µF require RTT to be
a short, 0 Ω.
To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The
value of RTT must be calculated using the minimum required output capacitance determined from the
capacitor transient response charts above.
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PTH04T260W Type C Capacitors
5-V Input
3.3-V Input
40
40
30
30
Without TurboTrans
Without TurboTrans
Figure 14. Capacitor Type C, 5000 < C(µF) x ESR(mΩ) ≤
10,000
(e.g. OS-CON)
5000
4000
2000
C − Capacitance − µF
C − Capacitance − µF
3000
With TurboTrans
200
2000
5000
4
4000
4
3000
5
400
5
500
600
700
800
900
1000
6
300
6
400
With TurboTrans
10
9
8
7
500
600
700
800
900
1000
10
9
8
7
300
Transient − mV/A
20
200
Transient − mV/A
20
Figure 15. Capacitor Type C, 5000 < C(µF) x ESR(mΩ) ≤
10,000
(e.g. OS-CON)
Table 6. Type C TurboTrans CO Values and Required RTT Selection Table
Transient Voltage Deviation (mV)
5-V Input
3.3 V Input
25% load step
(0.75 A)
50% load step
(1.5 A)
75% load step
(2.25 A)
CO
Minimum
Required Output
Capacitance (µF)
RTT
Required
TurboTrans
Resistor (kΩ)
CO
Minimum
Required Output
Capacitance (µF)
RTT
Required
TurboTrans
Resistor (kΩ)
30
60
90
250
open
250
open
25
50
75
270
487
250
open
20
40
60
360
66.5
350
76.8
15
30
45
520
21.5
520
21.5
10
20
30
890
4.53
920
3.92
8
16
24
1200
0.549
1300
short
6
12
18
3050
short
3700
short
RTT Resistor Selection
The TurboTrans resistor value, RTT can be determined from the TurboTrans programming equation:
R TT + 40
1 * ǒCO ń1250Ǔ
ǒCO ń250Ǔ * 1
kW
(4)
Where CO is the total output capacitance in µF. CO values greater than or equal to 1250 µF require RTT to be
a short, 0 Ω.
To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The
value of RTT must be calculated using the minimum required output capacitance determined from the
capacitor transient response charts above.
20
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TurboTransE
AutoTrack
VI
SYNC
RTT
0 kΩ
(Note A)
TT
+Sense
VI
VO
VO
PTH04T260W
INH/UVLO
−Sense
GND
VoAdj
3
7
+
CO1
200 µF
Ceramic
RSET
1%
0.05 W
CI
330 µF
(Required)
+Sense
L
O
A
D
CO2
1320 µF
Type B
GND
GND
UDG−06047
A.
The value of RTT must be calculated using the total value of output capacitance.
Figure 16. Typical TurboTrans™ Schematic
PTH04T260
CO = 1520 µF
Without TurboTrans
20 mV/div
With TurboTrans
20 mV/div
50% Load Step
2.5 A/µs
T − Time − 200 µs/div
Figure 17. Typical TurboTrans Waveforms
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UNDERVOLTAGE LOCKOUT (UVLO)
The PTH04T260/261W power modules incorporate an input undervoltage lockout (UVLO). The UVLO feature
prevents the operation of the module until there is sufficient input voltage to produce a valid output voltage. This
enables the module to provide a clean, monotonic power-up for the load circuit, and also limits the magnitude of
current drawn from the regulator’s input source during the power-up sequence.
The UVLO characteristic is defined by the ON threshold (VTHD) voltage. Below the ON threshold, the Inhibit
control is overridden, and the module does not produce an output. The hysteresis voltage, which is the difference
between the ON and OFF threshold voltages, is set at 500 mV. The hysteresis prevents start-up oscillations,
which can occur if the input voltage droops slightly when the module begins drawing current from the input
source.
The UVLO feature of the PTH04T260/261W module allows for limited adjustment of the ON threshold voltage.
The adjustment is made via the Inhbit/UVLO Prog control pin (pin 10) using a single resistor (see figure below).
When pin 10 is left open circuit, the ON threshold voltage is internally set to its default value, which is 1.95 volts.
The ON threshold might need to be raised if the module is powered from a tightly regulated 5-V bus. Adjusting
the threshold prevents the module from operating if the input bus fails to completely rise to its specified
regulation voltage.
Equation 5 determines the value of RUVLO required to adjust VTHD to a new value. The default value is 1.95 V,
and it may only be adjusted to a higher value.
R UVLO +
68.54 * V THD
kW
V THD * 2.07
(5)
Table 7 lists the standard resistor values for RUVLO for different values of the ON-threshold (VTHD) voltage.
Table 7. Standard RUVLO Values for Various VTHD Values
VTHD (V)
2.5
3.0
3.5
4.0
4.5
RUVLO (kΩ)
154
71.5
53.6
33.2
26.7
PTH04T260W
VI
2
10
+
CI
VI
Inhibit/
UVLO
GND
3
RUVLO
GND
UDG−06059
Figure 18. Undervoltage Lockout
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Soft-Start Power Up
The Auto-Track feature allows the power-up of multiple PTH/PTV modules to be directly controlled from the
Track pin. However in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track
pin should be directly connected to the input voltage, VI (see Figure 19).
9
VI
(2 V/div)
Track
PTH04T260/261W
VI
2
VI
+
CI
GND
VO
(1 V/div)
3
GND
UDG−06044
II
(1 A/div)
T − Time − 4 ms/div
Figure 19. Defeating the Auto-Track Function
Figure 20. Power-Up Waveform
When the Track pin is connected to the input voltage the Auto-Track function is permanently disengaged. This
allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is
under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate. From the
moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically 2ms–10ms)
before allowing the output voltage to rise. The output then progressively rises to the module’s setpoint voltage.
Figure 20 shows the soft-start power-up characteristic of the PTH04T260/261W operating from a 5-V input bus
and configured for a 1.8-V output. The waveforms were measured with a 3-A constant current load and the
Auto-Track feature disabled. The initial rise in input current when the input voltage first starts to rise is the charge
current drawn by the input capacitors. Power-up is complete within 20 ms.
Remote Sense
Differential remote sense improves the load regulation performance of the module by allowing it to compensate
for any IR voltage drop between its output and the load in either the positive or return path. An IR drop is caused
by the output current flowing through the small amount of pin and trace resistance. Connecting the +Sense (pin
5) and –Sense (pin 6) pins to the respective positive and ground reference of the load terminals improves the
load regulation of the output voltage at the connection points.
With the sense pins connected at the load, the difference between the voltage measured directly between the VO
and GND pins, and that measured at the Sense pins, is the amount of IR drop being compensated by the
regulator. This should be limited to a maximum of 300mV.
If the remote sense feature is not used at the load, connect the +Sense pin to VO (pin4) and connect the –Sense
pin to the module GND (pin 3).
The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency
dependent components that may be placed in series with the converter output. Examples include OR-ing
diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense
connection they are effectively placed inside the regulation control loop, which can adversely affect the
stability of the regulator.
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Output On/Off Inhibit
For applications requiring output voltage on/off control, the PTH04T260/261W incorporates an output Inhibit
control pin. The inhibit feature can be used wherever there is a requirement for the output voltage from the
regulator to be turned off.
The power modules function normally when the Inhibit pin is left open-circuit, providing a regulated output
whenever a valid source voltage is connected to VI with respect to GND.
Figure 21 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit input
has its own internal pull-up. An external pull-up should never be connected to the inhibit pin. The input is not
compatible with TTL logic devices. An open-collector (or open-drain) discrete transistor is recommended for
control.
VI
2
10
+
CI
PTH04T260/261W
VO
(1 V/div)
VI
Inhibit/
UVLO
1 = Inhibit
II
(1 A/div)
GND
3
Q1
BSS138
GND
UDG−06045
VINH
(2 V/div)
T − Time − 10 ms/div
Figure 21. On/Off Inhibit Control Circuit
Figure 22. Power-Up Response from Inhibit Control
Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is then
turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within 40
ms. Figure 22 shows the typical rise in both the output voltage and input current, following the turn-off of Q1. The
turn off of Q1 corresponds to the rise in the waveform, VINH. The waveforms were measured with a 3-A constant
current load.
Overcurrent Protection
For protection against load faults, all modules incorporate output overcurrent protection. Applying a load that
exceeds the regulator's overcurrent threshold causes the regulated output to shut down. Following shutdown, a
module periodically attempts to recover by initiating a soft-start power-up. This is described as a hiccup mode of
operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is
removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is
removed, the module automatically recovers and returns to normal operation.
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Overtemperature Protection (OTP)
A thermal shutdown mechanism protects the module’s internal circuitry against excessively high temperatures. A
rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the
internal temperature exceeds the OTP threshold, the module’s Inhibit control is internally pulled low. This turns
the output off. The output voltage drops as the external output capacitors are discharged by the load circuit. The
recovery is automatic, and begins with a soft-start power up. It occurs when the sensed temperature decreases
by about 10°C below the trip point.
The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator.
Operation at or close to the thermal shutdown temperature is not recommended and reduces the long-term
reliability of the module. Always operate the regulator within the specified safe operating area (SOA) limits for
the worst-case conditions of ambient temperature and airflow.
Smart Sync
Smart Sync is a feature that allows multiple power modules to be synchronized to a common frequency. Driving
the Smart Sync pins with an external oscillator set to the desired frequency, synchronizes all connected modules
to the selected frequency. The synchronization frequency can be higher or lower than the nominal switching
frequency of the modules within the range of 240 kHz to 400 kHz (see Electrical Specifications table for
frequency limits). Synchronizing modules powered from the same bus eliminates beat frequencies reflected back
to the input supply, and also reduces EMI filtering requirements. These are the benefits of Smart Sync. Power
modules can also be synchronized out of phase to minimize source current loading and minimize input
capacitance requirements. Figure 23 shows a standard circuit with two modules syncronized 180° out of phase
using a D flip-flop.
0°
Track
VI =5 V
TT
SYNC
Vi
+Sense
VO1
PTH04T260W
Vo
Inhibit/
UVLO
SN74LVC2G74
+
VCC
CI1
−Sense
+
GND
VoAdj
CO1
PRE
CLR
RSET1
fCLK = 2 x fMODULE
Q
CLK
180°
Q
D
GND
Track
Sync
TT
Vi
+Sense
VO2
Vo
PTH04T240W
Inhibit/
UVLO
+
CI2
GND
−Sense
+
VoAdj
CO2
RSET2
UDG−06054
Figure 23. Typical SmartSync Circuit
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Auto-Track™ Function
The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track
was designed to simplify the amount of circuitry required to make the output voltage from each module power up
and power down in sequence. The sequencing of two or more supply voltages during power up is a common
requirement for complex mixed-signal applications that use dual-voltage VLSI ICs such as the TMS320™ DSP
family, microprocessors, and ASICs.
How Auto-Track™ Works
Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin (1).
This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is
raised above the set-point voltage, the module output remains at its set-point (2). As an example, if the Track pin
of a 2.5-V regulator is at 1 V, the regulated output is 1 V. If the voltage at the Track pin rises to 3 V, the regulated
output does not go higher than 2.5 V.
When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a
volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow
a common signal during power up and power down. The control signal can be an externally generated master
ramp waveform, or the output voltage from another power supply circuit (3). For convenience, the Track input
incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising
waveform at power up.
Typical Application
The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track
compliant modules. Connecting the Track inputs of two or more modules forces their track input to follow the
same collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a common
Track control signal. This can be an open-collector (or open-drain) device, such as a power-up reset voltage
supervisor IC. See U3 in Figure 24.
To coordinate a power-up sequence, the Track control must first be pulled to ground potential. This should be
done at or before input power is applied to the modules. The ground signal should be maintained for at least
20 ms after input power has been applied. This brief period gives the modules time to complete their internal
soft-start initialization (4), enabling them to produce an output voltage. A low-cost supply voltage supervisor IC,
that includes a built-in time delay, is an ideal component for automatically controlling the Track inputs at power
up.
Figure 24 shows how a TPS3808 supply voltage supervisor IC (U3) can be used to coordinate the sequenced
power up of 5-V PTH modules. The output of the TPS3808 supervisor becomes active above an input voltage of
0.8 V, enabling it to assert a ground signal to the common track control well before the input voltage has reached
the module's undervoltage lockout threshold. The ground signal is maintained until approximately 27ms after the
input voltage has risen above U3's voltage threshold, which is 4.65V. The 27-ms time period is controlled by the
capacitor C3. The value of 4700pF provides sufficient time delay for the modules to complete their internal
soft-start initialization. The output voltage of each module remains at zero until the track control voltage is
allowed to rise. When U3 removes the ground signal, the track control voltage automatically rises. This causes
the output voltage of each module to rise simultaneously with the other modules, until each reaches its
respective set-point voltage.
Figure 25 shows the output voltage waveforms after input voltage is applied to the circuit. The waveforms, VO1
and VO2, represent the output voltages from the two power modules, U1 (3.3 V) and U2 (1.8 V), respectively.
VTRK, VO1, and VO2 are shown rising together to produce the desired simultaneous power-up characteristic.
The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage
threshold, the ground signal is re-applied to the common track control. This pulls the track inputs to zero volts,
forcing the output of each module to follow, as shown in Figure 26. Power down is normally complete before the
input voltage has fallen below the modules' undervoltage lockout. This is an important constraint. Once the
modules recognize that an input voltage is no longer present, their outputs can no longer follow the voltage
applied at their track input. During a power-down sequence, the fall in the output voltage from the modules is
limited by the Auto-Track slew rate capability.
26
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Product Folder Link(s): PTH04T260W PTH04T261W
PTH04T260W, PTH04T261W
www.ti.com.................................................................................................................................................. SLTS273E – SEPTEMBER 2006 – REVISED JULY 2009
Notes on Use of Auto-Track™
1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module
regulates at its adjusted set-point voltage.
2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp
speeds of up to 1 V/ms.
3. The absolute maximum voltage that may be applied to the Track pin is the input voltage VI.
4. The module cannot follow a voltage at its track control input until it has completed its soft-start initialization.
This takes about 20 ms from the time that a valid voltage has been applied to its input. During this period, it
is recommended that the Track pin be held at ground potential.
5. The Auto-Track function is disabled by connecting the Track pin to the input voltage (VI). When Auto-Track is
disabled, the output voltage rises at a quicker and more linear rate after input power has been applied.
Auto Track
RTT
TurboTrans
VI = 5 V
Vi
+Sense
U1
PTH05T210W
VO1 = 3.3 V
Inhibit/
UVLO
6
+
3
Vo
−Sense
GND
VoAdj
5
MR
C4
0.1 µF
CO1
SENSE
CI1
RSET1
1.62 kΩ
U3
TPS3808G50
4
CT
RESET
1
GND
Auto Track
C3
4700 µF
RTT
TurboTrans
2
SmartSync
+Sense
U2
PTH04T260W
Vi
Inhibit/
UVLO
Vo
VO2 = 1.8 V
−Sense
GND
VoAdj
CO2
+
CI2
RSET2
4.75 kΩ
UDG−06042
Figure 24. Sequenced Power Up and Power Down Using Auto-Track
Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): PTH04T260W PTH04T261W
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PTH04T260W, PTH04T261W
SLTS273E – SEPTEMBER 2006 – REVISED JULY 2009.................................................................................................................................................. www.ti.com
VTRK (1 V/div)
VTRK (1 V/div)
V01 (1 V/div)
V01 (1 V/div)
V02 (1 V/div)
T − Time − 20 ms/div
Figure 25. Simultaneous Power Up With Auto-Track
Control
V02 (1 V/div)
T − Time − 200 µs/div
Figure 26. Simultaneous Power Down With Auto-Track
Control
Prebias Startup Capability
A prebias startup condition occurs as a result of an external voltage being present at the output of a power
module prior to its output becoming active. This often occurs in complex digital systems when current from
another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another
path might be via clamp diodes as part of a dual-supply power-up sequencing arrangement. A prebias can cause
problems with power modules that incorporate synchronous rectifiers. This is because under most operating
conditions, these types of modules can sink as well as source output current.
The PTH family of power modules incorporate synchronous rectifiers, but does not sink current during startup(1),
or whenever the Inhibit pin is held low. However, to ensure satisfactory operation of this function, certain
conditions must be maintained(2). Figure 27 shows an application demonstrating the prebias startup capability.
The startup waveforms are shown in Figure 28. Note that the output current (IO) is negligible until the output
voltage rises above the voltage backfed through the intrinsic diodes.
The prebias start-up feature is not compatible with Auto-Track. When the module is under Auto-Track control, it
sinks current if the output voltage is below that of a back-feeding source. To ensure a pre-bias hold-off one of
two approaches must be followed when input power is applied to the module. The Auto-Track function must
either be disabled(3), or the module’s output held off (for at least 50 ms) using the Inhibit pin. Either approach
ensures that the Track pin voltage is above the set-point voltage at start up.
1. Startup includes the short delay (approximately 10 ms) prior to the output voltage rising, followed by the rise
of the output voltage under the module’s internal soft-start control. Startup is complete when the output
voltage has risen to either the set-point voltage or the voltage at the Track pin, whichever is lowest.
2. To ensure that the regulator does not sink current when power is first applied (even with a ground signal
applied to the Inhibit control pin), the input voltage must always be greater than the output voltage throughout
the power-up and power-down sequence.
3. The Auto-Track function can be disabled at power up by immediately applying a voltage to the module’s
Track pin that is greater than its set-point voltage. This can be easily accomplished by connecting the Track
pin to VI.
28
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Product Folder Link(s): PTH04T260W PTH04T261W
PTH04T260W, PTH04T261W
www.ti.com.................................................................................................................................................. SLTS273E – SEPTEMBER 2006 – REVISED JULY 2009
Track
VI = 5 V
+Sense
PTH04T260W
VI
VO
3.3 V
VO = 2.5 V
IO
Inhibit
GND
VOAdj
−Sense
+
RSET
2.37 kΩ
CI
330 µF
CO
200 µF
VCORE
VCCIO
ASIC
UDG−06055
Figure 27. Application Circuit Demonstrating Prebias Startup
VIN (1 V/div)
VO (1 V/div)
IO (2 A/div)
t - Time = 4 ms/div
Figure 28. Prebias Startup Waveforms
Copyright © 2006–2009, Texas Instruments Incorporated
Product Folder Link(s): PTH04T260W PTH04T261W
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29
PTH04T260W, PTH04T261W
SLTS273E – SEPTEMBER 2006 – REVISED JULY 2009.................................................................................................................................................. www.ti.com
TAPE & REEL AND TRAY DRAWINGS
30
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Product Folder Link(s): PTH04T260W PTH04T261W
PACKAGE OPTION ADDENDUM
www.ti.com
26-Aug-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
(3)
Device Marking
(4/5)
PTH04T260WAD
ACTIVE
ThroughHole Module
ECL
10
36
Pb-Free
(RoHS)
SN
N / A for Pkg Type
-40 to 85
PTH04T260WAS
ACTIVE
Surface
Mount Module
ECM
10
36
TBD
SNPB
Level-1-235C-UNLIM/
Level-3-260C-168HRS
-40 to 85
PTH04T260WAZ
ACTIVE
Surface
Mount Module
BCM
10
36
Pb-Free
(RoHS)
SNAGCU
Level-3-260C-168 HR
-40 to 85
PTH04T260WAZT
ACTIVE
Surface
Mount Module
BCM
10
250
Pb-Free
(RoHS)
SNAGCU
Level-3-260C-168 HR
-40 to 85
PTH04T261WAD
ACTIVE
ThroughHole Module
ECL
10
36
Pb-Free
(RoHS)
SN
N / A for Pkg Type
-40 to 85
PTH04T261WAS
ACTIVE
Surface
Mount Module
ECM
10
36
TBD
SNPB
Level-1-235C-UNLIM/
Level-3-260C-168HRS
-40 to 85
PTH04T261WAZ
ACTIVE
Surface
Mount Module
BCM
10
36
Pb-Free
(RoHS)
SNAGCU
Level-3-260C-168 HR
-40 to 85
PTH04T261WAZT
ACTIVE
Surface
Mount Module
BCM
10
250
Pb-Free
(RoHS)
SNAGCU
Level-3-260C-168 HR
-40 to 85
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
(4)
26-Aug-2013
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
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