STMICROELECTRONICS EMIF01

EMIF01-TV01F3
Single line IPAD™, EMI filter and ESD protection
Features
■
EMI symmetrical (I/O) low-pass filter
■
High efficiency EMI filtering
■
Lead-free package
■
400 µm pitch
■
Very low PCB space occupation: 0.6 mm2
■
Very thin package: 0.6 mm
■
High reliability offered by monolithic integration
■
Reduction of parasitic elements through CSP
integration
Flip Chip
(4 bumps)
Figure 1.
Pin configuration (bump side)
A
B
Complies with the following standards
■
■
IEC 61000-4-2 level 4 on internal and external
pins:
– 15 kV (air discharge)
– 8 kV (contact discharge)
MIL STD 883F - Method 3015.7 Class 3
1
2
Pin
A1
A2
Description
TV OUT internal
GND
Pin
B1
B2
Description
TV OUT external
GND
Application
■
TV analog signal in TV_OUT interface
Figure 2.
Description
The EMIF01-TV01F3 is a highly integrated array
designed to suppress EMI/RFI noise and provide
impedance matching for mobile phone and
portable applications. The EMIF01-TV01F3 is in a
Flip Chip package to offer space saving and high
RF performance.
Device configuration
TV out
Internal
A1
GND
R
TV out
External
B1
GND
This low pass filter includes ESD protection
circuitry which prevents damage to the protected
device when subjected to ESD surges up to
15 kV.
TM: IPAD is a trademark of STMicroelectronics.
May 2011
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www.st.com
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Characteristics
1
EMIF01-TV01F3
Characteristics
Table 1.
Absolute maximum ratings
Symbol
VPP
Tj
Parameter and test conditions
Value
Unit
Internal pins (A1) and external pin (B1):
ESD discharge IEC 61000-4-2, air discharge
ESD discharge IEC 61000-4-2, contact discharge
15
8
kV
Maximum junction temperature
125
°C
Top
Operating temperature range
-30 to +85
°C
P
Maximum power dissipation
80
°C
Tstg
Storage temperature range
-55 to 150
°C
Table 2.
Electrical characteristics (Tamb = 25 °C)
Symbol
Parameters
VBR
Breakdown voltage
IRM
Leakage current @ VRM
VRM
Stand-off voltage
VCL
Clamping voltage
Rd
Dynamic impedance
IPP
Peak pulse current
RI/O
Series resistance between Input & Output
Cline
Input capacitance per line
Symbol
VBR
IR = 1 mA
IRM
VRM = 3 V
R
Cline
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Test conditions
Min
Typ
6
Tolerance ± 5 %
75
@0V
30
Doc ID 12078 Rev 3
Max
Unit
8
V
0.2
µA
Ω
35
pF
EMIF01-TV01F3
Figure 3.
Characteristics
S21 (db) attenuation measurement Figure 4.
ESD response to IEC61000-4-2
(+15 kV air discharge)
db
TV out
internal
0.00
10 V/d
-10.00
-20.00
TV out
external
-30.00
10 V/d
-40.00
f (Hz)
-50.00
100.0k
Figure 5.
1.0M
10.0M
100.0M
100 ns/d
1.0G
ESD response to IEC61000-4-2
(-15 kV air discharge)
Figure 6.
Line capacitance versus applied
voltage
CLINE (pF)
35
F=1MHz
Vosc=30mVRMS
Tj=25°C
30
TV out
internal
25
10 V/d
20
15
10
100 ns/d
TV out
external
5
10 V/d
0
VLINE (V)
0
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Application information
2
EMIF01-TV01F3
Application information
Figure 7.
Aplac model
I1
Lbump Rbump
Rline
Rbump Lbump
model = d2
model = d1
Rbump
Rbump
Lbump
Lbump
75p
Rs
Ls
I1
O1
Ls
Port1
Figure 8.
Port2
Aplac parameters
Variables
aplacvar Rline 75
aplacvar C_d1 17.5p
aplacvar C_d2 17.5p
aplacvar Ls 950pH
aplacvar Rs 150m
aplacvar Lbump96pH
aplacvar Rbump 20m
aplacvar Lgnd 75pH
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Rs
Diode D1
BV=7
IBV=1m
CJO=C_d1
M=0.28
RS=0.48
VJ=0.6
TT=100n
Doc ID 12078 Rev 3
Diode D2
BV=7
IBV=1m
CJO=C_d2
M=0.28
RS=0.7
VJ=0.6
TT=100n
O1
EMIF01-TV01F3
3
Ordering information scheme
Ordering information scheme
Figure 9.
Ordering information scheme
EMIF
yy
-
xx zz
Fx
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10 (pF)
or
2 letters = application
2 digits = version
Package
F = Flip Chip
x = 3: Lead-free, pitch = 400 µm, bump = 255 µm
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 10. Package dimensions
400 µm ± 40
185 µm ± 10 µm
770 µm ± 30 µm
605 µm ± 55
770 µm ± 30µm
400 µm ± 40
185 µm ± 10 µm
4
255 µm ± 40
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Ordering information
EMIF01-TV01F3
Figure 11. Footprint
Figure 12. Marking
Dot
xx = marking
z = manufacturing location
yww = datecode
(y = year
ww = week)
Copper pad Diameter:
220 µm recommended
260 µm maximum
Solder mask opening:
300 µm minimum
x x z
y ww
Solder stencil opening :
220 µm recommended
Figure 13. Flip Chip tape and reel specification
Dot identifying Pin A1 location
3.5 ± 0.1
xxz
yww
0.87
xxz
yww
xxz
yww
8 ± 0.3
0.87
0.71 ± 0.05
4 ± 0.1
User direction of unreeling
All dimensions in mm
Note:
1.75 ± 0.1
Ø 1.5 ± 0.1
4 ± 0.1
More information is available in the application notes:
AN2348: “STMicroelectronics 400 micro-metre Flip Chip: Package description and
recommendation for use”
AN1751: “EMI filters: Recommendations and measurements”
5
Ordering information
Table 3.
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Ordering information
Order code
Marking
Package
Weight
Base qty
Delivery mode
EMIF01-TV01F3
HC
Flip Chip
0.79 mg
5000
Tape and reel 7”
Doc ID 12078 Rev 3
EMIF01-TV01F3
6
Revision history
Revision history
Table 4.
Document revision history
Date
Revision
Changes
09-Feb-2006
1
Initial release.
28-Apr-2008
2
Updated ECOPACK statement. Updated Figure 9, Figure 10, and Figure
13. Reformatted to current standards.
26-May-2011
3
Updated figure in Table 2. Updated ECOPACK statement.
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EMIF01-TV01F3
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