STMICROELECTRONICS STL40DN3LLH5

STL40DN3LLH5
Dual N-channel 30 V, 0.016 Ω typ., 11 A STripFET™ V
Power MOSFET in a PowerFLAT™ 5x6 double island
Datasheet — production data
Features
Order code
VDSS
RDS(on)
max.
ID
STL40DN3LLH5
30 V
< 0.018 Ω
11 A (1)
1. The value is rated according Rthj-pcb
■
RDS(on) * Qg industry benchmark
■
Extremely low on-resistance RDS(on)
■
Very low switching gate charge
■
High avalanche ruggedness
■
Low gate drive power losses
PowerFLAT™ 5x6
double island
Applications
■
Figure 1.
Automotive switching applications
Internal schematic diagram
Description
This device is an N-channel Power MOSFET
developed using STMicroelectronics’
STripFET™ V technology. The device has been
optimized to achieve very low on-state resistance,
contributing to a FOM that is among the best in its
class.
Table 1.
Device summary
Order code
Marking
Package
Packaging
STL40DN3LLH5
40DN3LLH5
PowerFLAT™ 5x6
double island
Tape and reel
December 2012
This is information on a product in full production.
Doc ID 18416 Rev 3
1/14
www.st.com
14
Contents
STL40DN3LLH5
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................. 6
3
Test circuits
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2/14
.............................................. 8
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STL40DN3LLH5
1
Electrical ratings
Electrical ratings
Table 2.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage
30
V
VGS
Gate-source voltage
± 22
V
ID(1)
Drain current (continuous) at TC = 25 °C
40
A
ID (1)
Drain current (continuous) at TC = 100 °C
26
A
ID(2)
Drain current (continuous) at TC = 25 °C
11
A
Drain current (continuous) at TC=100°C
7
A
Drain current (pulsed)
44
A
PTOT (1)
Total dissipation at TC = 25°C
60
W
(2)
Total dissipation at TC = 25°C
4
W
0.03
W/°C
-55 to 150
°C
Value
Unit
2.08
°C/W
32
°C/W
ID
(2)
IDM(3)
PTOT
Derating factor
TJ
Operating junction temperature
Storage temperature
Tstg
1. The value is rated according Rthj-c
2. The value is rated according Rthj-pcb
3. Pulse width limited by safe operating area
Table 3.
Thermal resistance
Symbol
Rthj-case
Rthj-pcb
(1)
Parameter
Thermal resistance junction-case drain, steady state
Thermal resistance junction-ambient
1. When mounted on FR-4 board of 1inch², 2oz Cu, t < 10 sec
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Electrical characteristics
2
STL40DN3LLH5
Electrical characteristics
(TCASE=25 °C unless otherwise specified)
Table 4.
Symbol
V(BR)DSS
Parameter
Test conditions
Drain-source breakdown
voltage
ID = 250 µA, VGS= 0
Zero gate voltage drain
current (VGS = 0)
IGSS
Gate body leakage current
(VDS = 0)
VGS = ± 22 V
VGS(th)
Gate threshold voltage
VDS= VGS, ID = 250 µA
RDS(on)
Static drain-source on
resistance
VGS= 10 V, ID= 5.5 A
Symbol
Ciss
Coss
Crss
Qg
Qgs
Qgd
Min.
Typ.
Max.
30
VDS = 30 V @125 °C
1
VGS= 4.5 V, ID= 5.5 A
Unit
V
VDS = 30 V,
IDSS
Table 5.
4/14
On/off states
1
10
µA
µA
±100
nA
1.5
V
0.016
0.02
0.018
0.025
Ω
Ω
Dynamic
Parameter
Input capacitance
Output capacitance
Reverse transfer
capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Test conditions
Min.
Typ.
Max.
Unit
VDS =25 V, f=1 MHz, VGS=0
-
475
97
19
-
pF
pF
pF
-
4.5
1.7
1.9
-
nC
nC
nC
VDD=15 V, ID = 11 A
VGS =4.5 V
(see Figure 13)
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STL40DN3LLH5
Electrical characteristics
Table 6.
Symbol
td(on)
tr
td(off)
tf
Table 7.
Symbol
ISD
Switching times
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
Min.
Typ.
Max.
Unit
-
4
22
13
2.8
-
ns
ns
ns
ns
Min.
Typ.
Max.
Unit
VDD=15 V, ID= 11 A,
RG=4.7 Ω, VGS=10 V
(see Figure 12)
Source drain diode
Parameter
Test conditions
Source-drain current
-
11
A
ISDM(1)
Source-drain current (pulsed)
-
44
A
VSD(2)
Forward on voltage
ISD = 11 A, VGS=0
-
1.1
V
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 11 A,
trr
Qrr
IRRM
di/dt = 100 A/µs,
VDD=25 V, Tj=150 °C
-
16.2
1
8.1
ns
nC
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
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Electrical characteristics
STL40DN3LLH5
2.1
Electrical characteristics (curves)
Figure 2.
Safe operating area
Figure 3.
AM14982v1
ID
(A)
100
Thermal impedance
Tj=150°C
Tc=25°C
Single pulse
is
rea
is a S(on)
in th RD
tion max
y
era
Op ited b
Lim
Zth_PCB_PowerFLAT
K
10
0
δ=0.5
0.2
-1
10
0.1
0.05
10
-2
10ms
10
0.02
0.01
-3
10
1
100ms
1s
-4
10
0.1
-5
10
Figure 4.
Single pulse
-6
0.01
0.1
10
1
10 -5
10
VDS(V)
Output characteristics
Figure 5.
AM14983v1
ID (A)
-4
10
VGS=10V
-3
10
-2
10
-1
10
10
0
10
1
10
2
Transfer characteristics
AM14984v1
ID (A)
70
35
60
30
tp (s)
VDS=4V
5V
25
50
4V
40
20
15
30
10
20
3V
5
10
0
0
Figure 6.
1
2
3
0
4
VDS(V)
Normalized BVDSS vs temperature
AM14985v1
BVDSS
(norm)
ID=1mA
2
Figure 7.
3
4
VGS(V)
Static drain-source on-resistance
AM14986v1
RDS(on)
(mΩ)
1.10
15
1.05
VGS=10V
1.00
10
0.95
5
0.90
0.85
-50 -25
6/14
0
25 50 75 100 125 150 TJ(°C)
Doc ID 18416 Rev 3
0
0
5
10
15
20
25
ID(A)
STL40DN3LLH5
Figure 8.
Electrical characteristics
Gate charge vs gate-source voltage Figure 9.
AM14987v1
VGS
(V)
VDD=15V
ID=11A
12
Capacitance variations
AM14988v1
C (pF)
810
710
10
610
8
510
6
410
Ciss
310
4
210
2
Coss
110
0
0
1
2
3
4
6
7
AM14989v1
VGS(th)
10
100
VDS(V)
Figure 11. Normalized on-resistance vs
temperature
AM14990v1
RDS(on)
(norm)
ID=250µA
1.2
0
Qg(nC)
Figure 10. Normalized gate threshold voltage
vs temperature
(norm)
Crss
10
5
VGS=10V
ID=5.5A
1.8
1.1
1.6
1.0
1.4
0.9
1.2
0.8
1.0
0.7
0.6
0.8
0.5
0.6
0.4
-50 -25
0
25 50
75 100 125 150 TJ(°C)
0.4
-50 -25
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0
25 50 75 100 125 150 TJ(°C)
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Test circuits
3
STL40DN3LLH5
Test circuits
Figure 12. Switching times test circuit for
resistive load
Figure 13. Gate charge test circuit
VDD
12V
47kΩ
1kΩ
100nF
3.3
μF
2200
RL
μF
VGS
IG=CONST
VDD
100Ω
Vi=20V=VGMAX
VD
RG
2200
μF
D.U.T.
D.U.T.
VG
2.7kΩ
PW
47kΩ
1kΩ
PW
AM01468v1
AM01469v1
Figure 14. Test circuit for inductive load
Figure 15. Unclamped inductive load test
switching and diode recovery times
circuit
A
A
D.U.T.
FAST
DIODE
B
B
L
A
D
G
VD
L=100μH
S
3.3
μF
B
25 Ω
1000
μF
D
VDD
2200
μF
3.3
μF
VDD
ID
G
RG
S
Vi
D.U.T.
Pw
AM01470v1
Figure 16. Unclamped inductive waveform
AM01471v1
Figure 17. Switching time waveform
ton
V(BR)DSS
tdon
VD
toff
tr
tdoff
tf
90%
90%
IDM
10%
ID
VDD
10%
0
VDD
VDS
90%
VGS
AM01472v1
8/14
0
Doc ID 18416 Rev 3
10%
AM01473v1
STL40DN3LLH5
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
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Package mechanical data
Table 8.
STL40DN3LLH5
PowerFLAT™ 5x6 - 8 leads dual pad (ribbon) mechanical data
Dimensions (mm)
Ref.
Min.
Typ.
A
0.80
1.00
A1
0.02
0.05
A2
b
0.25
0.30
0.50
D
5.20
E
6.15
D2
1.68
1.88
E2
3.50
3.70
D3
1.68
1.88
E3
3.50
3.70
E4
0.55
0.75
e
10/14
Max.
1.27
L
0.50
0.80
K
1.275
1.575
Doc ID 18416 Rev 3
STL40DN3LLH5
Package mechanical data
Figure 18. PowerFLAT™ 5x6 - 8 leads dual pad drawing (dimensions are in mm)
Bottom view
Side view
Top view
8256945_Rev.E_ribbon
Doc ID 18416 Rev 3
11/14
Package mechanical data
STL40DN3LLH5
Figure 19. PowerFLAT™ 5x6 - 8 leads dual pad (ribbon) drawing recommended
footprint (dimensions are in mm)
Footprint_ribbon
12/14
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STL40DN3LLH5
5
Revision history
Revision history
Table 9.
Document revision history
Date
Revision
Changes
24-Jan-2011
1
First release.
03-Oct-2012
2
Section 2.1: Electrical characteristics (curves) has been added.
Document status promoted from preliminary data to datasheet.
Minor text changes.
14-Dec-2012
3
Modified the Applications section on the coverpage to "Automotive
switching applications".
Doc ID 18416 Rev 3
13/14
STL40DN3LLH5
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