STMICROELECTRONICS VND7NV0413TR

VNN7NV04, VNS7NV04
VND7NV04, VND7NV04-1
OMNIFET II
fully autoprotected Power MOSFET
Features
Type
RDS(on)
VNN7NV04
VNS7NV04
VND7NV04
VND7NV04-1
Ilim
Vclamp
2
1
60 mΩ
6A
2
3
SO-8
SOT-223
40 V
■
Linear current limitation
■
Thermal shutdown
■
Short circuit protection
■
Integrated clamp
■
Low current drawn from input pin
■
Diagnostic feedback through input pin
■
ESD protection
■
Direct access to the gate of the Power
MOSFET (analog driving)
■
Compatible with standard Power MOSFET in
compliance with the 2002/95/EC European
Directive
3
3
2
1
1
TO252 (DPAK)
TO251 (IPAK)
Description
The VNN7NV04, VNS7NV04, VND7NV04
VND7NV04-1, are monolithic devices designed in
STMicroelectronics VIPower M0-3 Technology,
intended for replacement of standard Power
MOSFETs from DC up to 50 kHz applications.
Built in thermal shutdown, linear current limitation
and overvoltage clamp protect the chip in harsh
environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
Table 1.
Device summary
Order codes
Package
Tube
Tube (lead-free)
Tape and reel
Tape and reel (lead-free)
SOT-223
VNN7NV04
-
VNN7NV0413TR
-
SO-8
VNS7NV04
-
VNS7NV0413TR
-
TO-252
VND7NV04
VND7NV04-E
VND7NV0413TR
VND7NV04TR-E
TO-251
VND7NV04-1
VND7NV04-1-E
-
-
April 2009
Doc ID 7383 Rev 2
1/37
www.st.com
1
Contents
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
4
5
6
2/37
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.2
SO-8 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3
DPAK maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4
SOT-223 maximum demagnetization energy . . . . . . . . . . . . . . . . . . . . . . 19
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1
SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.2
SOT-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.3
DPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1
TO-251 (IPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.2
TO-252 (DPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.3
SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.4
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.5
SOT-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.6
SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.7
DPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.8
IPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Doc ID 7383 Rev 2
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
SOT-223 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DPAK thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
TO-251 (IPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
TO-252 (DPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Doc ID 7383 Rev 2
3/37
List of figures
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Figure 47.
Figure 48.
4/37
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Static drain-source on resistance vs input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 13
Static drain-source on resistance vs input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 13
Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Static drain-source on resistance vs Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Turn-off drain source voltage slope (part 2/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
SO-8 maximum turn-off current versus load inductance. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
SO-8 demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
DPAK maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . 18
DPAK demagnetization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
SOT-223 maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . 19
SOT-223 demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 20
SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Thermal fitting model of an OMNIFET II in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
SOT-223 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 22
SOT-223 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . 23
Thermal fitting model of an OMNIFET II in SOT-223 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DPAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . . 24
DPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Thermal fitting model of an OMNIFET II in DPAK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
TO-251 (IPAK) package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Doc ID 7383 Rev 2
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Figure 49.
Figure 50.
Figure 51.
Figure 52.
Figure 53.
Figure 54.
Figure 55.
Figure 56.
Figure 57.
List of figures
TO-252 (DPAK) package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SOT-223 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
DPAK footprint and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
DPAK tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
IPAK tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Doc ID 7383 Rev 2
5/37
Block diagram and pin description
1
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Block diagram and pin description
Figure 1.
Block diagram
DRAIN
2
Overvoltage
Clamp
INPUT
1
Gate
Control
Linear
Current
Limiter
Over
Temperature
3
SOURCE
Figure 2.
Configuration diagram (top view)
SO-8 Package(1)
SOURCE
1
8
DRAIN
SOURCE
INPUT
DRAIN
DRAIN
SOURCE
4
5
DRAIN
1. For the pins configuration related to SOT-223, DPAK, IPAK see outlines at page 1.
6/37
Doc ID 7383 Rev 2
FC01000
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
2
Electrical specifications
Electrical specifications
Figure 3.
Current and voltage conventions
ID
VDS
DRAIN
IIN
RIN
INPUT
SOURCE
VIN
2.1
Absolute maximum ratings
Table 2.
Absolute maximum ratings
Value
Symbol
Parameter
Unit
SOT-223
SO-8
DPAK/IPAK
VDS
Drain-source voltage (VIN=0 V)
Internally clamped
V
VIN
Input voltage
Internally clamped
V
IIN
Input current
+/-20
mA
150
Ω
Internally limited
A
RIN MIN
Minimum input series impedance
ID
Drain current
IR
Reverse DC output current
-10.5
A
VESD1
Electrostatic discharge (R=1.5 KΩ,
C=100 pF)
4000
V
VESD2
Electrostatic discharge on output pin
only (R=330 Ω, C=150 pF)
16500
V
Total dissipation at Tc=25 °C
7
EMAX
Maximum switching energy
(L=0.7 mH; RL=0 Ω; Vbat=13.5 V;
Tjstart=150 ºC; IL=9 A)
40
EMAX
Maximum switching energy
(L=0.6 mH; RL=0 Ω; Vbat=13.5 V;
Tjstart=150 ºC; IL=9 A)
Ptot
4.6
60
W
40
mJ
37
mJ
Tj
Operating junction temperature
Internally limited
°C
Tc
Case operating temperature
Internally limited
°C
-55 to 150
°C
Tstg
Storage temperature
Doc ID 7383 Rev 2
7/37
Electrical specifications
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
2.2
Thermal data
Table 3.
Thermal data
Value
Symbol
Parameter
Unit
SOT-223
Rthj-case
Thermal resistance junction-case max
Rthj-lead
Thermal resistance junction-lead max
Rthj-amb
SO-8
DPAK
IPAK
2.1
2.1
18
°C/W
27
Thermal resistance junction-ambient max
(1)
96
90
(1)
°C/W
(1)
65
102
°C/W
1. When mounted on a standard single-sided FR4 board with 0.5 mm2 of Cu (at least 35 µm thick) connected to all DRAIN
pins.
2.3
Electrical characteristics
-40 °C < Tj < 150 °C, unless otherwise specified.
Table 4.
Symbol
Electrical characteristics
Parameter
Test conditions
Min
Typ
Max
Unit
45
55
V
Off
VCLAMP
Drain-source clamp
voltage
VIN=0 V; ID=3.5 A
40
VCLTH
Drain-source clamp
threshold voltage
VIN=0 V; ID=2 mA
36
VINTH
Input threshold voltage
VDS=VIN; ID=1 mA
0.5
IISS
Supply current from input
VDS=0 V; VIN=5 V
pin
6
-1.0
V
2.5
V
100
150
µA
6.8
8
-0.3
V
VINCL
Input-source clamp
voltage
IIN=1 mA
IIN=-1 mA
IDSS
Zero input voltage drain
current (VIN=0 V)
VDS=13 V; VIN=0 V; Tj=25 °C
VDS=25 V; VIN=0 V
30
75
µA
Static drain-source on
resistance
VIN=5 V; ID=3.5 A; Tj=25 °C
VIN=5 V; ID=3.5 A
60
120
mΩ
On
RDS(on)
Dynamic (Tj=25 °C, unless otherwise specified)
gfs (1)
Forward
transconductance
VDD=13 V; ID=3.5 A
COSS
Output capacitance
VDS=13 V; f=1 MHz; VIN=0 V
Switching (Tj=25 °C, unless otherwise specified)
8/37
Doc ID 7383 Rev 2
9
S
220
pF
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Table 4.
Symbol
td(on)
tr
td(off)
tf
td(on)
tr
td(off)
tf
(dI/dt)on
Qi
Electrical specifications
Electrical characteristics (continued)
Parameter
Test conditions
Turn-on delay time
Rise time
Turn-off delay time
VDD=15 V; ID=3.5 A
Vgen=5 V; Rgen=RIN MIN=150 Ω
(see figure Figure 4.)
Fall time
Turn-on delay time
Rise time
Turn-off delay time
VDD=15 V; ID=3.5 A
Vgen=5 V; Rgen=2.2 KΩ
(see figure Figure 4.)
Fall time
Turn-on current slope
VDD=15 V; ID=3.5 A
Vgen=5 V; Rgen=RIN MIN=150 Ω
Total input charge
VDD=12 V; ID=3.5 A; VIN=5 V
Igen=2.13 mA (see figure Figure 7.)
Min
Typ
Max
Unit
100
300
100
ns
470
1500
470
ns
500
1500
500
ns
350
1000
350
ns
0.75
2.3
0.75
µs
4.6
14.0
4.6
µs
5.4
16.0
5.4
µs
3.6
11.0
3.6
µs
6.5
A/µs
6.5
18
nC
0.8
V
220
ns
0.28
µC
2.5
A
Source drain diode (Tj=25 °C, unless otherwise specified)
VSD(1)
trr
Qrr
IRRM
Forward on voltage
ISD=3.5 A; VIN=0 V
Reverse recovery time
ISD=3.5 A; dI/dt=20 A/µs
Reverse recovery charge VDD=30 V; L=200 µH
Reverse recovery current (see test circuit, figure Figure 5.)
Protections (-40 °C < Tj < 150 °C, unless otherwise specified)
Ilim
Drain current limit
VIN=5 V; VDS=13 V
tdlim
Step response current
limit
VIN=5 V; VDS=13 V
Tjsh
Over temperature
shutdown
150
Tjrs
Over temperature reset
135
Igf
Fault sink current
VIN=5 V; VDS=13 V; Tj=Tjsh
Eas
Single pulse avalanche
energy
starting Tj=25 °C; VDD=24 V
VIN=5 V Rgen=RIN MIN=150 Ω; L=24 mH
(see figures Figure 6. & Figure 8.)
6
9
12
4.0
175
µs
200
°C
°C
15
200
A
mA
mJ
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
Doc ID 7383 Rev 2
9/37
Protection features
3
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Protection features
During normal operation, the input pin is electrically connected to the gate of the internal
Power MOSFET through a low impedance path.
The device then behaves like a standard Power MOSFET and can be used as a switch from
DC up to 50 kHz. The only difference from the user’s standpoint is that a small DC current
IISS (typ. 100µA) flows into the input pin in order to supply the internal circuitry.
The device integrates:
●
Overvoltage clamp protection: internally set at 45 V, along with the rugged avalanche
characteristics of the Power MOSFET stage give this device unrivalled ruggedness and
energy handling capability. This feature is mainly important when driving inductive
loads.
●
Linear current limiter circuit: limits the drain current ID to Ilim whatever the input pin
voltages. When the current limiter is active, the device operates in the linear region, so
power dissipation may exceed the capability of the heatsink. Both case and junction
temperatures increase, and if this phase lasts long enough, junction temperature may
reach the over temperature threshold Tjsh.
●
Over temperature and short circuit protection: these are based on sensing the chip
temperature and are not dependent on the input voltage. The location of the sensing
element on the chip in the power stage area ensures fast, accurate detection of the
junction temperature. Over temperature cutout occurs in the range 150 to 190 °C, a
typical value being 170 °C. The device is automatically restarted when the chip
temperature falls of about 15 °C below shutdown temperature.
●
Status feedback: in the case of an over temperature fault condition (Tj > Tjsh), the
device tries to sink a diagnostic current Igf through the input pin in order to indicate fault
condition. If driven from a low impedance source, this current may be used in order to
warn the control circuit of a device shutdown. If the drive impedance is high enough so
that the input pin driver is not able to supply the current Igf, the input pin will fall to 0 V.
This will not however affect the device operation: no requirement is put on the current
capability of the input pin driver except to be able to supply the normal operation drive
current IISS.
Additional features of this device are ESD protection according to the Human Body model
and the ability to be driven from a TTL logic circuit.
10/37
Doc ID 7383 Rev 2
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Figure 4.
Protection features
Switching time test circuit for resistive load
ID
90%
tr
tf
10%
t
td(on)
Vgen
td(off)
t
Figure 5.
Test circuit for diode recovery times
A
A
D
I
FAST
DIODE
OMNIFET
S
L=100uH
B
B
150Ω
D
Rgen
I
Vgen
VDD
OMNIFET
S
8.5 Ω
Doc ID 7383 Rev 2
11/37
Protection features
Figure 6.
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Unclamped inductive load test
circuits
Figure 7.
VIN
RGEN
VIN
PW
Figure 8.
12/37
Unclamped inductive waveforms
Doc ID 7383 Rev 2
Input charge test circuit
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Protection features
3.1
Electrical characteristics curves
Figure 9.
Derating curve
Figure 10. Transconductance
Gfs (S)
20
18
Vds=13V
16
Tj=-40ºC
Tj=25ºC
14
Tj=150ºC
12
10
8
6
4
2
0
0
1
2
3
4
5
6
7
8
Id(A)
Figure 11.
Static drain-source on resistance
vs input voltage (part 1/2)
Figure 12. Static drain-source on resistance
vs input voltage (part 2/2)
Rds(on) (mOhm)
Rds(on) (mOhm)
140
120
110
120
Id=3.5A
100
90
Tj=150ºC
100
Tj=150ºC
Id=6A
Id=1A
80
80
70
60
Tj=25ºC
60
50
Tj=25ºC
40
Id=6A
Id=1A
Tj=-40ºC
40
30
Tj= - 40ºC
20
Id=6A
Id=1A
20
10
0
0
3
3.5
4
4.5
5
5.5
6
6.5
7
3
3.5
4
4.5
Vin(V)
Figure 13. Source-drain diode forward
characteristics
5.5
6
6.5
Figure 14. Static drain source on resistance
Vsd (mV)
Rds(on) (mohms)
1000
150
950
5
Vin(V)
Vin=0V
125
900
Vin=5V
850
100
Tj=150ºC
800
750
75
700
50
650
600
Tj=25ºC
Tj=-40ºC
25
550
500
0
0
2
4
6
8
10
12
14
Id(A)
0
1
2
3
4
5
6
Id(A)
Doc ID 7383 Rev 2
13/37
Protection features
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Figure 15. Turn-on current slope (part 1/2)
Figure 16. Turn-on current slope (part 2/2)
di/dt(A/us)
di/dt(A/us)
2.25
8
2
7
Vin=3.5V
Vdd=15V
Id=3.5A
1.75
Vin=5V
Vdd=15V
Id=3.5A
6
1.5
5
1.25
4
1
3
0.75
2
0.5
1
0.25
0
100
200
300
400
600
500
700
800
900 1000 1100
200
100
300
400
500
Rg(ohm)
600
700
800
900 1000 1100
Rg(ohm)
Figure 17. Transfer characteristics
Figure 18. Static drain-source on resistance
vs Id
Rds(on) (mOhm)
Idon(A)
140
10
Tj=25ºC
9
Tj=-40ºC
Vds=13.5V
8
120
Tj=150ºC
Vin=3.5V
100
7
Tj=150ºC
Vin=5V
6
80
5
60
4
Vin=3.5V
Tj=25ºC
3
Vin=5V
Vin=3.5V
40
Tj=-40ºC
2
Vin=5V
20
1
0
0
1
1.5
2
2.5
3
3.5
4
4.5
5
0
5.5
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
Id(A)
Vin(V)
Figure 19. Input voltage vs input charge
Figure 20. Turn-off drain source voltage slope
(part 1/2)
dv/dt(V/us)
Vin(V)
300
8
7
250
Vds=12V
Id=3.5A
6
Vin=5V
Vdd=15V
Id=3.5A
200
5
150
4
100
3
2
50
1
0
100
0
0
5
10
15
20
300
400
500
600
700
Rg(ohm)
Qg(nC)
14/37
200
25
Doc ID 7383 Rev 2
800
900 1000 1100
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Protection features
Figure 21. Turn-off drain source voltage slope Figure 22. Capacitance variations
(part 2/2)
C(pF)
dv/dt(v/us)
600
300
250
500
f=1MHz
Vin=0V
Vin=3.5V
Vdd=15V
Id=3.5A
200
400
150
300
100
200
50
0
100
200
300
400
500
600
700
800
100
900 1000 1100
0
5
10
15
20
25
30
35
Vds(V)
Rg(ohm)
Figure 23. Output characteristics
Figure 24. Normalized on resistance vs
temperature
v
ID(A)
Rds(on)
12
2.25
11
2
10
9
Vin=5V
Vin=4.5V
8
Vin=4V
Vin=5V
Id=3.5A
1.75
7
1.5
Vin=3V
6
1.25
5
4
1
3
Vin=2.5V
2
0.75
1
Vin=2V
0
0.5
0
1
2
3
4
5
6
7
8
9
10
11
12
13
-50
-25
0
25
50
VDS(V)
Figure 25. Switching time resistive load (part
1/2)
t(us)
t(ns)
1600
Vdd=15V
Id=3.5A
Vin=5V
4.5
4
125
150
175
tr
1400
tr
Vdd=15V
Id=3.5A
Rg=150ohm
td(off)
1200
tf
3.5
100
Figure 26. Switching time resistive load (part
2/2)
5.5
5
75
T(ºC)
1000
3
800
2.5
2
600
td(off)
1.5
400
1
tf
td(on)
0.5
200
td(on)
0
0
250
500
750 1000 1250 1500 1750 2000 2250 2500
0
3.25
Rg(ohm)
3.5
3.75
4
4.25
4.5
4.75
5
5.25
Vin(V)
Doc ID 7383 Rev 2
15/37
Protection features
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Figure 27. Normalized input threshold voltage Figure 28. Normalized current limit vs junction
vs temperature
temperature
Vin(th)
Ilim (A)
1.15
15
14
1.1
Vds=Vin
Id=1mA
1.05
Vds=13V
Vin=5V
13
12
1
11
0.95
10
0.9
9
0.85
8
0.8
7
0.75
6
0.7
5
-50
-25
0
25
50
75
100
125
150
175
-50
T(ºC)
Tdlim(us)
7
6.5
Vin=5V
Rg=150ohm
5.5
5
4.5
4
3.5
5
10
15
20
25
30
35
Vdd(V)
16/37
0
25
50
75
Tj (ºC)
Figure 29. Step response current limit
6
-25
Doc ID 7383 Rev 2
100
125
150
175
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
3.2
Protection features
SO-8 maximum demagnetization energy
Figure 30. SO-8 maximum turn-off current versus load inductance
ILMAX (A)
100
10
A
B
C
1
0.1
1
10
100
L(mH)
Legend
A = Single Pulse at TJstart=150 °C
B = Repetitive pulse at TJstart=100 °C
C = Repetitive Pulse at TJstart=125 °C
Conditions:
VCC=13.5 V
Values are generated with RL=0 Ω. In case of repetitive pulses, Tjstart (at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves B and C.
Figure 31. SO-8 demagnetization
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Doc ID 7383 Rev 2
17/37
Protection features
3.3
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
DPAK maximum demagnetization energy
Figure 32. DPAK maximum turn-off current versus load inductance
ILM AX (A)
100
10
1
0.01
0.1
1
L (m H )
10
100
Legend
A = Single Pulse at TJstart=150 °C
B = Repetitive pulse at TJstart=100 °C
C = Repetitive Pulse at TJstart=125 °C
Conditions:
VCC=13.5 V
Values are generated with RL=0 Ω. In case of repetitive pulses, Tjstart (at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves B and C.
Figure 33. DPAK demagnetization
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
18/37
Doc ID 7383 Rev 2
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
3.4
Protection features
SOT-223 maximum demagnetization energy
Figure 34. SOT-223 maximum turn-off current versus load inductance
ILMAX (A)
100
10
1
0.01
0.1
1
10
L(mH)
Legend
A = Single Pulse at TJstart=150 °C
B = Repetitive pulse at TJstart=100 °C
C = Repetitive Pulse at TJstart=125 °C
Conditions:
VCC=13.5 V
Values are generated with RL=0 Ω. In case of repetitive pulses, Tjstart (at beginning of each
demagnetization) of every pulse must not exceed the temperature specified above for
curves B and C.
Figure 35. SOT-223 demagnetization
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Doc ID 7383 Rev 2
19/37
Package and PCB thermal data
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
4
Package and PCB thermal data
4.1
SO-8 thermal data
Figure 36. SO-8 PC board
Note:
Layout condition of Rth and Zth measurements (PCB FR4 area=58 mm x 58 mm, PCB
thickness=2 mm, Cu thickness=35 µm, Copper areas: 0.14 cm2, 0.8 cm2, 2 cm2).
Figure 37. Rthj-amb vs PCB copper area in open box free air condition
RTHj_amb (ºC/W)
SO-8 at 2 pins connected to TAB
110
105
100
95
90
85
80
75
70
0
0.5
1
1.5
PCB Cu heatsink area (cm^2)
20/37
Doc ID 7383 Rev 2
2
2.5
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Package and PCB thermal data
Figure 38. SO-8 thermal impedance junction ambient single pulse
ZT H (°C /W)
1000
100
10
1
0.1
0.0001
0.001
0.01
0.1
1
T ime (s)
10
100
1000
Figure 39. Thermal fitting model of an OMNIFET II in SO-8
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
T_amb
Equation 1 Pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where δ = t p ⁄ T
Table 5.
SO-8 thermal parameter
Area/island (cm2)
Footprint
R1 (°C/W)
0.2
R2 (°C/W)
0.9
R3 (°C/W)
3.5
R4 (°C/W)
21
R5 (°C/W)
16
R6 (°C/W)
58
C1 (W.s/°C)
3.00E-04
Doc ID 7383 Rev 2
2
28
21/37
Package and PCB thermal data
Table 5.
4.2
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
SO-8 thermal parameter (continued)
Area/island (cm2)
Footprint
C2 (W.s/°C)
9.00E-04
C3 (W.s/°C)
7.50E-03
C4 (W.s/°C)
0.045
C5 (W.s/°C)
0.35
C6 (W.s/°C)
1.05
2
2
SOT-223 thermal data
Figure 40. SOT-223 PC board
Note:
Layout condition of Rth and Zth measurements (PCB FR4 area=58 mm x 58 mm, PCB
thickness=2 mm, Cu thickness=35 µm, Copper areas: 0.11 cm2, 1 cm2, 2 cm2).
Figure 41. Rthj-amb vs PCB copper area in open box free air condition
RTH j-amb (°C/W)
140
130
120
110
100
90
80
70
60
0
0.5
1
1.5
Cu area (cm^2)
22/37
Doc ID 7383 Rev 2
2
2.5
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Package and PCB thermal data
Figure 42. SOT-223 thermal impedance junction ambient single pulse
ZT H (°C/W)
1000
100
10
1
0.1
0.0001
0.001
0.01
0.1
1
T ime (s)
10
100
1000
Figure 43. Thermal fitting model of an OMNIFET II in SOT-223
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
T_amb
Equation 2 Pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where δ = t p ⁄ T
Table 6.
SOT-223 thermal parameter
Area/island (cm2)
Footprint
R1 (°C/W)
0.2
R2 (°C/W)
1.1
R3 (°C/W)
4.5
R4 (°C/W)
24
R5 (°C/W)
0.1
R6 (°C/W)
100
C1 (W.s/°C)
3.00E-04
Doc ID 7383 Rev 2
2
45
23/37
Package and PCB thermal data
Table 6.
4.3
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
SOT-223 thermal parameter (continued)
Area/island (cm2)
Footprint
C2 (W.s/°C)
9.00E-04
C3 (W.s/°C)
3.00E-02
C4 (W.s/°C)
0.16
C5 (W.s/°C)
1000
C6 (W.s/°C)
0.5
2
2
DPAK thermal data
Figure 44. DPAK PC board
Note:
Layout condition of Rth and Zth measurements (PCB FR4 area=60 mm x 60 mm, PCB
thickness=2 mm, Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8 cm2).
Figure 45. Rthj-amb vs PCB copper area in open box free air condition
RTH j_amb (ºC/W)
90
80
70
60
50
40
30
0
2
4
6
PCB CU heatsink area (cm^2)
24/37
Doc ID 7383 Rev 2
8
10
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Package and PCB thermal data
Figure 46. DPAK thermal impedance junction ambient single pulse
ZT H (°C/W)
1000
100
10
1
0.1
0.0001
0.001
0.01
0.1
1
T ime (s)
10
100
1000
Figure 47. Thermal fitting model of an OMNIFET II in DPAK
Tj
C1
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
Pd
T_amb
Equation 3 Pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where δ = t p ⁄ T
Table 7.
DPAK thermal parameter
Area/island (cm2)
Footprint
R1 (°C/W)
0.1
R2 (°C/W)
0.35
R3 (°C/W)
1.20
R4 (°C/W)
2
R5 (°C/W)
15
R6 (°C/W)
61
Doc ID 7383 Rev 2
6
24
25/37
Package and PCB thermal data
Table 7.
26/37
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
DPAK thermal parameter (continued)
Area/island (cm2)
Footprint
C1 (W.s/°C)
0.0006
C2 (W.s/°C)
0.0021
C3 (W.s/°C)
0.05
C4 (W.s/°C)
0.3
C5 (W.s/°C)
0.45
C6 (W.s/°C)
0.8
Doc ID 7383 Rev 2
6
5
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
5
Package and packing information
Package and packing information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.1
TO-251 (IPAK) mechanical data
Table 8.
TO-251 (IPAK) mechanical data
millimeters
Symbol
Min.
Typ.
Max.
A
2.2
2.4
A1
0.9
1.1
A3
0.7
1.3
B
0.64
0.9
B2
5.2
5.4
B3
0.85
B5
0.3
B6
0.95
C
0.45
0.6
C2
0.48
0.6
D
6
6.2
E
6.4
6.6
G
4.4
4.6
H
15.9
16.3
L
9
9.4
L1
0.8
1.2
L2
0.8
Doc ID 7383 Rev 2
1
27/37
Package and packing information
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Figure 48. TO-251 (IPAK) package dimensions
5.2
TO-252 (DPAK) mechanical data
Table 9.
TO-252 (DPAK) mechanical data
millimeters
Symbol
Min.
Max.
A
2.20
2.40
A1
0.90
1.10
A2
0.03
0.23
B
0.64
0.90
B2
5.20
5.40
C
0.45
0.60
C2
0.48
0.60
D
6.00
6.20
D1
E
28/37
Typ.
5.1
6.40
6.60
E1
4.7
e
2.28
G
4.40
4.60
H
9.35
10.10
Doc ID 7383 Rev 2
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Table 9.
Package and packing information
TO-252 (DPAK) mechanical data (continued)
millimeters
Symbol
Min.
L2
Typ.
Max.
0.8
L4
0.60
R
1.00
0.2
V2
0°
Package Weight
8°
Gr. 0.29
Figure 49. TO-252 (DPAK) package dimensions
P032P
5.3
SOT-223 mechanical data
Table 10.
SOT-223 mechanical data
millimeters
Symbol
Min.
Typ.
A
Max.
1.8
B
0.6
0.7
0.85
B1
2.9
3
3.15
c
0.24
0.26
0.35
D
6.3
6.5
6.7
e
2.3
Doc ID 7383 Rev 2
29/37
Package and packing information
Table 10.
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
SOT-223 mechanical data (continued)
millimeters
Symbol
Min.
e1
Typ.
Max.
4.6
E
3.3
3.5
3.7
H
6.7
7
7.3
V
10 (max)
A1
0.02
0.1
Figure 50. SOT-223 package dimensions
0046067
5.4
SO-8 mechanical data
Table 11.
SO-8 mechanical data
millimeters
Symbol
Min
A
a1
Max
1.75
0.1
a2
0.25
1.65
a3
0.65
0.85
b
0.35
0.48
A
A1
30/37
Typ
1.75
0.10
Doc ID 7383 Rev 2
0.25
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Table 11.
Package and packing information
SO-8 mechanical data (continued)
millimeters
Symbol
Min
Typ
Max
A2
1.25
b
0.28
0.48
c
0.17
0.23
(1)
4.80
4.90
5.00
E
5.80
6.00
6.20
E1(2)
3.80
3.90
4.00
D
e
1.27
h
0.25
0.50
L
0.40
1.27
L1
k
1.04
0°
ccc
8°
0.10
1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs
shall not exceed 0.15 mm in total (both side).
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25 mm per side.
Figure 51. SO-8 package dimensions
0016023 D
Doc ID 7383 Rev 2
31/37
Package and packing information
5.5
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
SOT-223 packing information
Figure 52. SOT-223 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
12.4
60
18.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
12
4
8
1.5
1.5
5.5
4.5
2
All dimensions are in mm.
End
Start
Top
cover
tape
No components
Components
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
32/37
Doc ID 7383 Rev 2
No components
500mm min
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
5.6
Package and packing information
SO-8 packing information
Figure 53. SO-8 tube shipment (no suffix)
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
A
100
2000
532
3.2
6
0.6
Figure 54. SO-8 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
12
4
8
1.5
1.5
5.5
4.5
2
End
Start
Top
cover
tape
No components
Components
No components
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
Doc ID 7383 Rev 2
33/37
Package and packing information
5.7
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
DPAK packing information
Figure 55. DPAK footprint and tube shipment (no suffix)
A
6 .7
1 .8
3 .0
1 .6
C
2 .3
6 .7
2 .3
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
75
3000
532
6
21.3
0.6
Figure 56. DPAK tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
16.4
60
22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
16
4
8
1.5
1.5
7.5
6.5
2
All dimensions are in mm.
End
Start
Top
cover
tape
No components
Components
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
34/37
Doc ID 7383 Rev 2
No components
500mm min
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
5.8
Package and packing information
IPAK packing information
Figure 57. IPAK tube shipment (no suffix)
A
C
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
75
3000
532
6
21.3
0.6
All dimensions are in mm.
Doc ID 7383 Rev 2
35/37
Revision history
6
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Revision history
Table 12.
Document revision history
Date
Revision
01-Feb-2003
1
Initial Release
2
Added Table 1: Device summary on page 1 and Section 4:
Package and PCB thermal data on page 20.
Updated Section 5: Package and packing information on
page 27.
28-Apr-2009
36/37
Changes
Doc ID 7383 Rev 2
VNN7NV04, VNS7NV04, VND7NV04, VND7NV04-1
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT
RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING
APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY,
DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE
GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER’S OWN RISK.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2009 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
Doc ID 7383 Rev 2
37/37