STMICROELECTRONICS VNN1NV04TR-E

VND1NV04
VNN1NV04 - VNS1NV04
OMNIFET II
fully autoprotected Power MOSFET
Features
Parameter
Symbol
Value
Max on-state resistance (per ch.)
RON
250 mΩ
ILIMH
1.7 A
VCLAMP
40 V
Current limitation (typ)
Drain-source clamp voltage
3
1
TO-252 (DPAK)
2
1
■
Linear current limitation
■
Thermal shutdown
■
Short circuit protection
■
Integrated clamp
■
Low current drawn from input pin
■
Diagnostic feedback through input pin
■
ESD protection
■
Direct access to the gate of the Power
MOSFET (analog driving)
■
Compatible with standard Power MOSFET
2
SOT-223
3
SO-8
Description
The VND1NV04, VNN1NV04, VNS1NV04 are
monolithic devices designed in
STMicroelectronics® VIPower® M0-3 Technology,
intended for replacement of standard Power
MOSFETs from DC up to 50 KHz applications.
Built in thermal shutdown, linear current limitation
and overvoltage clamp protect the chip in harsh
environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
Table 1.
Device summary
Package
Order codes
Tube
Tube (lead free)
Tape and reel
Tape and reel (lead free)
TO-252 (DPAK)
VND1NV04
VND1NV04-E
VND1NV0413TR
VND1NV04TR-E
SOT-223
VNN1NV04
-
VNN1NV0413TR
-
SO-8
VNS1NV04
-
VNS1NV0413TR
-
December 2011
Doc ID 7381 Rev 3
1/33
www.st.com
1
Contents
VND1NV04 - VNN1NV04 - VNS1NV04
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3
Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5
6
2/33
4.1
DPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2
SOT-223 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.3
SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.1
DPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.2
SOT-223 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.3
SO8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.4
DPAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.5
SOT-223 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.6
SO8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Doc ID 7381 Rev 3
VND1NV04 - VNN1NV04 - VNS1NV04
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
DPAK thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SOT-223 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
DPAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Doc ID 7381 Rev 3
3/33
List of figures
VND1NV04 - VNN1NV04 - VNS1NV04
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Figure 47.
4/33
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Static drain-source on resistance vs. input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 12
Static drain-source on resistance vs. input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 12
Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Static drain-source on resistance vs. Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Input voltage vs. input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Turn-off drain-source voltage slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Normalized on resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Normalized input threshold voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Normalized current limit vs. junction temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
DPAK PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
DPAK Rthj-amb vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . 17
DPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 18
DPAK thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
SOT-223 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
SOT-223 Rthj-amb vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . 20
SOT-223 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . 20
SOT-223 thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
SO-8 Rthj-amb vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . 22
SO-8 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SO-8 thermal fitting model of a single channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
DPAK package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SOT-223 mechanical data & package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SO-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
SOT-223 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Doc ID 7381 Rev 3
VND1NV04 - VNN1NV04 - VNS1NV04
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
DRAIN
2
Overvoltage
Clamp
INPUT
Gate
Control
1
Linear
Current
Limiter
Over
Temperature
3
SOURCE
Figure 2.
Configuration diagram (top view)
SOURCE
1
8
DRAIN
SOURCE
INPUT
DRAIN
DRAIN
SOURCE
4
5
DRAIN
1. For the pins configuration related to SOT-223 and DPAK see outline at page 1.
Doc ID 7381 Rev 3
5/33
Electrical specifications
2
VND1NV04 - VNN1NV04 - VNS1NV04
Electrical specifications
Figure 3.
Current and voltage conventions
ID
VDS
DRAIN
IIN
RIN
INPUT
SOURCE
VIN
2.1
Absolute maximum ratings
The rating listed in Table 2: Absolute maximum ratings may cause permanent damage to
the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to Absolute maximum rating conditions for extended periods may affect device
reliability.
Table 2.
Absolute maximum ratings
Symbol
Parameter
Value
SOT-223
DPAK
Unit
VDSn
Drain-source voltage (VINn=0 V)
Internally clamped
V
VINn
Input voltage
Internally clamped
V
IINn
Input current
+/-20
mA
330
Ω
Internally limited
A
-3
A
RIN MINn Minimum input series impedance
IDn
Drain current
IRn
Reverse DC output current
VESD1
Electrostatic discharge (R=1.5 KΩ, C=100 pF)
4000
V
VESD2
Electrostatic discharge on output pins only
(R=330 Ω, C=150 pF)
16500
V
Ptot
Total dissipation at Tc=25 °C
7
8.3
35
W
Tj
Operating junction temperature
Internally limited
°C
Tc
Case operating temperature
Internally limited
°C
-55 to 150
°C
Tstg
6/33
SO-8
Storage temperature
Doc ID 7381 Rev 3
VND1NV04 - VNN1NV04 - VNS1NV04
2.2
Electrical specifications
Thermal data
Table 3.
Thermal data
Maximum value
Symbol
Parameter
Unit
SOT-223
Rthj-case
Thermal resistance junction-case
Rthj-lead
Thermal resistance junction-lead
Rthj-amb
Thermal resistance junction-ambient
SO-8
DPAK
18
3.5
°C/W
15
(1)
70
°C/W
(1)
65
54
(1)
°C/W
1. When mounted on a standard single-sided FR4 board with 50 mm2 of Cu (at least 35 μm thick) connected
to all DRAIN pins
2.3
Electrical characteristics
Table 4.
Symbol
Electrical characteristics
Parameter
Test conditions
Min.
Typ.
Max.
Unit
45
55
V
Off (-40 °C<Tj<150 °C, unless otherwise specified)
VCLAMP
Drain-source clamp
voltage
VIN=0 V; ID=0.5 A
40
VCLTH
Drain-source clamp
threshold voltage
VIN=0 V; ID=2 mA
36
VINTH
Input threshold
voltage
VDS=VIN; ID=1 mA
0.5
IISS
Supply current from
input pin
VDS=0 V; VIN=5 V
Input-source clamp
voltage
IIN=1 mA
6
VINCL
IIN=-1 mA
-1.0
Zero input voltage
drain current
(VIN=0 V)
VDS=13 V; VIN=0 V; Tj=25 °C
30
IDSS
VDS=25 V; VIN=0 V
75
V
2.5
V
100
150
µA
6.8
8
V
-0.3
µA
On (-40 °C<Tj<150 °C, unless otherwise specified)
RDS(on)
Static drain-source on VIN=5 V; ID=0.5 A; Tj=25 °C
resistance
VIN=5 V; ID=0.5 A
250
mΩ
500
Dynamic (Tj=25 °C, unless otherwise specified)
gfs (1)
Forward
transconductance
VDD=13 V; ID=0.5 A
2
S
COSS
Output capacitance
VDS=13 V; f=1 MHz; VIN=0 V
90
pF
Doc ID 7381 Rev 3
7/33
Electrical specifications
Table 4.
Symbol
VND1NV04 - VNN1NV04 - VNS1NV04
Electrical characteristics (continued)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
70
200
ns
170
500
ns
350
1000
ns
200
600
ns
0.25
1.0
µs
1.3
4.0
µs
1.8
5.5
µs
1.2
4.0
µs
Switching (Tj=25 °C, unless otherwise specified)
td(on)
tr
td(off)
tf
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Turn-on delay time
Rise time
Turn-off delay time
VDD=15 V; ID=0.5 A
Vgen=5 V; Rgen=2.2 KΩ
(see Figure 4)
Fall time
(dI/dt)on Turn-on current slope
Qi
VDD=15 V; ID=0.5 A
Vgen=5 V; Rgen=RIN MIN=330 Ω
(see Figure 4)
Total input charge
VDD=15 V; ID=1.5 A
Vgen=5 V; Rgen=RIN MIN=330 Ω
5
A/µs
VDD=12 V; ID=0.5 A; VIN=5 V
Igen=2.13 mA (see Figure 7)
5
nC
0.8
V
205
ns
100
nC
0.7
A
Source drain diode (Tj=25 °C, unless otherwise specified)
VSD(1)
Forward on voltage
trr
Reverse recovery
time
Qrr
Reverse recovery
charge
IRRM
Reverse recovery
current
ISD=0.5 A; VIN=0 V
ISD=0.5 A; dI/dt=6 A/µs
VDD=30 V; L=200 µH
(see Figure 5)
Protections (-40 °C<Tj<150 °C, unless otherwise specified)
Ilim
Drain current limit
VIN=5 V; VDS=13 V
tdlim
Step response
current limit
VIN=5 V; VDS=13 V
Tjsh
Overtemperature
shutdown
150
Tjrs
Overtemperature
reset
135
Igf
Fault sink current
VIN=5 V; VDS=13 V; Tj=Tjsh
10
Eas
Single pulse
avalanche energy
Starting Tj=25 °C; VDD=24 V
VIN=5 V Rgen=RIN MIN=330 Ω;
L=50 mH
(see Figure 6 and Figure 8)
55
1. Pulsed: pulse duration = 300 µs, duty cycle 1.5 %
8/33
Doc ID 7381 Rev 3
1.7
3.5
2.0
175
A
µs
200
°C
°C
15
20
mA
mJ
VND1NV04 - VNN1NV04 - VNS1NV04
Figure 4.
Electrical specifications
Switching time test circuit for resistive load
VD
Rgen
Vgen
ID
90%
tr
tf
10%
t
Vgen
td(on)
td(off)
t
Doc ID 7381 Rev 3
9/33
Electrical specifications
Figure 5.
VND1NV04 - VNN1NV04 - VNS1NV04
Test circuit for diode recovery times
A
A
D
I
FAST
DIODE
OMNIFET
S
L=100uH
B
B
330Ω
D
Rgen
VDD
I
OMNIFET
Vgen
S
8.5 Ω
Figure 6.
Unclamped inductive load test circuits
RGEN
VIN
PW
10/33
Doc ID 7381 Rev 3
VND1NV04 - VNN1NV04 - VNS1NV04
Figure 7.
Electrical specifications
Input charge test circuit
VIN
GEN
ND8003
Figure 8.
Unclamped inductive waveforms
Doc ID 7381 Rev 3
11/33
Electrical specifications
VND1NV04 - VNN1NV04 - VNS1NV04
2.4
Electrical characteristics curves
Figure 9.
Source-drain diode forward
characteristics
Figure 10. Static drain-source on resistance
Vsd (mV)
Rds(on) (ohms)
1000
4.5
Tj=-40ºC
4
950
Vin=2.5V
3.5
Vin=0V
3
900
2.5
850
2
1.5
800
Tj=25ºC
1
750
Tj=150ºC
0.5
0
700
0
2
4
6
8
10
12
0
14
0.05
0.1
0.15
Figure 11.
0.2
0.25
0.3
Id(A)
Id (A)
Derating curve
Figure 12. Static drain-source on resistance
vs. input voltage (part 1/2)
Rds(on) (mohms)
500
450
Id=0.5A
400
Tj=150ºC
350
300
250
200
Tj=25ºC
150
Tj=-40ºC
100
50
0
3
3.5
4
4.5
5
5.5
6
6.5
7
Vin(V)
Figure 13. Static drain-source on resistance
vs. input voltage (part 2/2)
Rds(on) (mohms)
Figure 14. Transconductance
Gfs (S)
500
450
6
Tj=150ºC
5.5
Id=1.5A
Id=1A
350
Tj=25ºC
4.5
4
300
Tj=150ºC
3.5
Tj=25ºC
250
3
2.5
200
Id=1.5A
Id=1A
Tj=-40ºC
150
2
1.5
Id=1.5A
Id=1A
100
1
50
0.5
0
0
3
3.5
4
4.5
5
5.5
6
0
6.5
0.25
0.5
0.75
1
Id(A)
Vin(V)
12/33
Tj=-40ºC
Vds=13V
5
400
Doc ID 7381 Rev 3
1.25
1.5
1.75
2
VND1NV04 - VNN1NV04 - VNS1NV04
Electrical specifications
Figure 15. Static drain-source on resistance
vs. Id
Figure 16. Transfer characteristics
Rds(on) (mohms)
Idon(A)
500
2.25
Vin=3.5V
450
Tj=25ºC
2
Vds=13.5V
Tj=150ºC
400
1.75
Vin=5V
350
1.5
300
1.25
250
Vin=3.5V
1
Vin=5V
Vin=3.5V
0.75
Tj=25ºC
200
150
Tj=-40ºC
Tj=-40ºC
0.5
Vin=5V
100
Tj=150ºC
0.25
50
0
0
0
0.25
0.5
0.75
1
1.25
1.5
1.75
1.5
2
2
1.75
Id(A)
2.5
2.25
3
3.5
2.75
3.25
4
3.75
4.5
4.25
5
4.75
Vin(V)
Figure 17. Turn-on current slope (part 1/2)
Figure 18. Turn-on current slope (part 2/2)
di/dt(A/us)
di/dt(A/us)
6
1.4
5
1.2
Vin=5V
Vdd=15V
Id=1.5A
4
Vin=3.5V
Vdd=15V
Id=1.5A
1
3
0.8
2
0.6
1
0.4
0
0.2
0
500
1000
1500
2000
2500
0
500
Rg(ohm)
1000
1500
2000
2500
Rg(ohm)
Figure 19. Input voltage vs. input charge
Figure 20. Turn-off drain source voltage slope
(part 1/2)
Vin (V)
dv/dt(V/us)
6
350
300
5
Vds=12V
Id=0.5A
Vin=5V
Vdd=15V
Id=0.5A
250
4
200
3
150
2
100
1
50
0
0
1
2
3
4
5
6
0
Qg (nC)
0
500
1000
1500
2000
2500
Rg(ohm)
Doc ID 7381 Rev 3
13/33
Electrical specifications
VND1NV04 - VNN1NV04 - VNS1NV04
Figure 21. Turn-off drain-source voltage slope Figure 22. Capacitance variations
(part 2/2)
C(pF)
dv/dt(V/us)
225
350
200
300
Vin=3.5V
Vdd=15V
Id=0.5A
250
f=1MHz
Vin=0V
175
200
150
150
125
100
100
50
75
50
0
0
500
1000
1500
2000
0
2500
5
10
15
20
25
30
35
Vds(V)
Rg(ohm)
Figure 23. Switching time resistive load
(part 1/2)
Figure 24. Switching time resistive load
(part 2/2)
t(ns)
t(us)
550
2
500
1.75
Vdd=15V
Id=0.5A
Vin=5V
1.5
Vdd=15V
Id=0.5A
Rg=330ohm
tr
450
td(off)
400
tr
1.25
350
td(off)
300
tf
1
250
0.75
tf
200
150
0.5
td(on)
0.25
td(on)
100
50
0
250
0
500
0
750 1000 1250 1500 1750 2000 2250 2500
3.25
3.5
3.75
4
4.25
4.5
4.75
5
5.25
Vin(V)
Rg(ohm)
Figure 25. Output characteristics
Figure 26. Normalized on resistance vs.
temperature
ID(A)
Rds(on) (mOhm)
2.25
2.4
2.2
Vin=5.5V
2
Vin=4.5V
2
Vin=5V
Id=0.5A
Vin=3.5V
1.8
1.75
1.6
1.5
1.4
1.2
1.25
1
0.8
1
0.6
0.4
0.75
Vin=3V
0.2
0.5
0
0
1
2
3
4
5
6
7
8
9
10
11
12
14/33
-50
-25
0
25
50
75
Tc (ºC)
VDS(V)
Doc ID 7381 Rev 3
100
125
150
175
VND1NV04 - VNN1NV04 - VNS1NV04
Electrical specifications
Figure 27. Normalized input threshold voltage Figure 28. Normalized current limit vs.
vs. temperature
junction temperature
Vinth (V)
Ilim (A)
2
5
1.8
4.5
Vds=Vin
Id=1mA
1.6
Vin=5V
Vds=13V
4
1.4
3.5
1.2
3
1
2.5
0.8
2
0.6
1.5
0.4
1
0.2
0.5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Tc (ºC)
Figure 29. Step response current limit
Tdlim(us)
2.4
2.3
Vin=5V
Rg=330ohm
2.2
2.1
2
1.9
5
10
15
20
25
30
35
Vdd(V)
Doc ID 7381 Rev 3
15/33
Protection features
3
VND1NV04 - VNN1NV04 - VNS1NV04
Protection features
During normal operation, the input pin is electrically connected to the gate of the internal
Power MOSFET through a low impedance path.
The device behaves like a standard Power MOSFET and it can be used as a switch from DC
up to 50 KHz. The only difference from the user’s point of view is that a small DC current IISS
(typ. 100 µA) flows into the input pin in order to supply the internal circuitry.
The device integrates:
●
Overvoltage clamp protection gives
–
●
Linear current limiter circuit
–
●
These are based on sensing the chip temperature and are not dependent on the
input voltage. The location of the sensing element on the chip in the power stage
area ensures fast, accurate detection of the junction temperature.
Overtemperature cutout ranges is from 150 to 190 °C, a typical value is 170 °C.
The device is automatically restarted when the chip temperature falls of about
15 °C below shutdown temperature.
Status feedback
–
16/33
Limits the drain current ID to Ilim whatever the input pin voltages. When the current
limiter is active, the device operates in the linear region, so power dissipation may
exceed the capability of the heatsink. Both case and junction temperatures
increase, and if this phase lasts long enough, junction temperature may reach the
overtemperature threshold Tjsh.
Overtemperature and short circuit protection
–
●
Internally set at 45 V, along with the rugged avalanche characteristics of the Power
MOSFET stage give this device unrivalled ruggedness and energy handling
capability. This feature is mainly important when driving inductive loads.
In the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink
a diagnostic current Igf through the input pin in order to indicate fault condition. If
driven from a low impedance source, this current may be used in order to warn the
control circuit of a device shutdown. If the drive impedance is high enough so that
the input pin driver is not able to supply the current Igf, the input pin falls to 0 V.
This does not however affect the device operation: no requirement is put on the
current capability of the input pin driver except to be able to supply the normal
operation drive current IISS. Additional features of this device are ESD protection
according to the Human Body model and the ability to be driven from a TTL logic
circuit.
Doc ID 7381 Rev 3
VND1NV04 - VNN1NV04 - VNS1NV04
Package and PCB thermal data
4
Package and PCB thermal data
4.1
DPAK thermal data
Figure 30. DPAK PC board
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm,
Cu thickness=35 µm , Copper areas: from minimum pad layout to 16 cm2).
Figure 31. DPAK Rthj-amb vs. PCB copper area in open box free air condition
90
footprint
80
70
60
50
40
30
0
2
4
6
8
10
PCB Cu heat sink area ( cm^ 2) - ( refer t o PCB layout )
Doc ID 7381 Rev 3
17/33
Package and PCB thermal data
VND1NV04 - VNN1NV04 - VNS1NV04
Figure 32. DPAK thermal impedance junction ambient single pulse
ZTH ( ° C/ W)
100
Footprint
6 cm2
10
1
0,1
0,0001
0,001
0,01
0,1
1
Time ( s)
10
Equation 1: Pulse calculation formula
Z
THδ
= R
TH
⋅δ+Z
THtp
(1 – δ)
where δ = tP/T
Figure 33. DPAK thermal fitting model of a single channel
18/33
Doc ID 7381 Rev 3
100
1000
VND1NV04 - VNN1NV04 - VNS1NV04
Table 5.
4.2
Package and PCB thermal data
DPAK thermal parameter
Area/island (cm2)
0.25
R1 (°C/W)
0.8
R2 (°C/W)
1.6
R3 (°C/W)
0.8
R4 (°C/W)
2
R5 (°C/W)
15
R6 (°C/W)
61
C1 (W·s/°C)
0.00006
C2 (W·s/°C)
0.0005
C3 (W·s/°C)
0.01
C4 (W·s/°C)
0.3
C5 (W·s/°C)
0.45
C6 (W·s/°C)
0.8
6
24
5
SOT-223 thermal data
Figure 34. SOT-223 PC board
.
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm,
Cu thickness=35 µm , Copper areas: from minimum pad layout to 0.8 cm2).
Doc ID 7381 Rev 3
19/33
Package and PCB thermal data
VND1NV04 - VNN1NV04 - VNS1NV04
Figure 35. SOT-223 Rthj-amb vs. PCB copper area in open box free air condition
140
footprint
130
120
110
100
90
80
70
60
0
0,5
1
1,5
2
2,5
PCB Cu heat sink area ( cm^ 2) - ( refer t o PCB layout )
Figure 36. SOT-223 thermal impedance junction ambient single pulse
ZTH ( ° C/ W)
1000
Footprint
100
2 cm2
10
1
0,1
0,0001
20/33
0,001
0,01
0,1
1
Time ( s)
Doc ID 7381 Rev 3
10
100
1000
VND1NV04 - VNN1NV04 - VNS1NV04
Package and PCB thermal data
Equation 2: Pulse calculation formula
Z
THδ
= R
TH
⋅δ+Z
THtp
(1 – δ)
where δ = tP/T
Figure 37. SOT-223 thermal fitting model of a single channel
Table 6.
SOT-223 thermal parameter
Area/island (cm2)
FP
R1 (°C/W)
0.8
R2 (°C/W)
1.6
R3 (°C/W)
4.5
R4 (°C/W)
24
R5 (°C/W)
0.1
R6 (°C/W)
100
C1 (W·s/°C)
0.00006
C2 (W·s/°C)
0.0005
C3 (W·s/°C)
0.03
C4 (W·s/°C)
0.16
C5 (W·s/°C)
1000
C6 (W·s/°C)
0.5
Doc ID 7381 Rev 3
2
45
2
21/33
Package and PCB thermal data
4.3
VND1NV04 - VNN1NV04 - VNS1NV04
SO-8 thermal data
Figure 38. SO-8 PC board
1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm,PCB thickness = 2 mm,
Cu thickness=35 µm , Copper areas: from minimum pad layout to 2 cm2).
Figure 39. SO-8 Rthj-amb vs. PCB copper area in open box free air condition
105
footprint
95
85
75
65
0
0,5
1
1,5
2
PCB Cu heat sink area ( cm^ 2) - ( refer t o PCB layout )
22/33
Doc ID 7381 Rev 3
2,5
VND1NV04 - VNN1NV04 - VNS1NV04
Package and PCB thermal data
Figure 40. SO-8 thermal impedance junction ambient single pulse
ZTH (°C/ W )
1000
Footprint
100
2 cm2
10
1
0,1
0,0001
0,001
0,01
0,1
1
10
100
1000
Time (s)
Equation 3: Pulse calculation formula
Z
THδ
= R
TH
⋅δ+Z
THtp
(1 – δ)
where δ = tP/T
Figure 41. SO-8 thermal fitting model of a single channel
Doc ID 7381 Rev 3
23/33
Package and PCB thermal data
Table 7.
24/33
VND1NV04 - VNN1NV04 - VNS1NV04
SO-8 thermal parameter
Area/island (cm2)
FP
R1 (°C/W)
0.8
R2 (°C/W)
2.6
R3 (°C/W)
3.5
R4 (°C/W)
21
R5 (°C/W)
16
R6 (°C/W)
58
C1 (W·s/°C)
0.00006
C2 (W·s/°C)
0.0005
C3 (W·s/°C)
0.0075
C4 (W·s/°C)
0.045
C5 (W·s/°C)
0.35
C6 (W·s/°C)
1.05
Doc ID 7381 Rev 3
2
28
2
VND1NV04 - VNN1NV04 - VNS1NV04
5
Package and packing information
Package and packing information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.1
DPAK mechanical data
Figure 42. DPAK package dimensions
P032P
Doc ID 7381 Rev 3
25/33
Package and packing information
Table 8.
VND1NV04 - VNN1NV04 - VNS1NV04
DPAK mechanical data
mm.
Dim.
Min.
Max.
A
2.20
2.40
A1
0.90
1.10
A2
0.03
0.23
B
0.64
0.90
B2
5.20
5.40
C
0.45
0.60
C2
0.48
0.60
D
6.00
6.20
D1
E
5.1
6.40
6.60
E1
4.7
e
2.28
G
4.40
4.60
H
9.35
10.10
L2
L4
0.8
0.60
R
V2
1.00
0.2
0°
Package weight
26/33
Typ.
8°
Gr. 0.29
Doc ID 7381 Rev 3
VND1NV04 - VNN1NV04 - VNS1NV04
5.2
Package and packing information
SOT-223 mechanical data
Figure 43. SOT-223 mechanical data & package outline
5.3
SO8 mechanical data
Table 9.
SO-8 mechanical data
mm
Dim.
Min.
A
Typ.
Max.
1.75
A1
0.10
A2
1.25
Doc ID 7381 Rev 3
0.25
27/33
Package and packing information
Table 9.
VND1NV04 - VNN1NV04 - VNS1NV04
SO-8 mechanical data (continued)
mm
Dim.
Min.
Typ.
Max.
b
0.28
0.48
c
0.17
0.23
D(1)
4.80
4.90
5.00
E
5.80
6.00
6.20
E1(2)
3.80
3.90
4.00
e
1.27
h
0.25
0.50
L
0.40
1.27
L1
k
1.04
0°
ccc
8°
0.10
1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs
shall not exceed 0.15 mm in total (both side).
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25 mm per side.
Figure 44. SO-8 package dimension
0016023 D
28/33
Doc ID 7381 Rev 3
VND1NV04 - VNN1NV04 - VNS1NV04
5.4
Package and packing information
DPAK packing information
The devices can be packed in tube or tape and reel shipments (see the Table 1: Device
summary ).
DPAK FOOTPRINT
TUBE SHIPMENT (no suffix)
A
C
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
75
3000
532
6
21.3
0.6
All dimensions are in mm.
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
16.4
60
22.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
16
4
8
1.5
1.5
7.5
6.5
2
End
Start
Top
cover
tape
No components
Components
No components
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
Doc ID 7381 Rev 3
29/33
Package and packing information
5.5
VND1NV04 - VNN1NV04 - VNS1NV04
SOT-223 packing information
Figure 45. SOT-223 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
12.4
60
18.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (+ 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
12
4
8
1.5
1.5
5.5
4.5
2
All dimensions are in mm.
End
Start
Top
cover
tape
No components
Components
Empty components pockets
saled with cover tape.
User direction of feed
30/33
Doc ID 7381 Rev 3
No components
500mm min
500mm min
VND1NV04 - VNN1NV04 - VNS1NV04
5.6
Package and packing information
SO8 packing information
Figure 46. SO-8 tube shipment (no suffix)
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
A
100
2000
532
3.2
6
0.6
All dimensions are in mm.
Figure 47. SO-8 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (+ 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
12
4
8
1.5
1.5
5.5
4.5
2
All dimensions are in mm.
End
Start
Top
cover
tape
No components
Components
No components
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
Doc ID 7381 Rev 3
31/33
Revision history
6
VND1NV04 - VNN1NV04 - VNS1NV04
Revision history
Table 10.
32/33
Document revision history
Date
Revision
Changes
Feb-2003
1
Initial release.
16-Apr-2009
2
Added Table 1: Device summary and Section 4: Package and PCB
thermal data
Updated Section 5: Package and packing information on page 25
01-Dic-2011
3
Upadate Table 1: Device summary.
Update the entire document using the new coorporate template.
Doc ID 7381 Rev 3
VND1NV04 - VNN1NV04 - VNS1NV04
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Doc ID 7381 Rev 3
33/33