STMICROELECTRONICS VNQ5160KTR-E

VNQ5160K-E
Quad channel high side driver for automotive applications
Features
Max transient supply voltage
VCC
41V
Operating voltage range
VCC
4.5 to 36 V
Max on-state resistance (per ch.) RON
160 mΩ
PowerSSO-24
Current limitation (typ)
ILIMH
5.4 A
Off-state supply current
IS
2 μA(1)
– Electrostatic discharge protection
Applications
1. Typical value with all loads connected
■
■
■
General features
– Inrush current active management by
power limitation
– Very low standby current
– 3.0 V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
European directive
■
Description
The VNQ5160K-E is a monolithic device made
using STMicroelectronics VIPower™ M0-5
technology. It is intended for driving resistive or
inductive loads with one side connected to
ground. Active VCC pin voltage clamp protects the
device against low energy spikes (see ISO7637
transient compatibility table).
Diagnostic functions
– Open drain status output
– On-state open-load detection
– Off-state open-load detection
– Thermal shutdown indication
The device detects open-load condition in both on
and off states, when STAT_DIS is left open or
driven low. Output shorted to VCC is detected in
the off-state. When STAT_DIS is driven high, the
STATUS pin is in a high impedance condition.
Protection
– Undervoltage shutdown
– Overvoltage clamp
– Output stuck to VCC detection
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss of VCC
– Thermal shut down
– Reverse battery protection (see Application
schematic on page 18
Table 1.
All types of resistive, inductive and capacitive
loads
Output current limitation protects the device in
overload condition. In the case of long duration
overload, the device limits the dissipated power to
a safe level up to thermal shutdown intervention.
Thermal shutdown with automatic restart allows
the device to recover normal operation as soon as
a fault condition disappears.
Device summary
Order codes
Package
PowerSSO-24
July 2009
Tube
Tape and reel
VNQ5160K-E
VNQ5160KTR-E
Doc ID 13349 Rev 6
1/30
www.st.com
1
Contents
VNQ5160K-E
Contents
1
Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1
4
6
2/30
3.1.1
Solution 1: resistor in the ground line (RGND only). . . . . . . . . . . . . . . . 18
3.1.2
Solution 2: a diode (DGND) in the ground line. . . . . . . . . . . . . . . . . . . . 19
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3
Microcontroller I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.4
Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.5
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 22
Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.1
5
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 18
PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.2
PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Doc ID 13349 Rev 6
VNQ5160K-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 20.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Status pin (VSD=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Open-load detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Doc ID 13349 Rev 6
3/30
List of figures
VNQ5160K-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
4/30
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Open-load on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Open-load off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
High-level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Open-load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 22
PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 23
PowerSSO-24 thermal impedance junction ambient single pulse (one channel on) . . . . . 24
Thermal fitting model of a double channel HSD in PowerSSO-24(1) . . . . . . . . . . . . . . . . . 24
PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Doc ID 13349 Rev 6
VNQ5160K-E
1
Block diagram and pin configuration
Block diagram and pin configuration
Figure 1.
Block diagram
VCC
OUTPUT1
VCC
clamp
GND
Undervoltage
INPUT1
VCC
Clamp 1
STATUS1
Control & protection
Identical to channel 1
Driver 1
STAT_DIS
Overtemp 1
INPUT2
OUTPUT2
VDS,LIM
Logic
VCC
Current limiter 1
Control & protection
Identical to channel 1
STATUS2
Openload on 1
OUTPUT3
INPUT3
STATUS3
Openload off 1
INPUT4
VCC
Control & protection
Identical to channel 1
PWRLIM 1
OUTPUT4
STATUS4
Table 2.
Pin functions
Name
VCC
OUTPUTn
GND
INPUTn
Function
Battery connection
Power output
Ground connection. Must be reverse battery protected by an external
diode/resistor network
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state
STATUSn
Open drain digital diagnostic pin
STAT_DIS
Active high CMOS compatible pin, to disable the STATUS pin
Doc ID 13349 Rev 6
5/30
Block diagram and pin configuration
Figure 2.
VNQ5160K-E
Configuration diagram (top view)
VCC
GND
INPUT1
STATUS1
INPUT2
STATUS2
INPUT3
STATUS3
INPUT4
STATUS4
STAT_DIS
VCC
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OUTPUT1
OUTPUT1
OUTPUT1
OUTPUT2
OUTPUT2
OUTPUT2
OUTPUT3
OUTPUT3
OUTPUT3
OUTPUT4
OUTPUT4
OUTPUT4
TAB = VCC
Table 3.
Suggested connections for unused and not connected pins
Connection / Pin
Status
N.C.
Output
Input
STAT_DIS
Floating
X
X
X
X
X
To ground
N.R.(1)
X
N.R.
Through 10 kΩ
resistor
Through 10 kΩ
resistor
1. Not recommended
6/30
Doc ID 13349 Rev 6
VNQ5160K-E
2
Electrical specifications
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VCC
VCC
VFn
ISD
IOUTn
STAT_DIS
OUTPUTn
VSD
VOUTn
IINn
ISTATn
INPUTn
STATUSn
VINn
VSTATn
GND
IGND
Note:
VFn = VOUTn - VCCn during reverse battery condition
2.1
Absolute maximum ratings
Table 4.
Absolute maximum ratings
Symbol
Value
Unit
DC supply voltage
41
V
- VCC
Reverse DC supply voltage
0.3
V
- IGND
DC reverse ground pin current
200
mA
Internally limited
A
6
A
VCC
Parameter
IOUT
DC output current
- IOUT
Reverse DC output current
IIN
DC input current
+10 / -1
mA
ISTAT
DC status current
+10 / -1
mA
+10 / -1
mA
33
mJ
4000
4000
4000
5000
5000
V
V
V
V
V
750
V
ISTAT_DIS DC status disable current
EMAX
Maximum switching energy (single pulse)
(L=12mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IOUT = IlimL(Typ.) )
VESD
Electrostatic discharge (Human Body Model: R=1.5KΩ;
C=100pF)
– Input
– Status
– STAT_DIS
– Output
– VCC
VESD
Charge device model (CDM-AEC-Q100-011)
Doc ID 13349 Rev 6
7/30
Electrical specifications
Table 4.
VNQ5160K-E
Absolute maximum ratings (continued)
Symbol
Tj
Tstg
2.2
Parameter
Value
Unit
Junction operating temperature
-40 to 150
°C
Storage temperature
- 55 to 150
°C
Thermal data
Table 5.
Thermal data
Symbol
2.3
Parameter
Rthj-case
Thermal resistance junction-case
(with one channel on)
Rthj-amb
Thermal resistance junction-ambient
Max. value
Unit
8
°C/W
See Figure 32.
°C/W
Electrical characteristics
8V<VCC<36V; -40°C< Tj <150°C, unless otherwise specified
Table 6.
Power section
Symbol
Parameter
VCC
Operating supply voltage
VUSD
VUSDhyst
RON
Vclamp
IS
Test conditions
4.5
13
36
V
Undervoltage shutdown
3.5
4.5
V
Undervoltage shutdown
hysteresis
0.5
On-state resistance(1)
IOUT=1A; Tj=25°C
IOUT=1A; Tj=150°C
IOUT=1A; VCC=5V; Tj=25°C
Clamp voltage
IS=20 mA
Supply current
Off-state; VCC=13V; VIN=VOUT=0V;
Tj=25°C
On-state; VIN=5V; VCC=13V;
IOUT=0A
VIN=VOUT=0V; VCC=13V; Tj=25°C
VIN=VOUT=0V; VCC=13V; Tj=125°C
IL(off1)
Off-state output current(1)
IL(off2)
Off-state output current(1) VIN=0V; VOUT=4V
VF
Output - VCC diode
voltage(1)
-IOUT=0.6A; Tj=150°C
1. For each channel.
2. PowerMOS leakage included.
8/30
Min. Typ. Max. Unit
Doc ID 13349 Rev 6
41
0
0
-75
V
160
320
210
mΩ
mΩ
mΩ
46
52
V
2(2)
5(2)
μA
8
14
mA
0.01
3
5
μA
μA
0
μA
0.7
V
VNQ5160K-E
Electrical specifications
Table 7.
Switching (VCC = 13V; Tj = 25°C)
Symbol
Parameter
td(on)
Turn-on delay time
RL=13Ω (see Figure 6.)
15
μs
td(off)
Turn-off delay time
RL=13Ω (see Figure 6.)
15
μs
dVOUT/dt(on)
Turn-on voltage
slope
RL=13Ω
See
Figure 6.
V/μs
dVOUT/dt(off)
Turn-off voltage
slope
RL=13Ω
See
Figure 6.
V/μs
WON
Switching energy
losses during twon
RL=13Ω (see Figure 6.)
0.05
mJ
WOFF
Switching energy
losses during twoff
RL=13Ω (see Figure 6.)
0.03
mJ
Table 8.
Symbol
Test conditions
Min.
Typ.
Max.
Unit
Status pin (VSD=0)
Parameter
Test conditions
Min
Typ
Max
Unit
VSTAT
Status low output
voltage
ISTAT= 1.6 mA, VSD=0V
0.5
V
ILSTAT
Status leakage current
Normal operation or VSD=5V,
VSTAT= 5V
10
μA
CSTAT
Status pin input
capacitance
Normal operation or VSD=5V,
VSTAT= 5V
100
pF
VSCL
Status clamp voltage
ISTAT= 1mA
ISTAT= -1mA
7
V
V
Table 9.
Protection(1)
Symbol
Parameter
Test conditions
VCC=13V
5V<VCC<36V
IlimH
DC Short circuit
current
IlimL
VCC=13V
Short circuit current
during thermal cycling TR<Tj<TTSD
TTSD
Shutdown
temperature
TR
Reset temperature
TRS
Thermal reset of
STATUS
THYST
Thermal hysteresis
(TTSD-TR)
tSDL
Status delay in
overload conditions
5.5
-0.7
Min.
Typ.
Max.
Unit
3.8
5.4
7.5
7.5
A
A
2
150
175
TRS + 1
TRS + 5
A
200
°C
135
°C
7
Tj>TTSD (See Figure 4.)
Doc ID 13349 Rev 6
°C
°C
20
μs
9/30
Electrical specifications
Table 9.
Symbol
VDEMAG
VON
VNQ5160K-E
Protection(1) (continued)
Parameter
Test conditions
Turn-off output voltage
IOUT=1A; VIN=0; L=20mH
clamp
Output voltage drop
limitation
Min.
Typ.
Max.
Unit
VCC-41
VCC-46
VCC-52
V
IOUT=0.03A (see Figure 5.)
Tj= -40°C...+150°C
25
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles
Table 10.
Symbol
Open-load detection
Parameter
Test conditions
IOL
Open-load on-state
detection threshold
VIN = 5V ,8V<VCC<18V
tDOL(on)
Open-load on-state
detection delay
IOUT = 0A, VCC=13V
(See Figure 4.)
tPOL
Delay between INPUT
falling edge and
= 0A (See Figure 4.)
I
STATUS rising edge in OUT
Open-load condition
VOL
Open-load OFF-state
voltage detection
threshold
VIN = 0V, 8V<VCC<16V
Output short circuit to
tDSTKON Vcc detection delay at
turn-off
Table 11.
Symbol
10/30
(See Figure 4.)
Min
Typ
Max
Unit
10
See
Figure
18.
40
mA
200
μs
200
500
1000
μs
2
See
Figure
19.
4
V
tPOL
μs
Max.
Unit
0.9
V
180
Logic input
Parameter
Test conditions
VIL
Input low level
IIL
Low level input current
VIH
Input high level
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
Input clamp voltage
VSDL
STAT_DIS low level
voltage
ISDL
Low level STAT_DIS
current
VSDH
STAT_DIS high level
voltage
VIN = 0.9V
Min.
Typ.
1
μA
2.1
V
VIN = 2.1V
10
0.25
IIN = 1mA
IIN = -1mA
VSD=0.9V
Doc ID 13349 Rev 6
5.5
μA
V
7
V
V
0.9
V
-0.7
1
μA
2.1
V
VNQ5160K-E
Electrical specifications
Table 11.
Logic input (continued)
Symbol
Parameter
Test conditions
ISDH
High level STAT_DIS
current
VSD(hyst)
STAT_DIS hysteresis
voltage
VSDCL
Figure 4.
Min.
Typ.
Max.
Unit
10
μA
VSD=2.1V
0.25
STAT_DIS clamp voltage
V
5.5
ISD=1mA
ISD=-1mA
7
V
V
-0.7
Status timings
OPEN LOAD STATUS TIMING (with external pull-up)
OPEN LOAD STATUS TIMING (without external pull-up)
IOUT < IOL
VIN
IOUT < IOL
VIN
VOUT > VOL
VOUT < VOL
VSTAT
VSTAT
tDOL(on)
tDOL(on)
tPOL
OVER TEMP STATUS TIMING
OUTPUT STUCK TO Vcc
Tj > TTSD
IOUT > IOL
VIN
VIN
VOUT > VOL
VSTAT
VSTAT
tDOL(on)
Figure 5.
tSDL
tDSTKON
tSDL
Output voltage drop limitation
Vcc-Vout
Tj=150oC
Tj=25oC
Tj=-40oC
Von
Iout
Von/Ron(T)
Doc ID 13349 Rev 6
11/30
Electrical specifications
Table 12.
VNQ5160K-E
Truth table
Conditions
INPUTn
OUTPUTn
STATUSn (VSD=0V)(1)
Normal operation
L
H
L
H
H
H
Current limitation
L
H
L
X
H
H
Overtemperature
L
H
L
L
H
L
Undervoltage
L
H
L
L
X
X
Output voltage > VOL
L
H
H
H
L(2)
H
Output current < IOL
L
H
L
H
H(3)
L
1. If the VSD is high, the STATUS pin is in a high impedance.
2. The STATUS pin is low with a delay equal to tDSTKON after INPUT falling edge.
3. The STATUS pin becomes high with a delay equal to tPOL after INPUT falling edge.
Figure 6.
Switching characteristics
VOUT
tWon
tWoff
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
tr
10%
tf
t
INPUT
td(on)
td(off)
t
12/30
Doc ID 13349 Rev 6
VNQ5160K-E
Electrical specifications
Table 13.
ISO 7637-2:
2004(E)
Electrical transient requirements (part 1/3)
Test levels(1)
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
Impedance
Test pulse
III
IV
1
-75 V
-100 V
5000
pulses
0.5 s
5s
2 ms, 10 Ω
2a
+37 V
+50 V
5000
pulses
0.2 s
5s
50 μs, 2 Ω
3a
-100 V
-150 V
1h
90 ms
100 ms
0.1 μs, 50 Ω
3b
+75 V
+100 V
1h
90 ms
100 ms
0.1 μs, 50 Ω
4
-6 V
-7 V
1 pulse
100 ms, 0.01 Ω
5b(1)
+65 V
+87 V
1 pulse
400 ms, 2 Ω
1. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 14.
Electrical transient requirements (part 2/3)
Test level results(1)
ISO 7637-2:
2004(E)
Test pulse
III
IV
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
5b(2)
C
C
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 15.
Electrical transient requirements (part 3/3)
Class
Contents
C
All functions of the device are performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
Doc ID 13349 Rev 6
13/30
Electrical specifications
2.4
VNQ5160K-E
Electrical characteristics curves
Figure 7.
Off-state output current
Figure 8.
Iloff1 (uA)
High level input current
Iih (uA)
5
0.1
0.09
4.5
Off state
Vcc=13V
Vin=Vout=0V
0.08
0.07
Vin=2.1V
4
3.5
0.06
3
0.05
2.5
0.04
2
0.03
1.5
0.02
1
0.01
0.5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
Figure 9.
50
75
100
125
150
175
Tc (°C)
Input clamp voltage
Figure 10. Input low level voltage
Vicl (V)
Vil (V)
8
4
7.75
3.5
Iin=1mA
7.5
3
7.25
2.5
7
2
6.75
1.5
6.5
1
6.25
0.5
6
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
75
100
125
150
175
Tc (°C)
Figure 11. Input high level voltage
Figure 12. Input hysteresis voltage
Vih (V)
Vihyst (V)
4
2
3.5
1.75
3
1.5
2.5
1.25
2
1
1.5
0.75
1
0.5
0.5
0.25
0
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
14/30
50
-50
-25
0
25
50
75
Tc (°C)
Doc ID 13349 Rev 6
100
125
150
175
VNQ5160K-E
Electrical specifications
Figure 13. Status low output voltage
Figure 14. Status leakage current
Vstat (V)
Ilstat (uA)
0.9
0.06
0.8
0.055
Istat=1.6mA
Vstat=5V
0.7
0.05
0.6
0.5
0.045
0.4
0.04
0.3
0.035
0.2
0.03
0.1
0
0.025
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
75
100
125
150
175
Tc (°C)
Figure 15. On-state resistance vs Tcase
Figure 16. On-state resistance vs VCC
Ron (mOhm)
Ron (mOhm)
250
250
225
225
Iout=1A
Vcc=13V
200
50
Tc=150°C
Tc=125°C
200
175
175
150
150
125
125
100
100
75
75
50
50
25
25
Tc=25°C
Tc=-40°C
0
0
-50
-25
0
25
50
75
100
125
150
175
0
5
10
15
Tc (°C)
20
25
30
35
40
Vcc (V)
Figure 17. Status clamp voltage
Figure 18. Open-load on-state detection
threshold
Vscl (V)
Iol (mA)
9
100
8.5
90
Istat=1mA
8
Vin=5V
80
7.5
70
7
60
6.5
50
6
40
5.5
30
5
20
4.5
10
4
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Doc ID 13349 Rev 6
15/30
Electrical specifications
VNQ5160K-E
Figure 19. Open-load off-state voltage
detection threshold
Figure 20. Undervoltage shutdown
Vol (V)
Vusd (V)
14
5
4.5
12
Vin=0V
4
10
3.5
8
3
6
2.5
4
2
2
1.5
1
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
150
175
100
125
150
175
Tc (°C)
Figure 22. ILIMH vs Tcase
Figure 21. Turn-on voltage slope
dVout/dt(on) (V/ms)
Ilimh (A)
1000
10
9
900
Vcc=13V
Ri=6.5Ohm
800
8
Vcc=13V
700
7
600
6
500
5
400
4
300
3
200
2
100
1
0
0
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
Tc (°C)
Tc (°C)
Figure 23. Turn-off voltage slope
Figure 24. High-level STAT_DIS voltage
dVout/dt(off) (V/ms)
Vsdh (V)
1500
8
1400
7
Vcc=13V
Ri=13Ohm
1300
1200
6
1100
5
1000
900
4
800
700
3
600
2
500
400
1
300
200
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
16/30
-50
-25
0
25
50
75
Tc (°C)
Doc ID 13349 Rev 6
100
125
150
175
VNQ5160K-E
Electrical specifications
Figure 25. STAT_DIS clamp voltage
Figure 26. Low level STAT_DIS voltage
Vsdcl (V)
Vsdl (V)
14
8
7
12
Isd=1mA
6
10
5
8
4
6
3
4
2
2
1
0
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Doc ID 13349 Rev 6
17/30
Application information
3
VNQ5160K-E
Application information
Figure 27. Application schematic
+5V
+5V
VCC
Rprot
STAT_DIS
Dld
μC
Rprot
INPUT
OUTPUT
Rprot
STATUS
GND
VGND
RGND
DGND
Note:
Channels 2, 3 and 4 have the same internal circuit as channel 1.
3.1
GND protection network against reverse battery
3.1.1
Solution 1: resistor in the ground line (RGND only).
This solution can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1.
RGND ≤ 600mV / (IS(on)max).
2.
RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC<0: during reverse battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same RGND.
18/30
Doc ID 13349 Rev 6
VNQ5160K-E
Application information
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests that Solution 2 is used(see below).
3.1.2
Solution 2: a diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel with DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (~600mV) in the input
threshold and in the status output values if the microprocessor ground is not common with
the device ground. This shift will not vary if more than one HSD shares the same
diode/resistor network.
3.2
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds to
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO T/R 7637/1 table.
3.3
Microcontroller I/Os protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins will be pulled negative. ST suggests the insertion of resistors (Rprot) in the
lines to prevent the μC I/Os pins from latching up.
The values of these resistors are a compromise between the leakage current of μC and the
current required by the HSD I/Os (input levels compatibility) with the latch-up limit of the μC
I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHμC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHμC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
3.4
Open-load detection in off-state
Off-state open-load detection requires an external pull-up resistor (RPU) connected between
the OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
Doc ID 13349 Rev 6
19/30
Application information
1.
VNQ5160K-E
No false open-load indication when load is connected: in this case we have to avoid
VOUT to be higher than VOlmin; this results in the following condition:
VOUT=(VPU/(RL+RPU))RL<VOlmin.
2.
No misdetection when the load is disconnected: in this case the VOUT has to be higher
than VOLmax; this results in the following condition:
RPU<(VPU–VOLmax)/IL(off2).
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched OFF when the module is in
standby.
The values of VOLmin, VOLmax and IL(off2) are available in the Electrical characteristics
section.
Figure 28. Open-load detection in off-state
V batt.
VPU
VCC
RPU
INPUT
DRIVER
+
LOGIC
IL(off2)
OUT
+
STATUS
R
VOL
GROUND
20/30
Doc ID 13349 Rev 6
RL
VNQ5160K-E
Application information
Figure 29. Waveforms
NORMAL OPERATION
INPUT
STAT_DIS
LOAD CURRENT
STATUS
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUT
STAT_DIS
LOAD CURRENT
undefined
STATUS
OPEN LOAD with external pull-up
INPUT
STAT_DIS
LOAD VOLTAGE
VOUT>VOL
VOL
STATUS
OPEN LOAD without external pull-up
INPUT
STAT_DIS
LOAD VOLTAGE
IOUT<IOL
tPOL
LOAD CURRENT
STATUS
RESISTIVE SHORT TO Vcc, NORMAL LOAD
INPUT
STAT_DIS
LOAD VOLTAGE
IOUT>IOL
VOUT>VOL
VOL
STATUS
tDSTKON
OVERLOAD OPERATION
Tj
TR TTSD
TRS
INPUT
STAT_DIS
ILIMH
ILIML
LOAD CURRENT
STATUS
current
limitation
thermal cycling
power
limitation
SHORTED LOAD
Doc ID 13349 Rev 6
NORMAL LOAD
21/30
Application information
3.5
VNQ5160K-E
Maximum demagnetization energy (VCC = 13.5V)
Figure 30. Maximum turn-off current versus inductance (for each channel)
10
A
C
B
I (A)
1
0,1
0,1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
22/30
Doc ID 13349 Rev 6
VNQ5160K-E
Package and PC board thermal data
4
Package and PC board thermal data
4.1
PowerSSO-24 thermal data
Figure 31. PowerSSO-24 PC board
Note:
Layout condition of Rth and Zth measurements (PCB: double layer, thermal vias, FR4
area= 77mm x 86mm, PCB thickness=1.6mm, Cu thickness=70mm (front and back side),
copper areas: from minimum pad lay-out to 8cm2).
Figure 32. Rthj-amb vs PCB copper area in open box free air condition (one channel ON)
RTHj_amb(°C/W)
60
55
50
45
40
35
30
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
Doc ID 13349 Rev 6
23/30
Package and PC board thermal data
VNQ5160K-E
Figure 33. PowerSSO-24 thermal impedance junction ambient single pulse (one
channel on)
ZTH (°C/W)
1000
100
Footprint
2 cm2
8 cm2
10
1
0.1
0.0001
0.001
0.01
0.1
1
Time (s)
10
100
1000
Figure 34. Thermal fitting model of a double channel HSD in PowerSSO-24(1)
1. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered
24/30
Doc ID 13349 Rev 6
VNQ5160K-E
Package and PC board thermal data
Equation 1: pulse calculation formula:
Z
THδ
= R
TH
⋅δ+Z
THtp
(1 – δ)
where δ = tP/T
Table 16.
Thermal parameters
Area/island (cm2)
Footprint
R1 = R7 = R9 = R11 (°C/W)
1.2
R2 = R8 = R10 = R12 (°C/W)
6
R3 (°C/W)
6
R4 (°C/W)
7.7
R5 (°C/W)
2
8
9
9
8
R6 (°C/W)
28
17
10
C1 = C7 = C9 = C11 (W.s/°C)
0.0008
C2 = C8 = C10 = C12 (W.s/°C)
0.0016
C3 (W.s/°C)
0.025
C4 (W.s/°C)
0.75
C5 (W.s/°C)
1
4
9
C6 (W.s/°C)
2.2
5
17
Doc ID 13349 Rev 6
25/30
Package and packing information
VNQ5160K-E
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
PowerSSO-24™ mechanical data
Figure 35. PowerSSO-24™ package dimensions
26/30
Doc ID 13349 Rev 6
VNQ5160K-E
Package and packing information
Table 17.
PowerSSO-24™ mechanical data
Millimeters
Symbol
Min
Typ
A
Max
2.45
A2
2.15
2.35
a1
0
0.1
b
0.33
0.51
c
0.23
0.32
D
10.10
10.50
E
7.4
7.6
e
0.8
e3
8.8
F
2.3
G
H
0.1
10.1
10.5
h
0.4
k
0°
8°
L
0.55
0.85
O
1.2
Q
0.8
S
2.9
T
3.65
U
1.0
N
10°
X
4.1
4.7
Y
6.5
7.1
Doc ID 13349 Rev 6
27/30
Package and packing information
5.3
VNQ5160K-E
Packing information
Figure 36. PowerSSO-24 tube shipment (no suffix)
Table 18:
C
B
A
Base Q.ty
49
Bulk Q.ty
1225
Tube length (± 0.5)
532
A
3.5
B
13.8
C (± 0.1)
0.6
Figure 37. Tape and reel shipment (suffix “TR”)
Reel dimensions
Table 19:
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
24.4
100
30.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.05)
D1 (min)
F (± 0.1)
K (max)
P1 (± 0.1)
24
4
12
1.55
1.5
11.5
2.85
2
End
All dimensions are in mm.
Start
Top
cover
tape
No components Components
500mm min
500mm min
Empty components pockets
sealed with cover tape.
User direction of feed
28/30
Doc ID 13349 Rev 6
No components
VNQ5160K-E
6
Revision history
Revision history
Table 20.
Document revision history
Date
Revision
8-Jan-2004
1
Initial release.
20-Jan-2006
2
Major general update
3
Reformatted and restructured.
Contents, List of tables and List of figures added.
Section 3.5: Maximum demagnetization energy (VCC = 13.5V)
added.
Section 5.1: ECOPACK® packages information added.
New disclaimer added.
4
Table 4: Absolute maximum ratings: EMAX entries updated.
Table 13: Electrical transient requirements (part 1/3) :Test level
values III and IV for test pulse 5b and notes updated
Figure 34: Thermal fitting model of a double channel HSD in
PowerSSO-24(1) note added
5
Table 17: PowerSSO-24™ mechanical data:
– Deleted A (min) value
– Changed A (max) value from 2.47 to 2.45
– Changed A2 (max) value from 2.40 to 2.35
– Changed a1 (max) value from 0.075 to 0.1
Added F and k rows
6
Updated Figure 35: PowerSSO-24™ package dimensions.
Updated Table 17: PowerSSO-24™ mechanical data:
– Deleted G1 row
– Added O, Q, S, T and U rows
15-Mar-2007
01-Jun-2007
22-Jun-2009
23-Jul-2009
Changes
Doc ID 13349 Rev 6
29/30
VNQ5160K-E
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