STMICROELECTRONICS VN5E160S-E

VN5E160S-E
Single channel high side driver for automotive applications
Features
Max transient supply voltage
VCC
41V
Operating voltage range
VCC 4.5 to 28V
Max On-state resistance (per ch.)
RON
160 mΩ
Current limitation (typ)
ILIMH
10A
Off state supply current
IS
2 µA(1)
1. Typical value with all loads connected.
■
■
■
General
– Inrush current active management by
power limitation
– Very low stand-by current
– 3.0V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
Diagnostic functions
– Open Drain status output
– On-state open load detection
– Off-state open load detection
– Output short to VCC detection
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
– Over-temperature shutdown with
autorestart (thermal shutdown)
– Reverse battery protected (a)
– Electrostatic discharge protection
February 2008
SO-8
Application
■
All types of resistive, inductive and capacitive
loads
Description
The VN5E160S-E is a single channel high-side
driver manufactured in the ST proprietary
VIPower M0-5 technology and housed in the tiny
SO-8 package.
The VN5E160S-E is designed to drive automotive
grounded loads delivering protection, diagnostics
and easy 3V and 5V CMOS-compatible interface
with any microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, over-temperature shut-off with autorestart and over-voltage active clamp.
A dedicated active low digital status pin is
associated with every output channel in order to
provide Enhanced diagnostic functions including
fast detection of overload and short-circuit to
ground, over-temperature indication, short-circuit
to VCC diagnosis and ON & OFF state open-load
detection.
The diagnostic feedback of the whole device can
be disabled by pulling the STAT_DIS pin up, thus
allowing wired-ORing with other similar devices.
a. See Figure 32: Application schematic.
Rev 2
1/34
www.st.com
34
Contents
VN5E160S-E
Contents
1
Block diagram and pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.3
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1
4
3.1.1
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 22
3.1.2
Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 23
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.3
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.4
Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.5
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 25
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.1
5
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22
SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.2
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/34
VN5E160S-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Status pin (VSD=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Open load detection (8V<VCC<18V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
3/34
List of figures
VN5E160S-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
4/34
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Overload or Short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Intermittent Overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Open Load with external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Open Load without external pull-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
TJ evolution in Overload or Short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Low level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
On state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
High level STAT_DIS current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
On state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Low level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Turn-On voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Turn-Off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
STAT_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
High level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Low level STAT_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Open load detection in Off state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Maximum turn-Off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 25
SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 26
SO-8 thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Thermal fitting model of a single channel HSD in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
VN5E160S-E
1
Block diagram and pin configuration
Block diagram and pin configuration
Figure 1.
Block diagram
VCC
S ignal C lamp
Undervoltage
IN
C ontrol & Diagnostic
P ower
C lamp
DR IVE R
V ON
Limitation
Over
temp.
C urrent
Limitation
OFF S tate
Open load
S T_
DIS
ON S tate
Open load
ST
OUT
LOG IC
OVE R LOAD P R OTE C TION
(AC TIVE P OWE R LIMITATION)
G ND
Table 1.
Pin function
Name
VCC
OUTPUT
GND
INPUT
STATUS
STAT_DIS
Function
Battery connection.
Power output.
Ground connection. Must be reverse battery protected by an external
diode/ resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.
Open Drain digital diagnostic pin.
Active high CMOS compatible pin, to disable the STATUS pin.
5/34
Block diagram and pin configuration
Figure 2.
VN5E160S-E
Configuration diagram (top view)
VCC
OUTPUT
OUTPUT
VCC
5
6
7
8
4
3
2
1
STAT_DIS
STATUS
INPUT
GND
SO-8
Table 2.
6/34
Suggested connections for unused and not connected pins
Connection / pin
Status
N.C.
Output
Input
STAT_DIS
Floating
X
X
X
X
X
To ground
Not
allowed
X
Not
allowed
Through 10KΩ
resistor
Through 10KΩ
resistor
VN5E160S-E
2
Electrical specifications
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VCC
VCC
VF
ISD
IOUT
STAT_DIS
OUTPUT
VSD
VOUT
IIN
ISTAT
INPUT
STATUS
VIN
VSTAT
GND
IGND
Note:
VF = VOUT - VCC during reverse battery condition.
2.1
Absolute maximum ratings
Stressing the device above the ratings listed in the “Absolute maximum ratings” tables may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in the “Absolute maximum
ratings” tables for extended periods may affect device reliability. Refer also to the
STMicroelectronics SURE Program and others relevant quality documents.
Table 3.
Absolute maximum ratings
Symbol
Value
Unit
DC supply voltage
41
V
- VCC
Reverse DC supply voltage
0.3
V
- IGND
DC reverse ground pin current
200
mA
Internally limited
A
6
A
VCC
IOUT
- IOUT
Parameter
DC output current
Reverse DC output current
IIN
DC input current
+10 / -1
mA
ISTAT
DC status current
+10 / -1
mA
+10 / -1
mA
36
mJ
ISTAT_DIS DC status disable current
EMAX
Maximum switching energy (single pulse)
(L=8 mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IOUT = IlimL(Typ.) )
7/34
Electrical specifications
Table 3.
Absolute maximum ratings (continued)
Symbol
Value
Unit
VESD
Electrostatic discharge (Human body model: R=1.5KΩ;
C=100pF)
– INPUT
– STATUS
– STAT_DIS
– OUTPUT
– VCC
4000
4000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
- 55 to 150
°C
Tj
Tstg
Table 4.
Symbol
8/34
VN5E160S-E
Parameter
Thermal data
Parameter
Rthj-pins
Thermal resistance junction-pins
Rthj-amb
Thermal resistance junction-ambient
Max. value
Unit
30
°C/W
See Figure 36.
°C/W
VN5E160S-E
2.2
Electrical specifications
Electrical characteristics
Values specified in this section are for 8V<VCC<28V; -40°C< Tj <150°C, unless otherwise
stated.
Table 5.
Power section
Symbol
Parameter
VCC
Operating supply voltage
VUSD
VUSDhyst
RON
Vclamp
IS
IL(off1)
VF
Test conditions
Min. Typ. Max. Unit
4.5
13
28
V
Undervoltage shutdown
3.5
4.5
V
Undervoltage shutdown
hysteresis
0.5
On state resistance
IOUT=1A; Tj=25°C
IOUT=1A; Tj=150°C
IOUT=1A; VCC=5V; Tj=25°C
Clamp voltage
IS=20 mA
Supply current
Off State; VCC=13V; VIN=VOUT=0V;
Tj=25°C
On State; VIN=5V; VCC=13V;
IOUT=0A
41
Off state output current
VIN=VOUT=0V; VCC=13V; Tj=25°C
VIN=VOUT=0V; VCC=13V; Tj=125°C
Output - VCC diode
voltage
-IOUT=0.6A; Tj=150°C
0
0
V
160
320
210
mΩ
mΩ
mΩ
46
52
V
2(1)
5(1)
µA
1.9
3.5
mA
0.01
3
5
µA
µA
0.7
V
1. PowerMOS leakage included.
Table 6.
Symbol
Switching (VCC = 13V; Tj = 25°C)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-On delay time
RL=13Ω
(see Figure 6.)
10
µs
td(off)
Turn-Off delay time
RL=13Ω
(see Figure 6.)
15
µs
dVOUT/dt(on) Turn-On voltage slope
RL=13Ω
See
Figure 26.
V/µs
dVOUT/dt(off) Turn-Off voltage slope
RL=13Ω
See
Figure 28.
V/µs
WON
Switching energy losses
during twon
RL=13Ω
(see Figure 6.)
70
µJ
WOFF
Switching energy losses
during twoff
RL=13Ω
(see Figure 6.)
40
µJ
9/34
Electrical specifications
Table 7.
Symbol
VN5E160S-E
Status pin (VSD=0)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
VSTAT
Status low output
voltage
ISTAT= 1.6 mA, VSD=0V
0.5
V
ILSTAT
Status leakage current
Normal operation or VSD=5V,
VSTAT= 5V
10
µA
CSTAT
Status pin input
capacitance
Normal operation or VSD=5V,
VSTAT= 5V
100
pF
VSCL
Status clamp voltage
ISTAT= 1mA
ISTAT= - 1mA
7
V
V
Table 8.
Symbol
Parameter
Test conditions
DC short circuit
current
IlimL
Short circuit current
VCC=13V; TR<Tj<TTSD
during thermal cycling
TTSD
Shutdown
temperature
TR
Reset temperature
TRS
Thermal reset of
STATUS
THYST
Thermal hysteresis
(TTSD-TR)
tSDL
Status delay in
overload conditions
VON
-0.7
Protection (1)
IlimH
VDEMAG
5.5
VCC=13V; 5V<VCC<28V
Typ.
Max.
Unit
7
10
14
14
A
A
2.5
150
175
A
200
TRS + 1 TRS + 5
°C
7
Tj>TTSD (see Figure 4)
IOUT=0.03A (see Figure 5.)
Tj= -40°C...+150°C
°C
20
VCC-41
VCC-46 VCC-52
25
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/34
°C
°C
135
Turn-off output voltage
IOUT=1A; VIN=0; L=20mH
clamp
Output voltage drop
limitation
Min.
µs
V
mV
VN5E160S-E
Electrical specifications
Table 9.
Symbol
Open load detection (8V<VCC<18V)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
40
mA
200
µs
1200
µs
2
4
V
IOL
Open load ON state
detection threshold
VIN = 5V
tDOL(on)
Open load ON state
detection delay
IOUT = 0A, VCC=13V
(see Figure 4)
tPOL
Delay between INPUT
falling edge and
STATUS rising edge in
open load condition
IOUT = 0A (see Figure 4)
VOL
Open load OFF state
voltage detection
threshold
VIN = 0V
tDSTKON
Output short circuit to
Vcc detection delay at
turn-off
See Figure 4
180
tPOL
µs
IL(off2)
Off state output current
VIN= 0V; VOUT= 4V
(see Section 3.4: Open
load detection in Off state)
-75
0
µA
td_vol
Delay response from
output rising edge to
STATUS falling edge in
open load
VIN= 0V; VOUT= 4V
20
µs
Max.
Unit
0.9
V
Table 10.
Symbol
10
500
Logic input
Parameter
VIL
Input low level
IIL
Low level input current
VIH
Input high level
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
Input clamp voltage
VSDL
STAT_DIS low level voltage
ISDL
Low level STAT_DIS current
VSDH
STAT_DIS high level voltage
ISDH
High level STAT_DIS
current
Test conditions
VIN = 0.9V
STAT_DIS clamp voltage
Min.
Typ.
1
µA
2.1
V
VIN = 2.1V
10
0.25
IIN = 1mA
IIN = -1mA
VSD=0.9V
5.5
7
V
V
0.9
V
-0.7
1
µA
2.1
V
10
0.25
ISD=1mA
ISD=-1mA
µA
V
VSD=2.1V
VSD(hyst) STAT_DIS hysteresis voltage
VSDCL
200
µA
V
5.5
7
-0.7
V
V
11/34
Electrical specifications
Figure 4.
VN5E160S-E
Status timings
OPEN LOAD STATUS TIMING (with external pull-up)
OPEN LOAD STATUS TIMING (without external pull-up)
IOUT < IOL
VIN
IOUT < IOL
VIN
VOUT > VOL
VOUT < VOL
VSTAT
VSTAT
tDOL(on)
tDOL(on)
tPOL
OVER TEMP STATUS TIMING
OUTPUT STUCK TO Vcc
Tj > TTSD
IOUT > IOL
VIN
VOUT > VOL
VIN
VSTAT
VSTAT
tDOL(on)
Figure 5.
tSDL
tDSTKON
tSDL
Output voltage drop limitation
Vcc-Vout
Tj=150oC
Tj=25oC
Tj=-40oC
Von
Iout
Von/Ron(T)
12/34
VN5E160S-E
Electrical specifications
Figure 6.
Switching characteristics
VOUT
tWon
tWoff
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
tr
tf
t
INPUT
td(on)
td(off)
t
Table 11.
Truth table
Conditions
INPUT
OUTPUT
STATUS (VSD=0V)(1)
Normal operation
L
H
L
H
H
H
Overtemperature
L
H
L
L
H
L
Undervoltage
L
H
L
L
X
X
H
X
(no power limitation)
Cycling
(power limitation)
H
Overload &
Short circuit to GND
H
L
Output voltage > VOL
L
H
H
H
L(2)
H
Output current < IOL
L
H
L
H
H(3)
L
1. If the VSD is high, the STATUS pin is in a high impedance.
2. The STATUS pin is low with a delay equal to tDSTKON after INPUT falling edge.
3. The STATUS pin becomes high with a delay equal to tPOL after INPUT falling edge.
13/34
Electrical specifications
Table 12.
ISO 7637-2:
2004(E)
VN5E160S-E
Electrical transient requirements
Test levels (1)
Number of
pulses or
test times
Burst cycle / pulse
repetition time
Delays and
impedance
Test pulse
III
IV
1
-75 V
-100 V
5000
pulses
0.5 s
5s
2 ms, 10 Ω
2a
+37 V
+50 V
5000
pulses
0.2 s
5s
50 µs, 2 Ω
3a
-100 V
-150 V
1h
90 ms
100 ms
0.1 µs, 50 Ω
3b
+75 V
+100 V
1h
90 ms
100 ms
0.1 µs, 50 Ω
4
-6 V
-7 V
1 pulse
100 ms, 0.01 Ω
5b(2)
+65 V
+87 V
1 pulse
400 ms, 2 Ω
Test level results(1)
ISO 7637-2:
2004(E)
Test pulse
III
IV
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
5b(2)
C
C
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
14/34
Class
Contents
C
All functions of the device are performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
VN5E160S-E
2.3
Electrical specifications
Waveforms
Figure 7.
Normal operation
Normal operation
INPUT
Nominal load
Nominal load
IOUT
VSTATUS
VST_DIS
Figure 8.
Undervoltage shutdown
Undervoltage shut-down
VCC
VUSD
VUSDhyst
INPUT
IOUT
UNDEFINED
VSTATUS
VST_DIS
15/34
Electrical specifications
Figure 9.
VN5E160S-E
Overload or Short to GND
Overload or Short to GND
INPUT
ILimH >
Power Limitation
Thermal cycling
ILimL >
IOUT
VSTATUS
VST_DIS
Figure 10. Intermittent Overload
Intermittent Overload
INPUT
ILimH >
Overload
ILimL >
IOUT
VSTATUS
VST_DIS
16/34
Nominal load
VN5E160S-E
Electrical specifications
Figure 11. Open Load with external pull-up
Open Load
with external pull-up
INPUT
VOUT
VPU > VOL
VOL
IOUT
tDOL(on)
VSTATUS
VST_DIS
Figure 12. Open Load without external pull-up
Open Load
without external pull-up
INPUT
VOUT
IOUT < IOL
IOUT
IOL
tDOL(on)
VSTATUS
tPOL
VST_DIS
17/34
Electrical specifications
VN5E160S-E
Figure 13. Short to VCC
Short to V CC
INPUT
Resistive
Short to VCC
Hard
Short to VCC
VOUT > VOL
VOUT > VOL
VOL
VOUT
IOUT > IOL
IOUT < IOL
IOL
IOUT
tDOL(on)
tDSTK(on)
VSTATUS
VST_DIS
Figure 14. TJ evolution in Overload or Short to GND
TJ evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients
TTSD
THYST
TR
TJ_START
TJ
ILimH >
Power Limitation
< ILimL
IOUT
18/34
VN5E160S-E
2.4
Electrical specifications
Electrical characteristics curves
Figure 15. Off state output current
Figure 16. High level input current
Iloff (nA)
Iih (µA)
300
5
250
200
Vin=2.1V
4,5
Off State
Vcc=13V
Vin=Vout=0V
4
150
3,5
100
3
50
2,5
0
2
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
150
175
100
125
150
175
Tc (°C)
Figure 17. Input clamp voltage
Figure 18. Input high level
Vicl (V)
Vih (V)
7
3
6,8
lin=1mA
2,5
6,6
2
6,4
1,5
6,2
1
6
0,5
5,8
5,6
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
Tc (°C)
Figure 19. Input low level
Figure 20. Low level STAT_DIS current
Vil (V)
Isdl (µA)
2
5
1,8
4,5
1,6
4
1,4
3,5
1,2
3
1
2,5
0,8
2
0,6
1,5
0,4
Vsd= 0.9V
1
-50
-25
0
25
50
75
Tc (°C)
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
19/34
Electrical specifications
VN5E160S-E
Figure 21. On state resistance vs Tcase
Figure 22. High level STAT_DIS current
Isdh (µA)
Ron (mOhm)
5
300
Iout= 1A
Vcc=13V
250
Vsd= 2.1V
4,5
4
200
3,5
150
3
100
2,5
2
50
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
100
125
150
175
150
175
150
175
Tc (°C)
Tc (°C)
Figure 23. On state resistance vs VCC
Figure 24. Low level input current
Iil (µA)
Ron (mOhm)
5
300
Tc=150°C
4,5
Vin=0.9V
250
4
Tc=125°C
3,5
200
3
150
Tc=25°C
2,5
2
100
Tc=-40°C
1,5
1
50
0
5
10
15
20
25
30
35
-50
-25
0
25
50
75
Figure 25. ILIM vs Tcase
125
Figure 26. Turn-On voltage slope
Ilimh (A)
(dVout/dt )On (V/ms)
20
1000
900
Vcc=13V
15
100
Tc (°C)
Vcc (V)
Vcc=13V
RI=13 Ohm
800
700
10
600
500
5
400
0
300
-50
-25
0
25
50
Tc (°C)
20/34
75
100
125
150
-50
-25
0
25
50
75
Tc (°C)
100
125
VN5E160S-E
Electrical specifications
Figure 27. Undervoltage shutdown
Figure 28. Turn-Off voltage slope
Vusd (V)
(dVout/dt )Off (V/ms)
7
1400
6
Vcc=13V
RI= 13 Ohm
1200
5
1000
4
3
800
2
600
1
400
0
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Figure 29. STAT_DIS clamp voltage
Figure 30. High level STAT_DIS voltage
VsdH(V)
Vsdcl(V)
3
10
9
2,5
Isd = 1 mA
8
2
7
1,5
6
1
5
0,5
4
0
3
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Figure 31. Low level STAT_DIS voltage
VsdL(V)
3
2,5
2
1,5
1
0,5
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
21/34
Application information
3
VN5E160S-E
Application information
Figure 32. Application schematic
+5V
+5V
VCC
Rprot
STAT_DIS
Dld
Rprot
INPUT
MCU
OUTPUT
Rprot
STATUS
GND
VGND
RGND
DGND
3.1
GND protection network against reverse battery
3.1.1
Solution 1: resistor in the ground line (RGND only)
This solution can be used with any type of load.
The following is an indication on how to dimension the RGND resistor.
1.
RGND ≤600mV / (IS(on)max).
2.
RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC<0: during reverse battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same RGND.
22/34
VN5E160S-E
Application information
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests Solution 2 is used (see below).
3.1.2
Solution 2: diode (DGND) in the ground line
A resistor (RGND=1kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (~600mV) in the input
threshold and in the status output values, if the microprocessor ground is not common to the
device ground. This shift will not vary if more than one HSD shares the same diode/resistor
network.
3.2
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds to
VCC max DC rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO T/R 7637/2 table.
3.3
MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins will be pulled negative. ST suggests that a resistor (Rprot) be inserted in line
to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os.
-VCCpeak/Ilatchup ≤Rprot ≤(VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤Rprot ≤180kΩ.
Recommended Rprot value is 10kΩ.
23/34
Application information
3.4
VN5E160S-E
Open load detection in Off state
Off-state open-load detection requires an external pull-up resistor (RPU) connected between
the OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
1.
No false open load indication when load is connected: in this case we have to avoid
VOUT to be higher than VOlmin; this results in the following condition
VOUT= (VPU/(RL+RPU))RL<VOlmin.
2.
No misdetection when load is disconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU<(VPU–VOLmax)/IL(off2).
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched OFF when the module is in
standby.
The values of VOLmin, VOLmax and IL(off2) are available in the Electrical characteristics
section.
Figure 33. Open load detection in Off state
V batt.
VPU
V CC
R PU
INP UT
DRIVER
+
LOGIC
IL(off2)
OUT
+
STATUS
R
V OL
GROUND
24/34
RL
VN5E160S-E
3.5
Application information
Maximum demagnetization energy (VCC = 13.5V)
Figure 34. Maximum turn-Off current versus inductance (for each channel)
100
A
10
C
B
I (A)
1
0,1
0,1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0 Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
25/34
Package and PCB thermal data
VN5E160S-E
4
Package and PCB thermal data
4.1
SO-8 thermal data
Figure 35. SO-8 PC board
Note:
Layout condition of Rth and Zth measurements (PCB: FR4 area= 4.8mm x 4.8mm, PCB
thickness=2mm, Cu thickness= 35µm, Copper areas: from minimum pad lay-out to 2cm2).
Figure 36. Rthj-amb Vs. PCB copper area in open box free air condition
RTHj_amb(°C/W)
110
100
90
80
70
60
0
0.5
1
1.5
PCB Cu heatsink area (cm^2)
26/34
2
2.5
VN5E160S-E
Package and PCB thermal data
Figure 37. SO-8 thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
Footprint
100
2 cm2
10
1
0.1
0.0001
0.001
0.01
0.1
1
Time (s)
10
100
1000
Equation 1: pulse calculation formula
Z
THδ
= R
TH
⋅ δ+Z
THtp
( 1 – δ)
where δ = tP/T
Figure 38. Thermal fitting model of a single channel HSD in SO-8 (b)
b. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
27/34
Package and PCB thermal data
Table 13.
28/34
VN5E160S-E
Thermal parameter
Area/island (cm2)
Footprint
R1 (°C/W)
1.2
R2 (°C/W)
6
R3 (°C/W)
3.5
R4 (°C/W)
21
R5 (°C/W)
16
R6 (°C/W)
58
C1 (W.s/°C)
0.0008
C2 (W.s/°C)
0.0016
C3 (W.s/°C)
0.0075
C4 (W.s/°C)
0.045
C5 (W.s/°C)
0.35
C6 (W.s/°C)
1.05
2
28
2
VN5E160S-E
Package and packing information
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second-level interconnect. The category of
Second-Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97.
The maximum ratings related to soldering conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
5.2
Package mechanical data
Figure 39. SO-8 package dimensions
29/34
Package and packing information
Table 14.
VN5E160S-E
SO-8 mechanical data
Millimeter
Dim.
Min.
Typ.
A
a1
1.75
0.1
0.25
a2
1.65
a3
0.65
0.85
b
0.35
0.48
b1
0.19
0.25
C
0.25
0.5
c1
45 (typ.)
D
4.8
5
E
5.8
6.2
e
1.27
e3
3.81
F
3.8
4
L
0.4
1.27
M
0.6
S
L1
30/34
Max.
8 (max.)
0.8
1.2
VN5E160S-E
5.3
Package and packing information
Packing information
Figure 40. SO-8 tube shipment (no suffix)
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
A
100
2000
532
3.2
6
0.6
All dimensions are in mm.
Figure 41. SO-8 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
All dimensions are in mm.
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (+ 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
12
4
8
1.5
1.5
5.5
4.5
2
All dimensions are in mm.
End
Start
Top
cover
tape
No components
Components
No components
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
31/34
Order codes
6
VN5E160S-E
Order codes
Table 15.
Device summary
Order codes
Package
SO-8
32/34
Tube
Tape and reel
VN5E160S-E
VN5E160STR-E
VN5E160S-E
7
Revision history
Revision history
Table 16.
Document revision history
Date
Revision
4-Jun-2007
1
Initial release.
2
Document restructured.
Changed Description on cover page.
Table 9: Open load detection (8V<VCC<18V): added td_vol parameter.
Changed Section 2.3: Waveforms.
Added Section 2.4: Electrical characteristics curves.
Added Section 3.5: Maximum demagnetization energy (VCC = 13.5V).
Added Section 4.1: SO-8 thermal data.
18-Feb-2008
Changes
33/34
VN5E160S-E
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34/34