Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered. CY54/74FCT245T 8-Bit Transceiver SCCS018 - May 1994 - Revised February 2000 Features Functional Description • Function, pinout, and drive compatible with FCT, and F logic • FCT-D speed at 3.8 ns max. (Com’l), FCT-C speed at 4.1 ns max. (Com’l), FCT-A speed at 4.6 ns max. (Com’l) • Reduced VOH (typically = 3.3V) versions of equivalent FCT functions • Edge-rate control circuitry for significantly improved noise characteristics • Power-off disable feature • ESD > 2000V • Matched rise and fall times • Fully compatible with TTL input and output logic levels • Extended commercial range of −40˚C to +85˚C • Sink current 64 mA (Com’l), 48 mA (Mil) Source current 32 mA (Com’l), 12 mA (Mil) Logic Block Diagram The FCT245T contains eight non-inverting bidirectional buffers with three-state outputs and is intended for bus oriented applications. For the FCT245T, current sinking capability is 64 mA at the A and B ports. The Transmit/Receiver (T/R) input determines the direction of data flow through bidirectional transceiver. Transmit (Active HIGH) enables data from A ports to B ports. The output enable (OE), when HIGH, disables both the A and B ports by putting them in a High Z condition. The outputs are designed with a power-off disable feature to allow for live insertion of boards. Pin Configurations T/R OE A0 B0 DIP/SOIC/QSOP Top View A2 8 A7 GND A3 B7 B3 B6 B5 A4 3 2 1 20 19 14 1516 17 18 B4 B4 A5 1 20 VCC A0 2 19 OE A1 3 18 B0 A1 A0 A2 4 17 B1 A3 5 16 B2 T/R VCC A4 6 15 B3 A5 7 14 B4 A6 8 13 B5 A7 9 12 B6 10 11 B7 7 6 5 4 9 10 11 12 13 B3 B2 B1 B0 B2 T/R A4 A3 A2 A6 B1 A5 LCC Top View A1 OE GND B5 A6 B6 A7 B7 Function Table[1] OE T/R Operation L L B Data to Bus A L H A Data to Bus B H X High Z State Note: 1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Copyright © 2000, Texas Instruments Incorporated CY54/74FCT245T Maximum Ratings[2,3] Power Dissipation .......................................................... 0.5W Static Discharge Voltage............................................>2001V (per MIL-STD-883, Method 3015) (Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ..................................... −65°C to +150°C Operating Range Ambient Temperature with Power Applied .................................................. −65°C to +135°C Range Supply Voltage to Ground Potential..................−0.5V to +7.0V DC Input Voltage .................................................−0.5V to +7.0V DC Output Voltage ..............................................−0.5V to +7.0V Ambient Temperature VCC 0°C to +70°C 5V ± 5% Commercial DT Commercial T, AT, CT −40°C to +85°C 5V ± 5% All −55°C to +125°C 5V ± 10% [4] Military DC Output Current (Maximum Sink Current/Pin).......120 mA Range Electrical Characteristics Over the Operating Range Parameter VOH Description Output HIGH Voltage Test Conditions Min. Typ.[5] Max. Unit VCC=Min., IOH=−32 mA Com’l 2.0 VCC=Min., IOH=−15 mA Com’l 2.4 3.3 V V VCC=Min., IOH=−12 mA Mil 2.4 3.3 V VCC=Min., IOL=64 mA Com’l VCC=Min., IOL=48mA Mil VOL Output LOW Voltage VIH Input HIGH Voltage VIL Input LOW Voltage VH Hysteresis[6] All inputs 0.2 VIK Input Clamp Diode Voltage VCC=Min., IIN=−18 mA −0.7 −1.2 V II Input HIGH Current VCC=Max., VIN=VCC 5 µA IIH Input HIGH Current VCC=Max., VIN=2.7V ±1 µA IIL Input LOW Current VCC=Max., VIN=0.5V ±1 µA −225 mA ±1 µA IOS Output Short Circuit IOFF Power-Off Disable 0.3 0.55 V 0.3 0.55 V 2.0 V 0.8 Current[7] −60 VCC=Max., VOUT=0.0V −120 VCC=0V, VOUT=4.5V V V Capacitance[6] Parameter Description Typ.[5] Max. Unit CIN Input Capacitance 5 10 pF COUT Output Capacitance 9 12 pF Notes: 2. Unless otherwise noted, these limits are over the operating free-air temperature range. 3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground. 4. TA is the “instant on” case temperature. 5. Typical values are at VCC=5.0V, TA=+25˚C ambient. 6. This parameter is specified but not tested. 7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, IOS tests should be performed last. 2 CY54/74FCT245T Power Supply Characteristics Parameter Description Test Conditions Typ.[5] Max. Unit ICC Quiescent Power Supply Current VCC=Max., VIN≤0.2V, VIN≥VCC−0.2V 0.1 0.2 mA ∆ICC Quiescent Power Supply Current (TTL inputs HIGH) VCC=Max., VIN=3.4V,[8] f1=0, Outputs Open 0.5 2.0 mA ICCD Dynamic Power Supply Current[9] VCC=Max., One Input Toggling, 50% Duty Cycle, Outputs Open, T/R or OE=GND and VIN≤0.2V or VIN≥VCC−0.2V 0.06 0.12 mA/MHz IC Total Power Supply Current[10] VCC=Max., 50% Duty Cycle, Outputs Open, One Bit Toggling at f1=10 MHz, T/R or OE=GND and VIN≤0.2V or VIN≥VCC−0.2V 0.7 1.4 mA VCC=Max., 50% Duty Cycle, Outputs Open, One Bit Toggling at f1=10 MHz, T/R or OE=GND and VIN=3.4V or VIN=GND 1.2 3.4 mA VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f1=2.5 MHz, T/R or OE=GND and VIN≤0.2V or VIN≥VCC−0.2V 1.3 2.6[11] mA VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f1=2.5 MHz, T/R or OE=GND and VIN=3.4V or VIN=GND 3.3 10.6[11] mA Notes: 8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND. 9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. = IQUIESCENT + IINPUTS + IDYNAMIC 10. IC IC = ICC+∆ICCDHNT+ICCD(f0/2 + f1N1) ICC = Quiescent Current with CMOS input levels ∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V) DH = Duty Cycle for TTL inputs HIGH NT = Number of TTL inputs at DH ICCD = Dynamic Current caused by an input transition pair (HLH or LHL) = Clock frequency for registered devices, otherwise zero f0 = Input signal frequency f1 = Number of inputs changing at f1 N1 All currents are in milliamps and all frequencies are in megahertz. 11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested. 3 CY54/74FCT245T Switching Characteristics Over the Operating Range FCT245T Military Parameter Description FCT245AT Commercial Military Commercial Min.[12] Max. Min.[12] Max. Min.[12] Max. Min.[12] Max. Unit Fig. No.[13] tPLH tPHL Propagation Delay A to B or B to A 1.5 7.5 1.5 7.0 1.5 4.9 1.5 4.6 ns 1, 3 tPZH tPZL Output Enable Time OE or T/R to A or B 1.5 10.0 1.5 9.5 1.5 6.5 1.5 6.2 ns 1, 7, 8 tPHZ tPLZ Output Disable Time OE or T/R to A or B 1.5 10.0 1.5 7.5 1.5 6.0 1.5 5.0 ns 1, 7, 8 Switching Characteristics Over the Operating Range (continued) FCT245CT Military Parameter Description Min.[12] FCT245DT Commercial Commercial Max. Min.[12] Max. Min.[12] Max. Unit Fig. No.[13] tPLH tPHL Propagation Delay A to B or B to A 1.5 4.5 1.5 4.1 1.5 3.8 ns 1, 3 tPZH tPZL Output Enable Time OE or T/R to A or B 1.5 6.2 1.5 5.8 1.5 5.0 ns 1, 7, 8 tPHZ tPLZ Output Disable Time OE or T/R to A or B 1.5 5.2 1.5 4.8 1.5 4.3 ns 1, 7, 8 Ordering Information Speed (ns) 3.8 4.1 4.5 4.6 4.9 7.0 7.5 Ordering Code Package Name Package Type CY74FCT245DTQCT Q5 20-Lead (150-Mil) QSOP CY74FCT245DTSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC CY74FCT245CTQCT Q5 20-Lead (150-Mil) QSOP CY74FCT245CTSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC CY54FCT245CTDMB D6 20-Lead (300-Mil) CerDIP CY54FCT245CTLMB L61 20-Square Leadless Chip Carrier CY74FCT245ATPC P5 20-Lead (300-Mil) Molded DIP CY74FCT245ATQCT Q5 20-Lead (150-Mil) QSOP CY74FCT245ATSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC CY54FCT245ATDMB D6 20-Lead (300-Mil) CerDIP CY54FCT245ATLMB L61 20-Square Leadless Chip Carrier CY74FCT245TQCT Q5 20-Lead (150-Mil) QSOP CY74FCT245TSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC CY54FCT245TDMB D6 20-Lead (300-Mil) CerDIP CY54FCT245TLMB L61 20-Square Leadless Chip Carrier Notes: 12. Minimum limits are specified but not tested on Propagation Delays. 13. See “Parameter Measurement Information” in the General Information section. Document #: 38−00318−B 4 Operating Range Commercial Commercial Military Commercial Military Commercial Military CY54/74FCT245T Package Diagrams 20-Lead (300-Mil) CerDIP D6 MIL−STD−1835 20-Pin Square Leadless Chip Carrier L61 D−8 Config.A MIL−STD−1835 C−2A 20-Lead (300-Mil) Molded DIP P5 5 CY54/74FCT245T Package Diagrams (continued) 20-Lead Quarter Size Outline Q5 20-Lead (300-Mil) Molded SOIC S5 6 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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