MCP14E6/7/8 2.0A Dual High-Speed Power MOSFET Driver With Enable Features General Description • High Peak Output Current: 2.0A (typical) • Independent Enable Function for Each Driver Output • Wide Input Supply Voltage Operating Range: - 4.5V to 18V • Low Shoot-Through/Cross-Conduction Current in Output Stage • High Capacitive Load Drive Capability: - tR: 12 ns with 1000 pF load (typical) - tF: 15 ns with 1000 pF load (typical) • Short Delay Times: 45 ns (typical) • Low Supply Current: - With Logic ‘1’ Input/Enable – 1 mA (typical) - With Logic ‘0’ Input/Enable – 300 µA (typical) • Latch-up Protected: Passed JEDEC JESD78A • Logic Input will Withstand Negative Swing, up to 5V • Space-Saving Packages: - 8-Lead SOIC, PDIP, 6x5 DFN The MCP14E6/7/8 devices are high-speed MOSFET drivers, capable of providing 2.0A of peak current. The dual inverting, dual non-inverting and complementary outputs are directly controlled from either TTL or CMOS (3V to 18V). These devices also feature low shoot-through current, fast rise/fall times and propagation delays, which make them ideal for high switching frequency applications. Applications • • • • Switch Mode Power Supplies Pulse Transformer Drive Line Drivers Motor and Solenoid Drive © 2011 Microchip Technology Inc. The MCP14E6/7/8 devices operate from a 4.5V to 18V single power supply and can easily charge and discharge 1000 pF of MOSFET gate capacitance. They provide low enough impedances, in both the ON and OFF states, to ensure the MOSFETs’ intended state will not be affected, even by large transients. The additional control of the MCP14E6/7/8 outputs is allowed by the use of separate enable functions. The ENB_A and ENB_B pins are active-high and are internally pulled up to VDD. The pins may be left floating for standard operation. The MCP14E6/7/8 dual output, 2.0A driver family is offered in both surface-mount and pin-through-hole packages with a -40oC to +125oC temperature rating. The low thermal resistance of the thermally enhanced DFN package allows greater power dissipation capability for driving heavier capacitive or resistive loads. These devices are highly latch-up resistant under any conditions within their power and voltage ratings. They are not subject to damage when up to 5V of noise spiking (of either polarity) occurs on the ground pin. The devices are fully latch-up protected when tested according to JEDEC JESD78A. All terminals are fully protected against Electrostatic Discharge (ESD), up to 4 kV (HBM) or 400V (MM). DS25006A-page 1 MCP14E6/7/8 Package Types MCP14E7 PDIP, SOIC ENB_A 1 MCP14E6 MCP14E7 MCP14E6 MCP14E8 MCP14E8 6x5 DFN* 8 ENB_B ENB_B ENB_B ENB_A 1 IN A 2 7 OUT A OUT A OUT A IN A 2 GND 3 6 VDD VDD VDD GND 3 IN B 4 5 OUT B OUT B OUT B EP 9 IN B 4 8 ENB_B ENB_B ENB_B 7 OUT A OUT A OUT A 6 VDD VDD VDD 5 OUT B OUT B OUT B * Includes Exposed Thermal Pad (EP); see Table 3-1. Functional Block Diagram(1) VDD Inverting VDD Output Internal Pull-up Non-Inverting Enable 4.7 V Input Effective Input C = 20 pF (Each Input) 4.7 V MCP14E6 MCP14E7 MCP14E8 Dual Inverting Dual Non-Inverting One Inverting, One Non-Inverting GND Note 1: Unused inputs should be grounded. DS25006A-page 2 © 2011 Microchip Technology Inc. MCP14E6/7/8 1.0 † Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † Supply Voltage ................................................................+20V Input Voltage ............................... (VDD + 0.3V) to (GND – 5V) Enable Voltage .............................(VDD + 0.3V) to (GND - 5V) Input Current (VIN>VDD)................................................50 mA Package Power Dissipation (TA = +50oC) 8L-DFN ........................................................................ Note 3 8L-PDIP ........................................................................1.12W 8L-SOIC .....................................................................669 mW DC CHARACTERISTICS(2) Electrical Specifications: Unless otherwise indicated, TA = +25°C, with 4.5V ≤ VDD ≤ 18V. Parameters Sym Min Typ Max Units Logic ‘1’, High Input Voltage VIH 2.4 1.5 — V Conditions Input Logic ‘0’, Low Input Voltage VIL — 1.3 0.8 V Input Current IIN -1 — 1 µA Input Voltage VIN -5 — VDD + 0.3 V 0V ≤ VIN ≤ VDD Output High Output Voltage VOH VDD – 0.025 — — V DC Test Low Output Voltage VOL — — 0.025 V DC Test Output Resistance, High ROH — 5 8 Ω IOUT = 10 mA, VDD = 18V Output Resistance, Low ROL — 5 8 Ω IOUT = 10 mA, VDD = 18V IPK — 2 — A VDD = 18V(2) Rise Time tR — 12 30 ns Figure 4-1, Figure 4-2, CL = 1000 pF Fall Time tF — 15 35 ns Figure 4-1, Figure 4-2, CL = 1000 pF Propagation Delay Time tD1 — 45 55 ns Figure 4-1, Figure 4-2 Propagation Delay Time tD2 — 45 55 ns Figure 4-1, Figure 4-2 Peak Output Current Switching Time(1) Enable Function (ENB_A, ENB_B) High-Level Input Voltage VEN_H 2.4 1.6 — V VDD = 12V, Low-to-High Transition Low-Level Input Voltage VEN_L — 1.2 0.8 V VDD = 12V, High-to-Low Transition Hysteresis VHYST — 400 — mV Enable Pull-up Impedance RENBL 0.7 1.6 3.0 MΩ VDD = 14V, ENBL = GND Enable Pin Leakage Current IENBL — 10 — µA VDD = 12V, ENB_A = ENB_B = GND Propagation Delay Time tD3 — 35 65 ns VDD = 12V, Figure 4-3 Propagation Delay Time tD4 — 35 65 ns VDD = 12V, Figure 4-3 Note 1: 2: 3: Switching times are ensured by design. Tested during characterization, not production tested. Package power dissipation is dependent on the copper pad area of the PCB. © 2011 Microchip Technology Inc. DS25006A-page 3 MCP14E6/7/8 DC CHARACTERISTICS(2) (CONTINUED) Electrical Specifications: Unless otherwise indicated, TA = +25°C, with 4.5V ≤ VDD ≤ 18V. Parameters Sym Min Typ Max Units Conditions VDD 4.5 — 18.0 V IDD — 1000 1800 µA VIN_A = 3V, VIN_B = 3V, ENB_A = ENB_B = High IDD — 600 900 µA VIN_A = 0V, VIN_B = 0V, ENB_A = ENB_B = High IDD — 800 1600 µA VIN_A = 3V, VIN_B = 0V, ENB_A = ENB_B = High IDD — 800 1600 µA VIN_A = 0V, VIN_B = 3V, ENB_A = ENB_B = High IDD — 600 1000 µA VIN_A = 3V, VIN_B = 3V, ENB_A = ENB_B = Low IDD — 300 450 µA VIN_A = 0V, VIN_B = 0V, ENB_A = ENB_B = Low IDD — 500 800 µA VIN_A = 3V, VIN_B = 0V, ENB_A = ENB_B = Low IDD — 500 800 µA VIN_A = 0V, VIN_B = 3V, ENB_A = ENB_B = Low Power Supply Supply Voltage Supply Current Switching times are ensured by design. Tested during characterization, not production tested. Package power dissipation is dependent on the copper pad area of the PCB. Note 1: 2: 3: DC CHARACTERISTICS (OVER OPERATING TEMP. RANGE)(2) Electrical Specifications: Unless otherwise indicated, operating temperature range with 4.5V ≤ VDD ≤ 18V. Parameters Sym Min Typ Max Units Conditions Input Logic ‘1’, High Input Voltage VIH 2.4 — — V Logic ‘0’, Low Input Voltage VIL — — 0.8 V Input Current IIN -10 — +10 µA 0V ≤ VIN ≤ VDD Output High Output Voltage VOH VDD – 0.025 — — V DC Test Low Output Voltage VOL — — 0.025 V DC Test Output Resistance, High ROH — 8 11 Ω IOUT = 10 mA, VDD = 18V Output Resistance, Low ROL — 8 11 Ω IOUT = 10 mA, VDD = 18V Rise Time tR — 23 35 ns Figure 4-1, Figure 4-2, CL = 1000 pF Fall Time tF — 23 40 ns Figure 4-1, Figure 4-2, CL = 1000 pF Propagation Delay Time tD1 — 50 65 ns Figure 4-1, Figure 4-2 Propagation Delay Time tD2 — 50 65 ns Figure 4-1, Figure 4-2 Switching Time Note 1: 2: (1) Switching times are ensured by design. Tested during characterization, not production tested. DS25006A-page 4 © 2011 Microchip Technology Inc. MCP14E6/7/8 DC CHARACTERISTICS (OVER OPERATING TEMP. RANGE)(2) (CONTINUED) Electrical Specifications: Unless otherwise indicated, operating temperature range with 4.5V ≤ VDD ≤ 18V. Parameters Sym Min Typ Max Units Conditions Enable Function (ENB_A, ENB_B) High-Level Input Voltage VEN_H 2.4 — — V VDD = 12V, Low-to-High Transition Low-Level Input Voltage VEN_L — — 0.8 V VDD = 12V, High-to-Low Transition Hysteresis VHYST — 0.4 — V Enable Pull-up Impedance RENBL 0.7 1.6 3.0 MΩ VDD = 14V, ENB_A = ENB_B = GND Propagation Delay Time tD3 — 60 80 ns VDD = 12V, Figure 4-3 Propagation Delay Time tD4 — 70 85 ns VDD = 12V, Figure 4-3 VDD 4.5 — 18.0 V IDD — 1400 2200 µA VIN_A = 3V, VIN_B = 3V, ENB_A = ENB_B = High IDD — 800 1100 µA VIN_A = 0V, VIN_B = 0V, ENB_A = ENB_B = High IDD — 1300 2000 µA VIN_A = 3V, VIN_B = 0V, ENB_A = ENB_B = High IDD — 1300 2000 µA VIN_A = 0V, VIN_B = 3V, ENB_A = ENB_B = High IDD — 800 1200 µA VIN_A = 3V, VIN_B = 3V, ENB_A = ENB_B = Low IDD — 500 600 µA VIN_A = 0V, VIN_B = 0V, ENB_A = ENB_B = Low IDD — 600 900 µA VIN_A = 3V, VIN_B = 0V, ENB_A = ENB_B = Low IDD — 600 900 µA VIN_A = 0V, VIN_B = 3V, ENB_A = ENB_B = Low Power Supply Supply Voltage Supply Current Note 1: 2: Switching times are ensured by design. Tested during characterization, not production tested. TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V ≤ VDD ≤ 18V. Parameters Sym Min Typ Max Units Conditions Temperature Ranges Specified Temperature Range TA -40 — +125 °C Maximum Junction Temperature TJ — — +150 °C Storage Temperature Range TA -65 — +150 °C Thermal Resistance, 8L-6x5 DFN θJA — 35.7 — °C/W Thermal Resistance, 8L-PDIP θJA — 89.3 — °C/W Thermal Resistance, 8L-SOIC θJA — 149.5 — °C/W Package Thermal Resistances © 2011 Microchip Technology Inc. Typical four-layer board with vias to ground plane DS25006A-page 5 MCP14E6/7/8 NOTES: DS25006A-page 6 © 2011 Microchip Technology Inc. MCP14E6/7/8 2.0 TYPICAL PERFORMANCE CURVES The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Note: Unless otherwise indicated, TA = +25°C with 4.5V ≤ VDD ≤ 18V. 160 180 140 Fall Time (ns) Rise Time (ns) ) 120 s n ( 100 e m i 80 T e 60 s i R 40 2,200 pF 140 ) s 120 (n e 100 im T 80 ll a 60 F 40 2,200 pF 1,000 pF 3,300 pF 20 1,000 pF 3,300 pF 20 470 pF 0 470 pF 0 4 6 8 FIGURE 2-1: Voltage. 10 12 14 Supply Voltage (V) 16 18 Rise Time vs. Supply 4 6 8 FIGURE 2-4: Voltage. 140 Fall Time (ns) 12V 80 60 18V 40 5V 12V 120 100 80 18V 60 40 20 20 0 1000 0 1000 10000 10000 Capacitive Load (pF) FIGURE 2-2: Load. 15 Capacitive Load (pF) FIGURE 2-5: Load. Fall Time vs. Capacitive 60 VDD = 18V VDD = 12V CLOAD = 1,000pF Propagation Delay (ns) Time (ns) Rise Time vs. Capacitive 25 20 18 140 100 30 16 Fall Time vs. Supply 160 5V 120 35 10 12 14 Supply Voltage (V) 180 160 Rise Time (ns) 6,800 pF 160 6,800 pF tRISE tFALL 10 55 tD1 50 tD2 45 40 -40 -25 -10 5 20 35 50 65 80 95 110 125 4 5 Temperature (°C) FIGURE 2-3: Temperature. Rise and Fall Times vs. © 2011 Microchip Technology Inc. 6 7 8 9 10 11 12 Input Amplitude (V) FIGURE 2-6: Amplitude. Propagation Delay vs. Input DS25006A-page 7 MCP14E6/7/8 Note: Unless otherwise indicated, TA = +25°C with 4.5V ≤ VDD ≤ 18V. 75 90 Propagation Delay (ns) Propagation Delay (ns) 100 tD1 80 70 60 tD2 50 40 30 VDD = 12V 70 tD1 65 60 55 tD2 50 45 40 35 4 6 8 10 12 14 16 18 -40 -25 -10 5 FIGURE 2-7: Supply Voltage. Propagation Delay Time vs. FIGURE 2-10: Temperature. 1.4 0.60 0.50 0.40 0.30 0.20 Input/Enable = 0 0.10 0.00 50 80 95 110 125 Propagation Delay Time vs. 1.2 Input/Enable = 1 1.0 0.8 0.6 0.4 Input/Enable = 0 0.2 6 8 10 12 14 16 18 -40 -25 -10 5 Supply Voltage (V) FIGURE 2-8: Supply Voltage. 20 35 50 65 80 95 110 125 Temperature (°C) FIGURE 2-11: Temperature. Quiescent Current vs. 13 Quiescent Current vs. 16 11 65 0.0 4 VIN = 0V (MCP14E6) VIN = 5V (MCP14E7) TA = +125°C VIN = 5V (MCP14E6) VIN = 0V (MCP14E7) TA = +125°C 14 12 9 ROUT-LO () ROUT-HI () 35 VDD = 18V Input/Enable = 1 Quiescent Current (mA) Quiescent Current (mA) 0.80 0.70 20 Temperature (°C) Supply Voltage (V) 7 5 TA = +25°C 10 8 6 3 TA = +25°C 4 2 1 4 6 8 10 12 14 16 18 Supply Voltage (V) FIGURE 2-9: Output Resistance (Output High) vs. Supply Voltage. DS25006A-page 8 4 6 8 10 12 14 16 18 Supply Voltage (V) FIGURE 2-12: Output Resistance (Output Low) vs. Supply Voltage. © 2011 Microchip Technology Inc. MCP14E6/7/8 Note: Unless otherwise indicated, TA = +25°C with 4.5V ≤ VDD ≤ 18V. 140 VDD = 18V 50 kHz Supply Current (mA) Supply Current (mA) 160 100 kHz 120 100 80 60 40 1000 kHz 200 kHz 500 kHz 20 0 1000 100 90 80 70 60 50 40 30 20 10 0 VDD = 18V 3,300 pF 2,200 pF 1,000 pF 470 pF 10 10000 Capacitive Load (pF) Supply Current (mA) 100 FIGURE 2-16: Frequency. Supply Current vs. 50 kHz 100 kHz 60 40 20 1000 Supply Current vs. 80 VDD = 12V 80 100 Frequency (kHz) Supply Current (mA) FIGURE 2-13: Capacitive Load. 6,800 pF 1000 kHz 200 kHz 500 kHz VDD = 12V 70 6,800 pF 60 3,300 pF 50 2,200 pF 40 1,000 pF 30 20 10 0 1000 470 pF 0 10000 10 Capacitive Load (pF) 50 VDD = 6V 45 40 35 30 25 20 1000 kHz 15 500 kHz 10 5 0 1000 FIGURE 2-17: Frequency. Supply Current vs. 40 50 kHz Supply Current (mA) Supply Current (mA) FIGURE 2-14: Capacitive Load. 1000 100 kHz 200 kHz Supply Current vs. VDD = 6V 6,800 pF 35 30 3,300 pF 2,200 pF 25 20 1,000 pF 15 10 5 470 pF 0 10000 10 Supply Current vs. © 2011 Microchip Technology Inc. 100 1000 Frequency (kHz) Capacitive Load (pF) FIGURE 2-15: Capacitive Load. 100 Frequency (kHz) FIGURE 2-18: Frequency. Supply Current vs. DS25006A-page 9 MCP14E6/7/8 2.0 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.65 VDD = 18V (V) Enable Hysteresis Threshold (V) Input Threshold (V) Note: Unless otherwise indicated, TA = +25°C with 4.5V ≤ VDD ≤ 18V. VHI VLO VDD = 12V 0.60 0.55 0.50 0.45 0.40 0.35 0.30 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 Temperature (°C) FIGURE 2-19: Temperature. FIGURE 2-22: Temperature. Input Threshold vs. Crossover Energy (A*sec) Input Threshold (V) Enable Hysteresis vs. 1.E-07 1.7 1.6 VHI 1.5 1.4 1.3 VLO 1.2 1.1 1.0 1.E-08 1.E-09 4 6 8 10 12 14 16 18 4 Supply Voltage (V) FIGURE 2-20: Voltage. 6 8 10 12 14 16 18 Supply Voltage(V) Input Threshold vs. Supply 1.8 Enable Threshold (V) 20 35 50 65 80 95 110 125 Temperature (°C) 1.8 1.7 5 VEN_H 1.6 1.5 Note: The values in this graph represent the loss seen by both drivers in a package during a complete cycle. For a single driver, divide the stated value by 2. For a single transition of a single driver, divide the stated value by 4. FIGURE 2-23: Supply Voltage. 1.4 Crossover Energy vs. 1.3 VEN_L 1.2 1.1 1.0 VDD = 12V -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (°C) FIGURE 2-21: Temeprature. DS25006A-page 10 Enable Threshold vs. © 2011 Microchip Technology Inc. MCP14E6/7/8 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE Symbol PDIP, SOIC, 6x5 DFN MCP14E6 MCP14E7 MCP14E8 1 ENB_A ENB_A ENB_A 2 IN A IN A IN A Input A 3 GND GND GND Ground 4 IN B IN B IN B Input B 5 OUT B OUT B OUT B 3.1 Description 6 VDD VDD VDD 7 OUT A OUT A OUT A 8 ENB_B ENB_B ENB_B 9 EP EP EP Enable A (ENB_A) Ouptut A Enable Output B Supply Input Output A Output B Enable Exposed Metal Pad (DFN package only). Exposed pad is electrically isolated. 3.5 Supply Input (VDD) The ENB_A pin is the enable control for Output A. This enable pin is internally pulled up to VDD for active-high operation and can be left floating for standard operation. When the ENB_A pin is pulled below the enable pin, Low Level Input Voltage (VEN_L), Output A will be in the OFF state, regardless of the input pin state. VDD is the bias supply input for the MOSFET driver and has a voltage range of 4.5V to 18V. This input must be decoupled to ground with a local ceramic capacitor. This bypass capacitor provides a localized lowimpedance path for the peak currents that are provided to the load. 3.2 3.6 Control Inputs A and B (IN A; IN B) The MOSFET driver inputs are a high-impedance TTL/CMOS compatible input. The inputs also have hysteresis between the high and low input levels, allowing them to be driven from slow rising and falling signals, and to provide noise immunity. 3.3 Ground (GND) Ground is the device return pin. The ground pin should have a low-impedance connection to the bias supply source return. High peak currents will flow out the ground pin when the capacitive load is being discharged. 3.4 Enable B (ENB_B) The ENB_B pin is the enable control for Output B. This enable pin is internally pulled up to VDD for active-high operation, and can be left floating for standard operation. When the ENB_B pin is pulled below the enable pin, Low-Level Input Voltage (VEN_L), Output B will be in the OFF state, regardless of the input pin state. 3.7 Exposed Metal Pad (EP) The exposed metal pad of the DFN package is not internally connected to any potential. Therefore, this pad can be connected to a ground plane, or other copper plane on a printed circuit board, to aid in heat removal from the package. Outputs A and B (OUT A; OUT B) Outputs, A and B, are CMOS push-pull outputs that are capable of sourcing and sinking 2.0A of peak current (VDD = 18V). The low output impedance ensures the gate of the MOSFET will stay in the intended state, even during large transients. © 2011 Microchip Technology Inc. DS25006A-page 11 MCP14E6/7/8 NOTES: DS25006A-page 12 © 2011 Microchip Technology Inc. MCP14E6/7/8 4.0 APPLICATION INFORMATION 4.1 General Information VDD = 18V 1 µF MOSFET drivers are high-speed, high-current devices which are intended to source/sink high-peak currents to charge/discharge the gate capacitance of external MOSFETs, or insulated gate bipolar transistors (IGBTs). In high-frequency switching power supplies, the Pulse-Width Modulation (PWM) controller may not have the drive capability to directly drive the power MOSFET. MOSFET drivers, like the MCP14E6/7/8 family, can be used to provide additional source/sink current capability. An additional degree of control has been added to the MCP14E6/7/8 family. There are seperate enable functions for each driver that allow for the immediate termination of the output pulse, regardless of the state of the input signal. 4.2 MOSFET Driver Timing The ability of a MOSFET driver to transition from a fully OFF state to a fully ON state are characterized by the drivers’ rise time (tR), fall time (tF) and propagation delays (tD1 and tD2). The MCP14E6/7/8 family of drivers can typically charge and discharge a 1000 pF load capacitance, in approximately 12 ns, along with a typical matched propagation delay of 45 ns. Figure 4-1 and Figure 4-2 show the test circuit and timing waveform used to verify the MCP14E6/7/8 timing. VDD = 18V 1 µF Input 0.1 µF Ceramic Output CL = 1000 pF Input MCP14E6 ½ MCP14E8 +5V Output CL = 1000 pF 90% Input 0V 10% 18V Output 0V FIGURE 4-1: Waveform. tD1 tF 90% 10% tD2 tR 90% 10% 0.1 µF Ceramic Input Output CL = 1000 pF Input Output CL = 1000 pF MCP14E6 ½ MCP14E8 +5V 90% Input 0V 18V 10% tD1 90% Output 10% 0V FIGURE 4-2: Waveform 4.3 tR tD2 90% tF 10% Non-Inverting Driver Timing Enable Function The ENB_A and ENB_B enable pins allow the independent control of OUT A and OUT B, respectively. They are active-high and are internally pulled up to VDD so that the default state is to enable the driver. These pins can be left floating for normal operation. When an enable pin voltage is above enable pin high threshold voltage, (VEN_H), that driver output is enabled and allowed to react to changes in the INPUT pin voltage state. Similarly, when the enable pin voltage falls below the enable pin low threshold voltage, (VEN_L), that driver output is disabled and does not respond to the changes in the INPUT pin voltage state. When the driver is disabled, the output goes to a low state. Refer to Table 4-1 for enable pin logic. The threshold voltages of the enable function are compatible with logic levels. Hysteresis is provided to help increase the noise immunity of the enable function, avoiding false triggers of the enable signal during driver switching. For robust designs, it is recommended that the slew rate of the enable pin signal be greater than 1V/ns. There are propagation delays associated with the driver receiving an enable signal and the output reacting. These propagation delays, tD3 and tD4, are graphically represented in Figure 4-3. Inverting Driver Timing © 2011 Microchip Technology Inc. DS25006A-page 13 MCP14E6/7/8 TABLE 4-1: ENABLE PIN LOGIC MCP14E6 ENB_A ENB_B IN A IN B OUT A H H H H L H H H L L H H L H H H H L L L L X X MCP14E7 OUT B OUT A OUT B L H H H L H L OUT A OUT B H L H L L L L H H H H L L H L L L L L L 4.5 5V ENB_x VEN_H 0V tD3 VDD PCB Layout Considerations Proper PCB layout is important in a high-current, fast switching circuit to provide proper device operation and robustness to the design. The PCB trace loop area and inductance should be minimized by the use of ground planes or trace under MOSFET gate drive signals, separate analog and power grounds, and local driver decoupling. VEN_L tD4 90% OUT x Placing a ground plane beneath the MCP14E6/7/8 will help as a radiated noise shield, as well as providing some heat sinking for power dissipated within the device. 4.6 10% 0V FIGURE 4-3: MCP14E8 Enable Timing Waveform. Power Dissipation The total internal power dissipation in a MOSFET driver is the summation of three separate power dissipation elements (Figure 4-1). EQUATION 4-1: P T = P L + PQ + P CC 4.4 Decoupling Capacitors Where: Careful layout and decoupling capacitors are highly recommended when using MOSFET drivers. Large currents are required to charge and discharge capacitive loads quickly. For example, approximately 1.8A are needed to charge a 1000 pF load with 18V in 10 ns. To operate the MOSFET driver over a wide frequency range, with low supply impedance, a ceramic and lowESR film capacitors are recommended to be placed in parallel between the driver, VDD and GND. A 1.0 µF low-ESR film capacitor and a 0.1 µF ceramic capacitor placed between pins, 6 and 3, should be used. These capacitors should be placed close to the driver to minimize the circuit board parasitics and provide a local source for the required current. PT = Total Power Dissipation PL = Load Power Dissipation PQ = Quiesent Power Dissipation PCC = Operating Power Dissipation 4.6.1 CAPACITIVE LOAD DISSIPATION The power dissipation caused by a capacitive load is a direct function of frequency, total capacitive load and supply voltage. The power lost in the MOSFET driver for a complete charging and discharging cycle of a MOSFET is: EQUATION 4-2: P L = f × C T × V DD 2 Where: f = Switching frequency CT = Total load capacitance VDD = MOSFET driver supply voltage DS25006A-page 14 © 2011 Microchip Technology Inc. MCP14E6/7/8 4.6.2 QUIESCENT POWER DISSIPATION The power dissipation associated with the quiescent current draw depends upon the state of the input pin. The MCP14E6/7/8 devices have a quiescent current draw with a Logic '1' on the input pin of 1 mA (typical) and 300 µA (typical) with a Logic '0'. The quiescent power dissipation is: 4.6.3 OPERATING POWER DISSIPATION The operating power dissipation occurs each time the MOSFET driver output transitions, because for a very short period of time, both MOSFETs in the output stage are ON, simultaneously. This cross-conduction current leads to a power dissipation described as: EQUATION 4-4: EQUATION 4-3: P Q = ( I QH × D + I QL × ( 1 – D ) ) × V DD Where: IQH = Quiescent Current in the High State D = Duty Cycle P CC = CC × f × V DD Where: CC = f = VDD = Cross-Conduction Constant (A * sec) Switching Frequency MOSFET Driver Supply Voltage IQL = Quiescent Current in the Low State VDD = MOSFET Driver Supply Voltage © 2011 Microchip Technology Inc. DS25006A-page 15 MCP14E6/7/8 NOTES: DS25006A-page 16 © 2011 Microchip Technology Inc. MCP14E6/7/8 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 8-Lead DFN-S (5x6x1 mm) XXXXXXX XXXXXXX YYWW NNN 8-Lead PDIP 8-Lead SOIC (.150”) Legend: XX...X Y YY WW NNN e3 * Note: MCP14E6 e3 E/MF^^ 1111 256 Example XXXXXXXX XXXXXNNN YYWW XXXXXXXX XXXXYYWW NNN Example MCP14E6 e3 256 E/P^^ 1111 Example MCP14E6E e3 1111 SN^^ 256 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2011 Microchip Technology Inc. DS25006A-page 17 MCP14E6/7/8 !"# $ 3&'!&"& +#*!( !!& + %&&#& && 244***' '4 + e D L b N N K E2 E EXPOSED PAD NOTE 1 1 2 2 NOTE 1 1 D2 BOTTOM VIEW TOP VIEW A A3 A1 NOTE 2 5&! '!6'&! 7"')%! 66-- 7 7 78 9 : & 8 ;& : 01 :/ &#%% / 1&&+!! , -3 8 6& /01 8 <#& - -$ !##6& , -$ !##<#& - , 1&&<#& ) ,/ : 1&&6& 6 / / 01 1&&&-$ !## = > $ !"#$%&"' ()"&'"!&)&#*&&&# +' '$ !#&)!&#! , +!!*!"&# '!#& -./ 012 0!'!&$& "!**&"&&! -32 %'!("!"*&"&&(%%'& " !! > * 10 DS25006A-page 18 © 2011 Microchip Technology Inc. MCP14E6/7/8 !"# %&' "()%*+, $ 3&'!&"& +#*!( !!& + %&&#& && 244***' '4 + D D1 e b N L N K E E2 E1 EXPOSED PAD NOTE 1 2 2 1 1 NOTE 1 D2 TOP VIEW BOTTOM VIEW φ A2 A A1 A3 NOTE 2 5&! '!6'&! 7"')%! 66-- 7 7 78 9 : & 8 ;& > :/ ##++!! > / : &#%% / 0!+!! , -3 8 6& 01 ##+6& -$ !##6& 8 <#& - ##+<#& - -$ !##<#& - , ) ,/ 1&&6& 6 / / 1&&&-$ !## = > > #%& > > ? 1&&<#& 01 01 ,:/ / /01 /01 $ !"#$%&"' ()"&'"!&)&#*&&&# +' '$ !#&)!&#! , '!#& -./ 012 0!'!&$& "!**&"&&! -32 %'!("!"*&"&&(%%'& " !! * 1,0 © 2011 Microchip Technology Inc. DS25006A-page 19 MCP14E6/7/8 $ 3&'!&"& +#*!( !!& + %&&#& && 244***' '4 + DS25006A-page 20 © 2011 Microchip Technology Inc. MCP14E6/7/8 (--.// !(# $ 3&'!&"& +#*!( !!& + %&&#& && 244***' '4 + N NOTE 1 E1 1 3 2 D E A2 A L A1 c e eB b1 b 5&! '!6'&! 7"')%! 71;- 7 7 78 9 : & && > > ##++!! / , / 0!&& / > > "#&"#<#& - , ,/ ##+<#& - / : 8 6& ,: ,/ && 6 / , / 6#+!! : / ) ) : 0 > > 5 6#<#& 6*6#<#& 8 * @ 01 , $ !"#$%&"' ()"&'"!&)&#*&&&# @%&1&!& , '!!#-#&"#'#%! &"!!#%! &"!!!&$#A !# '!#& -./ 0120!'!&$& "!**&"&&! * 1:0 © 2011 Microchip Technology Inc. DS25006A-page 21 MCP14E6/7/8 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS25006A-page 22 © 2011 Microchip Technology Inc. MCP14E6/7/8 Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging © 2011 Microchip Technology Inc. DS25006A-page 23 MCP14E6/7/8 " 0 -"112.34/ !"0(&# $ 3&'!&"& +#*!( !!& + %&&#& && 244***' '4 + DS25006A-page 24 © 2011 Microchip Technology Inc. MCP14E6/7/8 APPENDIX A: REVISION HISTORY Revision A (March 2011) • Original Release of this Document. © 2011 Microchip Technology Inc. DS25006A-page 25 MCP14E6/7/8 NOTES: DS25006A-page 26 © 2011 Microchip Technology Inc. MCP14E6/7/8 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. -X /XX Device Temperature Range Package Examples: a) b) Device: MCP14E6: MCP14E6T: MCP14E7: MCP14E7T: MCP14E8: MCP14E8T: Temperature Range: E = 2.0A Dual MOSFET Driver, Inverting 2.0A Dual MOSFET Driver, Inverting, Tape and Reel (DFN and SOIC only) 2.0A Dual MOSFET Driver, Non-Inverting 2.0A Dual MOSFET Driver, Non-Inverting, Tape and Reel (DFN and SOIC only) 2.0A Dual MOSFET Driver, Complementary 2.0A Dual MOSFET Driver, Complementary, Tape and Reel (DFN and SOIC only) c) d) -40°C to +125°C e) Package: * MF P SN = Dual, Flat, No Lead (6x5 mm Body), 8-lead = Plastic DIP, (300 mil body), 8-lead = Plastic SOIC (150 mil Body), 8-lead a) b) c) a) b) c) © 2011 Microchip Technology Inc. MCP14E6-E/MF: 2.0A Dual Inverting MOSFET Driver, Extended Temperature, 8LD 6x5 DFN package. MCP14E6T-E/MF: 2.0A Dual Inverting MOSFET Driver, Extended Temperature, Tape and Reel 8LD 6x5 DFN package. MCP14E6-E/P: 2.0A Dual Inverting MOSFET Driver, Extended Temperature, 8LD PDIP package. MCP14E6-E/SN: 2.0A Dual Inverting MOSFET Driver, Extended Temperature, 8LD SOIC package. MCP14E6T-E/SN: 2.0A Dual Inverting MOSFET Driver, Tape and Reel, Extended Temperature, 8LD SOIC package. MCP14E7-E/MF: 2.0A Dual Inverting MOSFET Driver, Extended Temperature, 8LD 6x5 DFN package. MCP14E7-E/P: 2.0A Dual Inverting MOSFET Driver, Extended Temperature, 8LD PDIP package. MCP14E7-E/SN: 2.0A Dual Inverting MOSFET Driver, Extended Temperature, 8LD SOIC package. MCP14E8-E/MF: 2.0A Dual Inverting MOSFET Driver, Extended Temperature, 8LD 6x5 DFN package. MCP14E8-E/P: 2.0A Dual Inverting MOSFET Driver, Extended Temperature, 8LD PDIP package. MCP14E8-E/SN: 2.0A Dual Inverting MOSFET Driver, Extended Temperature, 8LD SOIC package. DS25006A-page 27 MCP14E6/7/8 NOTES: DS25006A-page 28 © 2011 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2011, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 978-1-61341-023-3 Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2011 Microchip Technology Inc. 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