TPS61200 TPS61201 TPS61202 (3,25 mm x 3,25 mm) www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 LOW INPUT VOLTAGE SYNCHRONOUS BOOST CONVERTER WITH 1.3-A SWITCHES • FEATURES 1 • More than 90% Efficiency at – 300 mA Output Current at 3.3 V (VIN ≥ 2.4 V) – 600 mA Output Current at 5 V (VIN ≥ 3 V) • Automatic Transition between Boost Mode and Down Conversion Mode • Device Quiescent Current less than 55 µA • Startup into Full Load at 0.5 V Input Voltage • Operating Input Voltage Range from 0.3 V to 5.5 V • Programmable Undervoltage Lockout Threshold • Output Short Circuit Protection Under all Operating Conditions • Fixed and Adjustable Output Voltage Options from 1.8 V to 5.5 V 2 • • • • Power Save Mode for Improved Efficiency at Low Output Power Forced fixed Frequency Operation possible Load Disconnect During Shutdown Overtemperature Protection Small 3 mm x 3 mm QFN-10 Package APPLICATIONS • • • • • • • All Single-Cell, Two-Cell and Three-Cell Alkaline, NiCd or NiMH or Single-Cell Li Battery Powered Products Fuel Cell And Solar Cell Powered Products Portable Audio Players PDAs Cellular Phones Personal Medical Products White LED's DESCRIPTION The TPS6120x devices provide a power supply solution for products powered by either a single-cell, two-cell, or three-cell alkaline, NiCd or NiMH, or one-cell Li-Ion or Li-polymer battery. It is also used in fuel cell or solar cell powered devices where the capability of handling low input voltages is essential. Possible output currents are depending on the input to output voltage ratio. The devices provides output currents up to 600 mA at a 5-V output while using a single-cell Li-Ion or Li-Polymer battery, and discharge it down to 2.5 V. The boost converter is based on a fixed frequency, pulse-width-modulation (PWM) controller using synchronous rectification to obtain maximum efficiency. At low load currents, the converter enters the Power Save mode to maintain a high efficiency over a wide load current range. The Power Save mode can be disabled, forcing the converter to operate at a fixed switching frequency. The maximum average input current is limited to a value of 1500 mA. The output voltage can be programmed by an external resistor divider, or is fixed internally on the chip. The converter can be disabled to minimize battery drain. During shutdown, the load is completely disconnected from the battery. The device is packaged in a 10-pin QFN PowerPAD™ package (DRC) measuring 3 mm x 3 mm. L1 2.2 mH VIN 0.3 V to 5.5 V VIN C1 L VOUT 10 mF EN VAUX PS UVLO FB GND PGND C3 R1 C2 10 mF 0.1 mF VOUT 1.8 V to 5.5 V R2 TPS61200 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2008, Texas Instruments Incorporated TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. AVAILABLE DEVICE OPTIONS (1) TA OUTPUT VOLTAGE DC/DC PACKAGE MARKING Adjustable BRR 3.3 V BRS 5V BRT 5V CER –40°C to 85°C (1) (2) (3) PACKAGE (2) PART NUMBER (3) TPS61200DRC TPS61201DRC 10-Pin QFN TPS61202DRC TPS61202DSC Contact the factory to check availability of other fixed output voltage versions. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. The DRC and the DSC package are available taped and reeled. Add R suffix to device type (e.g., TPS61200DRCR or TPS61202DSCR) to order quantities of 3000 devices per reel. It is also available in minireels. Add a T suffix to the device type (i.e. TPS61200DRCT or TPS61202DSCT) to order quantities of 250 devices per reel. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) TPS6120x UNIT VI Input voltage range on VIN, L, VAUX, VOUT, PS, EN, FB, UVLO – 0.3 to 7 V TJ Operating junction temperature range –40 to 150 °C Tstg Storage temperature range –65 to 150 °C 4 kV Human Body Model (HBM) ESD Machine Model (MM) (2) (2) Charged Device Model (CDM) (2) (1) (2) 200 V 1.5 kV Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ESD testing is performed according to the respective JESD22 JEDEC standard. DISSIPATION RATINGS TABLE PACKAGE THERMAL RESISTANCE ΘJA POWER RATING TA ≤ 25°C DERATING FACTOR ABOVE TA = 25°C DRC 48.7 °C/W 2054 mW 21 mW/°C RECOMMENDED OPERATING CONDITIONS MIN VSS Supply voltage at VIN 0.3 TA Operating free air temperature range TJ Operating virtual junction temperature range 2 Submit Documentation Feedback NOM MAX UNIT 5.5 V –40 85 °C –40 125 °C Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS61200 TPS61201 TPS61202 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 ELECTRICAL CHARACTERISTICS over recommended free-air temperature range and over recommended input voltage range (typical at an ambient temperature range of 25°C) (unless otherwise noted) DC/DC STAGE PARAMETER TEST CONDITIONS MIN TYP 0.3 MAX UNIT VI Input voltage range VI Minimum input voltage at startup VO TPS61200 output voltage range 1.8 5.5 V VFB TPS61200 feedback voltage 495 500 505 mV VOUT TPS61201 output voltage VIN < VOUT, PS = 1 3.27 3.3 3.33 V VOUT TPS61202 output voltage VIN < VOUT, PS = 1 4.95 5.0 f Oscillator frequency ISW average switch current limit VOUT = 3.3 V Rectifying switch on resistance VOUT = 3.3 V 180 Main switch on resistance VOUT = 3.3 V 150 Line regulation VIN < VOUT, PS = 1 0.1% 0.5% Load regulation VIN < VOUT, PS = 1 0.1% 0.5% 1250 VIN Quiescent current IO = 0 mA, VEN = VIN = 1.2 V, VOUT = 3.3 V, VAUX = 3.3 V PS = 0 VOUT VAUX Shutdown current 1200 VIN VEN = 0 V, VIN = 1.2 V VAUX Leakage current into L VEN = 0 V, VIN = 1.2 V, VL = 1.2 V 1350 5.5 V 0.5 V 5.05 V 1650 kHz 1500 mA mΩ mΩ 1 2 µA 50 70 µA 4 6 µA 0.5 1.5 µA 1 2 µA 0.01 1 µA CONTROL STAGE PARAMETER TEST CONDITIONS VAUX Auxiliary Output Voltage VIL EN input low voltage VIN < 0.8 V VIH EN input high voltage VIN < 0.8 V VIL EN input low voltage 0.8 V ≤ VIN ≤ 1.5 V VIH EN input high voltage 0.8 V ≤ VIN ≤ 1.5 V VIL EN input low voltage VIN > 1.5 V VIH EN input high voltage VIN > 1.5 V VIL PS input low voltage VIH PS input high voltage MIN TYP 2.4 MAX UNIT 5.5 V 0.1 × VIN V 0.9 × VIN V 0.2 × VIN 0.8 × VIN V V 0.4 1.2 V V 0.4 V 0.01 0.1 µA 1.2 V EN, PS input current Clamped on GND or VIN (VIN < 1.5 V) VUVLO Undervoltage lockout threshold for turn off VUVLO decreasing 235 250 265 mV VUVLO Undervoltage lockout threshold for turn on VUVLO increasing 330 350 370 mV UVLO input current VUVLO = 0.5 V 0.3 µA Overvoltage protection threshold 5.5 7 V Overtemperature protection 140 °C Overtemperature hysteresis 20 °C Copyright © 2007–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS61200 TPS61201 TPS61202 3 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 PIN ASSIGNMENTS DRC PACKAGE (TOP VIEW) VAUX VOUT L PGND VIN FB GND PS UVLO EN Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION EN 6 I Enable input (1: enabled, 0: disabled). FB 10 I Voltage feedback of adjustable versions, must be connected to VOUT at fixed output voltage versions GND 9 PS 8 I Enable/disable Power Save mode (1 : disabled, 0: enabled) L 3 I Connection for Inductor UVLO 7 I Undervoltage lockout comparator input, must be connected to VAUX if not used PGND 4 VIN 5 VOUT VAUX PowerPAD™ 4 Control / logic ground Power ground I Boost converter input voltage 2 O Boost converter output 1 O/I Supply voltage for control stage Must be soldered to achieve appropriate power dissipation. Should be connected to PGND. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS61200 TPS61201 TPS61202 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 FUNCTIONAL BLOCK DIAGRAM (TPS61200) L VOUT VCC Control VAUX Current Sensor VOUT PGND VIN VCC Gate Control FB Modulator VREF PS Oscillator Device Control EN UVLO Temperature Control GND PGND PGND PARAMETER MEASUREMENT INFORMATION L1 VIN VIN C1 L VOUT VOUT EN VAUX PS R1 C2 C3 UVLO FB GND PGND R2 TPS61200 List of Components: COMPONENT REFERENCE PART NUMBER C1 C2 L1 LPS3015-222ML Copyright © 2007–2008, Texas Instruments Incorporated MANUFACTURER VALUE any 10 µF, X7R Ceramic any 2 x 10 µF, X7R Ceramic Coilcraft 2.2 µH Submit Documentation Feedback Product Folder Link(s): TPS61200 TPS61201 TPS61202 5 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 TYPICAL CHARACTERISTICS Table of Graphs FIGURE Maximum output current Efficiency Output voltage Waveforms vs Input voltage 1 vs Output current (TPS61200), Power Save Enabled 2 vs Output current (TPS61200), Power Save Disabled 3 vs Output current (TPS61201), Power Save Enabled 4 vs Output current (TPS61201), Power Save Disabled 5 vs Output current (TPS61202), Power Save Enabled 6 vs Output current (TPS61202), Power Save Disabled 7 vs Input voltage (TPS61201), Power Save Enabled 8 vs Input voltage (TPS61201), Power Save Disabled 9 vs Input voltage (TPS61202), Power Save Enabled 10 vs Input voltage (TPS61202), Power Save Disabled 11 vs Output current (TPS61201) 12 vs Output current (TPS61202) 13 Output Voltage TPS61201, Power Save Mode Disabled 14 Output Voltage TPS61202, Power Save Mode Disabled 15 Output Voltage TPS61201, Power Save Mode Enabled 16 Output Voltage TPS61202, Power Save Mode Enabled 17 TPS61201 Load Transient Response 18 TPS61202 Load Transient Response 19 TPS61201 Line Transient Response 20 TPS61202 Line Transient Response 21 TPS61201 Startup after Enable 22 TPS61202 Startup after Enable 23 EFFICIENCY vs OUTPUT CURRENT 2000 100 1800 90 1600 TPS61200, VO = 1.8 V 80 1400 TPS61200 VO = 1.8 V, Power Save Enabled VI = 1.8 V 70 TPS61201, VO = 3.3 V 1200 1000 TPS61202, VO = 5 V 800 Efficiency - % Maximum Output Current - mA MAXIMUM OUTPUT CURRENT vs INPUT VOLTAGE 60 50 600 30 400 20 200 10 0 0.2 0.6 1 1.4 1.8 2.2 2.6 3 3.4 3.8 4.2 4.6 5 5.4 VI - Input Voltage - V VI = 0.9 V 40 0 0.10 1 10 100 IO - Output Current - mA Figure 1. 6 Submit Documentation Feedback 1k 10 k Figure 2. Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS61200 TPS61201 TPS61202 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 EFFICIENCY vs OUTPUT CURRENT 100 100 VI = 1.8 V 80 70 70 Efficiency - % 80 60 50 VI = 0.9 V 40 50 VI = 0.9 V 40 20 20 10 10 10 100 IO - Output Current - mA 0 0.10 10 k EFFICIENCY vs OUTPUT CURRENT EFFICIENCY vs OUTPUT CURRENT 100 VI = 2.4 V 90 80 80 70 70 60 VI = 1.8 V 50 VI = 0.9 V 10 10 10 k VI = 1.8 V VI = 0.9 V 20 1k VI = 3.6 V VI = 2.4 V 40 20 10 100 IO - Output Current - mA 0 0.10 TPS61202 VO = 5 V, Power Save Enabled 1 10 100 IO - Output Current - mA Figure 5. Copyright © 2007–2008, Texas Instruments Incorporated 10 k 50 30 1 1k 60 30 0 0.10 10 100 IO - Output Current - mA Figure 4. TPS61201 VO = 3.3 V, Power Save Disabled 40 1 Figure 3. 100 90 1k VI = 2.4 V VI = 1.8 V 30 1 TPS61201 VO = 3.3 V, Power Save Enabled 60 30 0 0.10 Efficiency - % 90 Efficiency - % Efficiency - % 90 TPS61200 VO = 1.8 V, Power Save Disabled EFFICIENCY vs OUTPUT CURRENT 1k 10 k Figure 6. Submit Documentation Feedback Product Folder Link(s): TPS61200 TPS61201 TPS61202 7 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 EFFICIENCY vs OUTPUT CURRENT 100 80 80 70 70 60 VI = 1.8 V 50 VI = 0.9 V 40 30 IO = 100 mA 60 50 IO = 10 mA 40 20 TPS61202 VO = 5 V, Power Save Disabled 10 0 0.10 1 10 100 IO - Output Current - mA 90 1k 0 10 k 0 0.5 1 1.5 2 2.5 3 3.5 4 VI - Input Voltage - V Figure 7. Figure 8. EFFICIENCY vs INPUT VOLTAGE EFFICIENCY vs INPUT VOLTAGE 4.5 5 5.5 100 IO = 500 mA IO = 1000 mA 70 70 Efficiency - % 80 60 50 IO = 100 mA 40 IO = 10 mA 30 20 1 1.5 IO = 1000 mA 60 50 IO = 10 mA 40 20 2 2.5 3 3.5 4 VI - Input Voltage - V 4.5 5 5.5 TPS61202 VO = 5 V, Power Save Enabled 10 0 0 0.5 IO = 100 mA 30 TPS61201 VO = 3.3 V, Power Save Disabled 10 IO = 500 mA 90 80 0 TPS61201 VO = 3.3 V, Power Save Enabled 10 100 0 0.5 1 1.5 Figure 9. 8 IO = 1000 mA 30 20 Efficiency - % IO = 500 mA 90 Efficiency - % Efficiency - % 100 VI = 3.6 V VI = 2.4 V 90 EFFICIENCY vs INPUT VOLTAGE Submit Documentation Feedback 2 2.5 3 3.5 4 VI - Input Voltage - V 4.5 5 5.5 Figure 10. Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS61200 TPS61201 TPS61202 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 EFFICIENCY vs INPUT VOLTAGE 100 OUTPUT VOLTAGE vs OUTPUT CURRENT 3.33 IO = 500 mA VI = 2.4 V 90 80 IO = 1000 mA VO - Output Voltage - V Efficiency - % 70 IO = 100 mA 60 50 IO = 10 mA 40 30 20 TPS61202 VO = 5 V, Power Save Disabled 10 0 0.5 5.05 1 1.5 2 2.5 3 3.5 4 VI - Input Voltage - V 4.5 TPS61201 VO = 3.3 V, Power Save Disabled 5 5.5 10 100 IO - Output Current - mA 1000 Figure 11. Figure 12. OUTPUT VOLTAGE vs OUTPUT CURRENT OUTPUT VOLTAGE, POWER SAVE MODE DISABLED TPS61202 VO = 5 V, Power Save Disabled VI = 2.4 V TPS61201 VO = 3.3 V, Power Save Disabled VI = 1.8 V, RL = 11W 5 Inductor Current 100 mA/div, AC VO - Output Voltage - V 3.27 1 Output Voltage 20 mV/div, AC 0 3.30 4.95 1 10 100 IO - Output Current - mA 100 t - Time - 0.5 ms/div Figure 13. Copyright © 2007–2008, Texas Instruments Incorporated Figure 14. Submit Documentation Feedback Product Folder Link(s): TPS61200 TPS61201 TPS61202 9 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 OUTPUT VOLTAGE IN POWER SAVE MODE VI = 1.8 V, RL = 33 kW VI = 1.8 V, RL = 17W Output Voltage 20 mV/div, AC TPS61202 VO = 5 V, Power Save Disabled Inductor Current 100 mA/div, AC Inductor Current 200 mA/div, AC Output Voltage 50 mV/div, AC OUTPUT VOLTAGE, POWER SAVE MODE DISABLED TPS61201 VO = 3.3 V, Power Save Enabled t - Time - 1 ms/div t - Time - 2 ms/div Figure 16. Figure 15. LOAD TRANSIENT RESPONSE Output Voltage 50 mV/div, AC VI = 1.8 V, RL = 55 kW TPS61201 VO = 3.3 V t - Time - 100 ms/div t - Time - 1 ms/div Figure 18. Figure 17. 10 VI = 1.8 V, IL = 300 mA to 400 mA Output Current 50 mA/div Inductor Current 200 mA/div, AC Output Voltage 20 mV/div, AC OUTPUT VOLTAGE IN POWER SAVE MODE TPS61202 VO = 5 V, Power Save Enabled Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS61200 TPS61201 TPS61202 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 LINE TRANSIENT RESPONSE VI = 1.8 V, IL = 150 mA to 250 mA VI = 1.8 V to 2.4 V, RL = 11W Input Voltage 500 mV/div, AC TPS61202 VO = 5 V Output Voltage 50 mV/div, AC Output Current 100 mA/div Output Voltage 100 mV/div, AC LOAD TRANSIENT RESPONSE TPS61201 VO = 3.3 V t - Time - 1 ms/div Figure 19. t - Time - 2 ms/div Figure 20. LINE TRANSIENT RESPONSE START-UP AFTER ENABLE VI = 3 V to 3.6 V, RL = 17W Input Voltage 500 mV/div, AC Enable 5 V/div, DC Voltage at VAUX 2 V/div, DC Output Voltage 20 mV/div, AC Output Voltage 2 V/div, DC Voltage at L 2 V/div, DC Inductor Current 500 mA/div, DC TPS61202 VO = 5 V TPS61201 VO = 3.3 V t - Time - 2 ms/div VI = 1.8 V, RL = 11W t - Time - 100 ms/div Figure 21. Copyright © 2007–2008, Texas Instruments Incorporated Figure 22. Submit Documentation Feedback Product Folder Link(s): TPS61200 TPS61201 TPS61202 11 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 START-UP AFTER ENABLE Enable 5 V/div, DC Voltage at VAUX 2 V/div, DC Output Voltage 2 V/div, DC Voltage at L 2 V/div, DC Inductor Current 500 mA/div, DC TPS61201 VO = 3.3 V VI = 1.8 V, RL = 17W t - Time - 100 ms/div Figure 23. 12 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS61200 TPS61201 TPS61202 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 DETAILED DESCRIPTION CONTROLLER CIRCUIT The controlling circuit of the device is based on an average current mode topology. The average inductor current is regulated by a fast current regulator loop which is controlled by a voltage control loop. The controller also uses input and output voltage feedforward. Changes of input and output voltage are monitored and can immediately change the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier gets its feedback input from the FB pin. For adjustable output voltages, a resistive voltage divider must be connected to that pin. For fixed output voltages, FB must be connected to the output voltage to directly sense the voltage. Fixed output voltage versions use a trimmed internal resistive divider. The feedback voltage is compared with the internal reference voltage to generate a stable and accurate output voltage. The controller circuit also senses the average input current as well as the peak input current. Thus, the maximum input power is controlled as well as the maximum peak current to achieve a safe and stable operation under all possible conditions. To protect the device from overheating, an internal temperature sensor is implemented. Synchronous Operation The device uses three internal N-channel MOSFETs to maintain synchronous power conversion at all possible operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power range. To avoid ground shift problems due to the high currents in the switches, two separate ground pins GND and PGND are used. The reference for all control functions is the GND pin. The power switches are connected to PGND. Both grounds must be connected on the PCB at only one point ideally close to the GND pin. Due to the 3-switch topology, the load is always disconnected from the input during shutdown of the converter. Down Regulation A boost converter only regulates output voltages which are higher than the input voltage. This device operates differently. For example, it is able to regulate 3 V at the output with two fresh alkaline cells at the input having a total cell voltage of 3.2 V. Another example is powering white LEDs with a forward voltage of 3.6 V from a fully charged Li-Ion cell with an output voltage of 4.2 V. To control these applications properly, a Down Conversion mode is implemented. If the input voltage reaches or exceeds the output voltage, the converter automatically changes to a Down Conversion mode. In this mode, the control circuit changes the behavior of the two rectifying switches. While continuing switching it sets the voltage drop across the rectifying switches as high as needed to regulate the output voltage. This means the power losses in the converter increase. This must be taken into account for thermal consideration. Power Save Mode The Power Save (PS) pin can be used to select different operation modes. To enable Power Save mode the PS pin must be set low. Power Save mode is used to improve efficiency at light load. If Power Save mode is enabled, the converter stops operating if the average inductor current decreases below about 300 mA and the output voltage is at or above its nominal value. If the output voltage decreases below its nominal value, the device ramps up the output voltage again by starting operation using a programmed average inductor current higher than required by the current load condition. Operation can last for one or several pulses. The converter stops operating once the conditions for stopping operation are met again. The Power Save mode can be disabled by programming high at the PS pin. In Down Conversion mode, Power Save mode is always enabled and the device cannot be forced into fixed frequency operation at light loads. The PS input supports standard logic thresholds. Device Enable The device is put into operation when EN is set high. It is put into a Shutdown mode when EN is set to GND. In Shutdown mode, the regulator stops switching, all internal control circuitry including the low-battery comparator is switched off, and the load is disconnected from the input. This also means that the output voltage can drop below the input voltage during shutdown. During start-up of the converter, the duty cycle and the peak current are limited in order to avoid high peak currents drawn from the battery. Copyright © 2007–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS61200 TPS61201 TPS61202 13 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 Softstart and Short-Circuit Protection After being enabled, the device starts operating. At first it keeps the main output VOUT disconnected, and charges the capacitor at VAUX. If the capacitor at VAUX is charged to about 2.5 V, the device switches to normal operation. This means VOUT is turned on and the capacitor at VOUT is charged while the load connected to the device is supplied. To ramp up the output voltage in a controlled way, the average current limit is set to 400 mA and rise proportional to the increase of the output voltage. At an output voltage of about 1.2 V, the current limit is at its nominal value. If the output voltage does not increase, the current limit will not increase. There is no timer implemented. Thus the output voltage overshoot at startup, as well as the inrush current, is kept at a minimum. The device ramps up the output voltage in a controlled manner even if a large capacitor is connected at the output. When the output voltage does not increase above 1.2 V, the device assumes a short-circuit at the output, and keeps the current limit low to protect itself and the application. When there is a short at the output during operation, the current limit is decreased accordingly. Undervoltage Lockout An undervoltage lockout function prevents the main output at VOUT from being supplied if the voltage at UVLO drops below 0.25 V. When using a resistive divider at the voltage to be monitored, for example the supply voltage, any threshold for the monitored voltage can be programmed. If in undervoltage lockout mode, the device still maintains its supply voltage at VAUX, but it is not turned off until EN is programmed low. This undervoltage lockout function is implemented in order to prevent the malfunctioning of the converter. Overtemperature Protection The device has a built-in temperature sensor which monitors the internal IC temperature. If the temperature exceeds the programmed threshold (see electrical characteristics table), the device stops operating. As soon as the IC temperature has decreased below the programmed threshold, it starts operating again. There is a built-in hysteresis to avoid unstable operation at IC temperatures at the overtemperature threshold. 14 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS61200 TPS61201 TPS61202 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 APPLICATION INFORMATION DESIGN PROCEDURE The TPS6120x DC/DC converters are intended for systems powered by a single up to triple cell Alkaline, NiCd, NiMH battery with a typical terminal voltage between 0.7 V and 5.5 V. They can also be used in systems powered by one-cell Li-Ion or Li-Polymer with a typical voltage between 2.5 V and 4.2 V. Additionally, any other voltage source like solar cells or fuel cells with a typical output voltage between 0.3 V and 5.5 V can power systems where the TPS6120x is used. Programming the Output Voltage Within the TPS6120X family, there are fixed and adjustable output voltage versions available. To properly configure the fixed output voltage devices, the FB pin is used to sense the output voltage. This means that it must be connected directly to VOUT. At the adjustable output voltage versions, an external resistor divider is used to adjust the output voltage. The resistor divider must be connected between VOUT, FB and GND. When the output voltage is regulated properly, the typical value of the voltage at the FB pin is 500 mV. The maximum recommended value for the output voltage is 5.5 V. The current through the resistive divider should be about 100 times greater than the current into the FB pin. The typical current into the FB pin is 0.01 µA, and the voltage across the resistor between FB and GND, R2, is typically 500 mV. Based on those two values, the recommended value for R2 should be lower than 500 kΩ, in order to set the divider current at 1 µA or higher. It is recommended to keep the value for this resistor in the range of 200 kΩ. The value of the resistor connected between VOUT and FB, R1, depending on the needed output voltage (VOUT), can be calculated using Equation 1: æV ö R1 = R2 x ç OUT - 1÷ è VFB ø (1) If as an example, an output voltage of 3.3 V is needed, a 1-MΩ resistor should be chosen for R1 when for R2 a 180-kΩ has been selected. L1 VIN VIN C1 L VOUT VOUT R3 EN VAUX PS R1 C2 C3 UVLO FB R4 GND PGND R2 TPS61200 Figure 24. Typical Application Circuit for Adjustable Output Voltage Option Programming the UVLO Threshold Voltage The UVLO input can be used to shut down the main output if the supply voltage is getting too low. The internal reference threshold is typically 250 mV. If the supply voltage should cause the shutdown when it is dropping below 250 mV, it can be connected directly to the UVLO pin. If the shutdown has already happen at higher voltages, a resistor divider can be used. R3 and R4 in Figure 24 show an example of how to monitor the input voltage of the circuit. The current through the resistive divider should be about 100 times greater than the current into the UVLO pin. The typical current into the UVLO pin is 0.01 µA, and the voltage across R4 is equal to the UVLO voltage threshold that is generated on-chip, which has a value of 250 mV. The recommended value for R4 is; therefore, in the range of 250 kΩ. From this, the value of resistor R3, depending on the desired shutdown voltage VINMIN, can be calculated using Equation 2. Copyright © 2007–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS61200 TPS61201 TPS61202 15 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 æV ö R3 = R4 x çç INMIN - 1÷÷ è VUVLO ø (2) Inductor Selection To make sure that the TPS6120X devices can operate, an inductor must be connected between pin VIN and pin L. To estimate the minimum inductance value Equation 3 can be used. ms LMIN = VIN x 0.5 A (3) In Equation 3, the minimum inductance, LMIN, for boost mode operation is calculated. VIN is the maximum input voltage. The recommended inductor value range is between 1.5 µH and 4.7 µH. The minimum inductor value should not be below 1.5 µH, even if Equation 3 yields in something lower. Using 2.2 µH is recommended anyway for getting best performance over the whole input and output voltage range. With the chosen inductance value, the peak current for the inductor in steady state operation can be calculated. Equation 4 shows how to calculate the peak current I. ILMAX = VIN x (VOUT - VIN ) VOUT x IOUT + 0.8 x VIN 2 x VOUT x f x L (4) This would be the critical value for the current rating for selecting the inductor. It also needs to be taken into account that load transients and error conditions may cause higher inductor currents. The following inductor series from different suppliers have been used with TPS6120x converters: Table 1. List of Inductors VENDOR Coilcraft INDUCTOR SERIES LPS3015 LPS4012 Murata LQH3NP Tajo Yuden NR3015 Wurth Elektronik WE-TPC Typ S Capacitor Selection Input Capacitor At least a 4.7 µF input capacitor is recommended to improve transient behavior of the regulator and EMI behavior of the total power supply circuit. A ceramic capacitor placed as close as possible to the VIN and PGND pins of the IC is recommended. Output Capacitor For the output capacitor, it is recommended to use small ceramic capacitors placed as close as possible to the VOUT and PGND pins of the IC. If, for any reason, the application requires the use of large capacitors which can not be placed close to the IC, using a smaller ceramic capacitor in parallel to the large one is recommended. This small capacitor should be placed as close as possible to the VOUT and PGND pins of the IC. To get an estimate of the recommended minimum output capacitance, Equation 5 can be used. mF COUT = 5 x L x mH (5) A capacitor with a value in the range of the calculated minimum should be used. This is required to maintain control loop stability. There are no additional requirements regarding minimum ESR. There is also no upper limit for the output capacitance value. Larger capacitors cause lower output voltage ripple as well as lower output voltage drop during load transients. 16 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TPS61200 TPS61201 TPS61202 TPS61200 TPS61201 TPS61202 www.ti.com SLVS577B – MARCH 2007 – REVISED FEBRUARY 2008 Capacitor at VAUX Between the VAUX pin and GND a capacitor must be connected. This capacitor is used to maintain and filter the control supply voltage. It is charged during startup and before the main output VOUT is turned on. To ensure stable operation, using at least 0.1µF is recommended. At output voltages below 2.5 V, the capacitance should be in the range of 1 µF. Since this capacitor is also used as a snubber capacitor for the main switch, using a ceramic capacitor with low ESR is important. Layout Considerations As for all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground tracks. The input and output capacitor, as well as the inductor should be placed as close as possible to the IC. Use a common ground node for power ground and a different one for control ground to minimize the effects of ground noise. Connect these ground nodes at any place close to one of the ground pins of the IC. The feedback divider should be placed as close as possible to the control ground pin of the IC. To lay out the control ground, it is recommended to use short traces as well, separated from the power ground traces. This avoids ground shift problems, which can occur due to superimposition of power ground current and control ground current. THERMAL INFORMATION Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added heat sinks and convection surfaces, and the presence of other heat-generating components affect the power-dissipation limits of a given component. Three basic approaches for enhancing thermal performance are listed below. • Improving the power dissipation capability of the PCB design • Improving the thermal coupling of the component to the PCB • Introducing airflow in the system The maximum recommended junction temperature (TJ) of the TPS6120x devices is 125°C. The thermal resistance of the 10-pin QFN 3 × 3 package (DRC) is RθJA = 48.7 °C/W, if the PowerPAD is soldered. Specified regulator operation is assured to a maximum ambient temperature TA of 85°C. Therefore, the maximum power dissipation is about 820 mW. More power can be dissipated if the maximum ambient temperature of the application is lower. T *T J(MAX) A P + + 125°C * 85°C + 820 mW D(MAX) R 48.7 °CńW qJA (6) Copyright © 2007–2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS61200 TPS61201 TPS61202 17 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS61200DRCR ACTIVE SON DRC 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61200DRCRG4 ACTIVE SON DRC 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61200DRCT ACTIVE SON DRC 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61200DRCTG4 ACTIVE SON DRC 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61201DRCR ACTIVE SON DRC 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61201DRCRG4 ACTIVE SON DRC 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61201DRCT ACTIVE SON DRC 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61201DRCTG4 ACTIVE SON DRC 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61202DRCR ACTIVE SON DRC 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61202DRCRG4 ACTIVE SON DRC 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61202DRCT ACTIVE SON DRC 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61202DRCTG4 ACTIVE SON DRC 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61202DSCR ACTIVE SON DSC 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61202DSCRG4 ACTIVE SON DSC 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61202DSCT ACTIVE SON DSC 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61202DSCTG4 ACTIVE SON DSC 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2008 (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 20-Jul-2010 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing TPS61200DRCR SON DRC 10 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS61200DRCT SON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS61201DRCR SON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS61201DRCT SON DRC 10 250 330.0 12.4 3.3 3.3 1.6 8.0 12.0 Q2 TPS61201DRCT SON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS61202DRCR SON DRC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS61202DRCT SON DRC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS61202DRCT SON DRC 10 250 330.0 12.4 3.3 3.3 1.6 8.0 12.0 Q2 TPS61202DSCR SON DSC 10 3000 330.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 TPS61202DSCT SON DSC 10 250 180.0 12.4 3.3 3.3 1.1 8.0 12.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 20-Jul-2010 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS61200DRCR SON DRC 10 3000 346.0 346.0 29.0 TPS61200DRCT SON DRC 10 250 190.5 212.7 31.8 TPS61201DRCR SON DRC 10 3000 346.0 346.0 29.0 TPS61201DRCT SON DRC 10 250 340.5 338.1 20.6 TPS61201DRCT SON DRC 10 250 190.5 212.7 31.8 TPS61202DRCR SON DRC 10 3000 346.0 346.0 29.0 TPS61202DRCT SON DRC 10 250 190.5 212.7 31.8 TPS61202DRCT SON DRC 10 250 340.5 338.1 20.6 TPS61202DSCR SON DSC 10 3000 346.0 346.0 29.0 TPS61202DSCT SON DSC 10 250 190.5 212.7 31.8 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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