CALOGIC VN10LM

VN0610LL, VN10LM
N-Channel Enhancement-Mode
MOS Transistors
CORPORATION
VN0610LL / VN10LM
FEATURES
ORDERING INFORMATION
• Low rDS(on) <5Ω
Part
Package
VN0610LL
Plastic TO-92
VN10LM
Plastic TO-237
For sorted chips in carriers see 2N7000
APPLICATIONS
• Switching
• Amplification
Temperature Range
-55oC to +150oC
-55oC to +150oC
PIN CONNECTIONS
BOTTOM VIEW
BOTTOM VIEW
3
TO-92
(TO-226AA)
TO-237
1 2 3
1. SOURCE
2. GATE
3. DRAIN
2
1 2 3
1. SOURCE
2. GATE
3. TAB-DRAIN
1
CD5
ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise noted)
SYMBOL
PARAMETERS/TEST CONDITIONS
LIMITS
VN0610LL
VN10LM
VDS
Drain-Source Voltage
60
60
VGS
Gate-Source Voltage
±30
±30
ID
Continuous Drain Current
TA = 25oC
0.28
0.32
TA = 100 oC
0.17
0.2
1.3
1.4
0.8
1.0
0.32
0.4
IDM
Pulsed Drain Current
1
TA = 25oC
PD
Power Dissipation
TJ, Tstg
Operating Junction & Storage Temperature Range
TL
Lead Temperature (1/16" from case for 10 sec.)
o
TA = 100 C
-55 to 150
UNITS
V
A
W
o
300
C
THERMAL RESISTANCE RATINGS
SYMBOL
RthJA
1
THERMAL RESISTANCE
Junction-to-Ambient
Pulse width limited by maximum junction temperature.
LIMITS
VN0610LL
VN10LM
156
125
UNITS
K/W
VN0610LL / VN10LM
CORPORATION
SPECIFICATIONSa
SYMBOL
LIMITS
PARAMETER
TYPb
MIN
70
60
MAX
UNIT
TEST CONDITIONS
STATIC
V(BR)DSS
Drain-Source Breakdown Voltage
VGS(th)
Gate-Threshold Voltage
IGSS
Gate-Body Leakage
IDSS
Zero Gate Voltage Drain Current
V
2.3
0.8
2.5
±100
10
ID = 100µA, VGS = 0V
VDS = VGS, I D = 1mA
nA
µA
VGS = ±30V, VDS = 0V
VDS = 50V, VGS = 0V
TJ = 125oC
500
ID(ON)
On-State Drain Currentd
rDS(ON)
Drain-Source On-Resistancec
1000
750
5
mA
7.5
2.5
5
4.4
9
gFS
Forward Transconductancec
230
gOS
Common Source Output Conductancec
500
Ciss
Input Capacitance
16
60
Coss
Output Capacitance
11
25
Crss
Reverse Transfer Capacitance
2
5
Turn-On Time
7
10
100
VDS = 10V, VGS = 10V
VGS = 5V, I D = 0.2A
Ω
VGS = 10V, ID = 0.5A
TJ = 125oC
mS
VDS = 10V, ID = 0.5A
µS
VDS = 5V, ID = 50mA
pF
VDS = 25V, VGS = 0V, f = 1MHz
DYNAMIC
SWITCHING
tON
ns
tOFF
Turn-Off Time
Notes:
a.
b.
c.
d.
T A = 25oC unless otherwise noted.
For design aid only, not subject to production testing.
Pulse test; PW = ≤300µS, duty cycle ≤2%.
Pulse width limited by maximum junction temperature.
7
10
VDD = 15V, RL = 23Ω, ID = 0.6A
VGEN = 10V, RG = 25Ω
(Switching time is essentially independent of
operating temperature)