TSM35N03 Preliminary N-Channel Enhancement Mode MOSFET VDS = 30V ID = 50A RDS (on), Vgs @ 10V, Ids @ 30A = 8.5mΩ RDS (on), Vgs @ 4.5V, Ids @ 30A = 13mΩ Pin assignment: 1. Gate 2. Drain 3. Source Features High Density Cell Design for Ultra Low On-Resistance Advanced trench process technology Fully Characterized Avalanche Voltage and Current Specially Designed for DC/DC Converters and Motor Drivers Block Diagram Ordering Information Part No. Packing Package TSM35N03CP Tape & Reel TO-252 Absolute Maximum Rating (TA = 25 oC unless otherwise noted) Parameter Symbol Limit Unit Drain-Source Voltage VDS 30 V Gate-Source Voltage VGS ±20 V Continuous Drain Current ID 50 Pulsed Drain Current IDM 350 Maximum Power Dissipation TA = 25 oC o TA = 100 C Operating Junction Temperature PD Single Pulse Drain to Source Avalanche Energy (VDD = 100V, VGS=10V, IAS=2A, L=10mH, RG=25Ω) 57 W 23 W/oC +150 o C TJ, TSTG -55 to +150 o C EAS 300 mJ Symbol Limit Unit TL 10 S Rθjc 2.2 Rθja 50 TJ Operating Junction and Storage Temperature Range A Thermal Performance Parameter Lead Temperature (1/8” from case) Junction-to-case Thermal Resistance Junction to Ambient Thermal Resistance (PCB mounted) Note: 1. Maximum DC current limited by the package 2. 1-in2 2oz Cu PCB board TSM35N03 1-3 2005/04 rev. A o C/W Electrical Characteristics TJ = 25 oC, unless otherwise noted Parameter Conditions Symbol Min Typ Max Unit Static Drain-Source Breakdown Voltage VGS = 0V, ID = 250uA BVDSS 30 -- -- V Drain-Source On-State Resistance VGS = 4.5V, ID = 30A RDS(ON) -- 10.0 13.0 mΩ Drain-Source On-State Resistance VGS = 10V, ID = 30A RDS(ON) -- 6.5 8.5 mΩ Gate Threshold Voltage VDS = VGS, ID = 250uA VGS(TH) 1.0 1.6 3.0 V Zero Gate Voltage Drain Current VDS = 24V, VGS = 0V IDSS -- -- 1.0 uA Gate Body Leakage VGS = ± 20V, VDS = 0V IGSS -- -- ± 100 nA Rg -- -- -- VDS =10V, ID = 35A gfs -- -- -- Total Gate Charge VDS = 15V, ID = 35A, Qg -- 24 -- Gate-Source Charge VGS = 10V Qgs -- 5.4 -- Qgd -- 4.0 -- Gate Resisrance Forward Transconductance S Dynamic Gate-Drain Charge Turn-On Delay Time VDD = 15V, RL = 15Ω, td(on) -- 15 -- Turn-On Rise Time ID = 1A, VGEN = 10V, tr -- 3.2 -- Turn-Off Delay Time RG = 24Ω td(off) -- 36 -- tf -- 4.8 -- Turn-Off Fall Time nC nS Input Capacitance VDS = 15V, VGS = 0V, Ciss -- 1940 -- Output Capacitance f = 1.0MHz Coss -- 312 -- Crss -- 122 -- IS -- -- 50 A VSD -- 0.87 1.5 V Reverse Transfer Capacitance pF Source-Drain Diode Max. Diode Forward Current Diode Forward Voltage IS = 20A, VGS = 0V Note: 1. pulse test: pulse width <=300uS, duty cycle <=2% 2. Negligible, Dominated by circuit inductance. TSM35N03 2-3 2005/04 rev. A TO-252 Mechanical Drawing E J A A B C D E F G TO-252 DIMENSION MILLIMETERS INCHES MIN MAX MIN MAX 6.570 6.840 0.259 0.269 9.250 10.400 0.364 0.409 0.550 0.700 0.022 0.028 2.560 2.670 0.101 0.105 2.300 2.390 0.090 0.094 0.490 0.570 0.019 0.022 1.460 1.580 0.057 0.062 H I J 0.520 5.340 1.460 F DIM I B G D TSM35N03 C H 3-3 0.570 5.550 1.640 0.020 0.210 0.057 2005/04 rev. A 0.022 0.219 0.065