M61006FP DISTANCE DETECTION SIGNAL PROCESSING FOR 3 V SUPPLY VOLTAGE REJ03F0039-0100Z Rev.1.0 Sep.16.2003 Description M61006FP is a semiconductor integrated circuit including distance detection signal processing circuit for 3 V supply voltage. This device transforms each optical inflow current I1 and I2 from PSD SENSOR into the voltage, and integrates the output after doing calculation corresponds to I1 / (I1+I2), and outputs it as the voltage data. Features • Wide supply voltage range: Vcc = 2.2 to 5.5 V • Including clamp level switching circuit (It is possible to set a clamp level to 15 points with outside control.) • Including infinity discrimination function (clamp on detection function) • Including POWER ON RESET function • Including simple temperature detection function (It is possible to correct temperature with transmitting this output to the microcomputer. ) Application • Auto focus control for a camera, short distance sensor, etc. Recommended Operating Condition • Supply voltage range …… 2.2 V to 5.5 V • Rated supply voltage …… 3.0 V Block Diagram Vcc1 CV Vcc2 12 5 1 µF AFOUT 1 16 CHN Capacitance for stationary lihgt hold 0.032 µF NC DIELECTRIC DIVIDEPOLE MEASURES CIRCUIT TESTN 15 TEMPERATURE DETECTION CIRCUIT I1 14 I/V TRANSFORM AMP STATIONARY LIGHT REMOVE RECKON PSDN I1 HOLD HOLD PSD I2 PSDF 11 CHF OUTPUT CIRCUIT STATIONARY LIGHT REMOVE I1 + I2 INFINITY JUDGE CIRCUIT I/V TRANSFORM AMP 9 NC CLAMP CIRCUIT TESTF HOLD 10 1 µF POWER ON RESET Capacitance for stationary lihgt hold 2 GND1 3 GND2 SEQUENTIAL CONTROL LOGIC 6 CONT 8 CLALV Input control signal Input control signal Note: Pin9, 16 is avail only for engineering sample. Rev.1.0, Sep.16.2003, page 1 of 15 INFINITY JUDGE OUTPUT CIRCUIT 7 CMOUT M61006FP Pin Configuration (Top View) AFOUT 1 NC 16 (TESTN) GND1 2 15 CHN GND2 3 14 PSDN NC 4 13 NC VCC2 5 12 VCC1 CONT 6 11 PSDF CMOUT 7 10 CHF CLALV 8 9 NC (TESTF) OUTLINE 16P2E Note: Pin9,16 is available only for engineeing sample. Vcc, GND1: small signalanalog line Vcc, GND2: analog line or control line Rev.1.00, Sep.16.2003, page 2 of 15 M61006FP Absolute Maximum Ratings (Ta = 25°C unless otherwise noted) Parameter Symbol Rating Unit Remark Supply voltage VCC Power dissipation Thermal derating Pin supply voltage Another terminal Output inflow current Operating temperature Storage temperature Pd Kθ VIF VI / O Icmout Topr Tstg 7.0 320 –3.2 7.0 0 to VCC+0.3 0.5 −10 to 50 −40 to 125 V mW mW / °C V V mA °C °C Note1 Ta = 25°C Ta ≥ 25°C Pin 6, 7, 8 Note2 NPN open collector Notes: 1. As a principle, do not provide a supply voltage reversely. 2. As a principle, do not provide the terminals with the voltage over supply voltage or under ground voltage. Thermal Derating Curve 400 300 - 3.2mW/˚C 200 10 0 0 20 40 60 80 100 OPERATING TEMPERATURE Rev.1.00, Sep.16.2003, page 3 of 15 120 Ta[˚C] 140 M61006FP Electrical Characteristics - 1 (Ta = 25°C) Classificatin Parameter Symbol Operating supply voltage VCC Test conditions Limits Unit VCC (V) 3.0 No te Min Typ Max 2.2 3.0 5.5 V — 3.9 5.1 mA *6 — 9.5 12.5 mA *1 range Consum- Usual consuming current ICC1 ing Rapid charge consuming ICC2 Current current 1 AFOUT rapid charge consuming current *6 VAFOUT = 0 V Rapid charge consuming ICC3 current 2 CH rapid charge — 10.5 13.7 mA consuming current *6 CONT CONT ”H” input voltage VCOH 1.1 — 7.0 V pin CONT ”L” input voltage VCOL 0 — 0.3 V CONT ”H” input current ICOH VIH = 5.5 V — — 1.0 µA CONT ”L” input current ICOL VIL = 0 V –84 –64 –44 µA CLALV CLALV ”H” input voltage VCLH 1.1 — 7.0 V pin CLALV ”L” input voltage VCLL 0 — 0.3 V CLALV ”H” input current ICLH VIH = 5.5 V — — 1.0 µA CLALV ”L” input current ICLL VIL = 0 V –84 –64 –44 µA CH rapid charge current ICHQC IPSD = 5 µA –2000 –1000 –500 µA HOLD C *1 *6 *6 VCH = 0 V CH stationary charge ICHC VCH = 0 V –33 –22 –11 µA ICHD VCH = 1.5 V 11 22 33 µA current CH stationary discharge current Integra- AFOUT reset current IRAFOUT VAFOUT = 0.5 V 600 1200 2400 µA tion AFOUT integrating IOFFAFOUT VAFOUT = 0.5 V — — 1.0 µA circuit off current IINTAFOUT VAFOUT = 0.5 V –13.0 –10.0 –7.0 µA — 3.0 6.0 % –6.5 –5.0 –3.5 µA AFOUT integrating current (maximum integration VCHF = 2.0 V, current) Distance measurement VCHN = 0 V ∆IINT integration current stability *2 *6 AFOUT temperature revision integration current ItAFOUT The stability of temperature integration current ∆It — 3.0 6.0 % Dynamic rage of AFOUT pin DAFOUT — — 2.7 V VAFOUT = 0.5 V *2 *6 (VCC0.3) Rev.1.00, Sep.16.2003, page 4 of 15 *6 *7 M61006FP Electrical Characteristics - 2 (Ta = 25°C) Classification Parameter AF Input AF output voltage Condition1 (9:1) -1 AF output voltage Symbol D (9:1) - 1 Near side 9: far side 1 Limits Unit VCC (V) Note 3.0 *3 Min Typ Max 1.26 1.81 2.36 V 0.83 1.19 1.55 V *3 0.41 0.59 0.77 V *3 IP = 100 nA D (6:4) - 1 (6:4) -1 AF output voltage Test conditions Near side 6: far side 4 IP = 100 nA D (3:7) - 1 (3:7) -1 Near side 3: far side 7 IP = 100 nA AF slope - 1 ∆AF - 1 0.85 1.22 1.59 V *3 AF linearity - 1 LAF - 1 0.875 0.975 1.075 — *3 AF input AFoutput time D (9:1) - 2 1.26 1.81 2.36 V *3 condition2 (9:1) - 2 0.83 1.19 1.55 V *3 0.41 0.59 0.77 V *3 0.85 1.22 1.59 V *3 AFoutput time D (6:4) - 2 (6:4) - 2 AFoutput time Near side 6: Far side4 IP = 50 nA D (3:7) - 2 (3:7) - 2 AF input condition3 Near side 9: Far side1 IP = 50 nA Near side 3: Far side7 IP = 50 nA AF slope - 2 ∆AF - 2 AF linearity - 2 LAF - 2 0.875 0.975 1.075 — *3 AFoutput time (9:1) - 3 D (9:1) - 3 Near side 9: Far side1 IP = 50 nA 1.26 1.81 2.36 V *3 AFoutput time (6:4) - 3 D (6:4) - 3 Near side 6: Far side4 IP = 50 nA 0.83 1.19 1.55 V *3 AFoutput time (3:7) - 3 D (3:7) - 3 Near side 3: Far side7 IP = 50 nA 0.41 0.59 0.77 V *3 AF slope - 3 ∆AF - 3 0.85 1.22 1.59 µA *3 0.875 0.975 1.075 V *3 –0.022 — 0.022 — *3 –0.022 — 0.022 — *3 –0.022 — 0.022 — *3 AF linearity - 3 LAF - 3 AF input condition AFoutput time (9:1) - 3 D (9:1) - 3 1 to 2 AFoutput time D (6:4) - 3 (condition 1 to 3) (6:4) - 3 AFoutput time Near side 9: Far side1 Near side 6: Far side4 (condition 1 to 3) D (3:7) - 3 (3:7) - 3 Rev.1.00, Sep.16.2003, page 5 of 15 Near side 3: Far side7 (condition 1 to 3) M61006FP Electrical Characteristics - 3 (Ta = 25°C) Classification Parameter Symbol Test conditions Limits Min Typ Max Unit VCC (V) 3.0 Note Clamp CMOUT leak current ICMOUTH VCMOUT = 5.5 V — — 1.0 µA determin CMOUT saturation current VCMOUTL ICMOUT = 500 µA — — 0.3 V *6 Signal ray maximum current ∆INF — — 3.0 µA *4 Capacity of the current to extract IPSD — — 30 µA *6 ation SENSOR *8 stationary rays Clamp level *4 *8 ICLAM The change values –50 — 50 % — — 26 µsec about TYP current (Design target value) Clout for measure ment rays Nch Response speed of Circuit for measurement rays ∆TTESTN Fch Response speed of Circuit for ∆TTESTF measurement rays Rev.1.00, Sep.16.2003, page 6 of 15 *5 *6 — — 26 µsec *5 *6 M61006FP *1 Rapid charge consuming current 1 and 2 are measured with the following conditions: VCC 1 2 3 CONT Rapid Charge Consuming Current 1 • • Rapid Charge Consuming Current 2 Rapid charge consuming current 1 = (Rapid charge current for integration capacitance AFOUT dielectric absorption) + (Usual consuming current) Rapid charge consuming current 2 = (mainly Rapid charge current for hold capacitance CHN, CHF) + (Usual consuming current) Shorten hold capacitance CHN, CHF pin, integration capacitance AFOUT pin and GND at measurement rapid charge consuming current 1 and hold capacitance CHN, CHF pin and GND at measurement rapid charge consuming current 2 to leave rapid charge current on stationary. But in practical uses it runs as the follows: • • *2 Rapid charge current for hold capacitance CHN, CHF: Use in a constant current charge. The current remain consuming in IC after completing charge. Rapid charge current for integration capacitance AFOUT dielectric absourption: Transition current. It flows until completing charge. Charging rate of distance measurement integration current and temperature integration current when the voltage of AFOUT changes. distance measurement current ( at AFOUT = 0.5V ) ∆ IAFOUT1 =(1- ∆ IAFOUT2 =(1- distance measurement current ( at AFOUT = VCC-0.3V ) distance measurement current ( at AFOUT = 0V ) distance measurement current ( at AFOUT = VCC-0.3V ) Rev.1.00, Sep.16.2003, page 7 of 15 / (VCC-0.3V-0.5V) × 100% / (VCC-0.3V-0.5V) × 100% M61006FP *3 Set a current output from PHOTOCUPPLER to following input conditions, and input the varied resistance ratio. AF slope, linearity is calculated with following equations by measuring AFOUT output voltage. I1:I2 = 100 nA Input condition1: IPSD (Stationary light current) = 0 I1:I2 = 50 nA Input condition2: IPSD (Stationary light current) = 0 Input condition3: IPSD (Stationary light current) = 10 µΑ I1:I2 = 100 nA D (9:1)·····The AFOUT output voltage at input with I1:I2 = 9:1 D (6:4)·····The AFOUT output voltage at input with I1:I2 = 6:4 D (3:7)·····The AFOUT output voltage at input with I1:I2 = 3:7 AF slope: ∆AF = D (9:1) – D (3:7) AF linearity: L (AF) = (D (9:1) - (6:4) ) / (D (6:4) - (3:7) ) PSD quite resistance: 120 kΩ *4 *5 *6 *7 *8 Input current of one side channel without saturating stationary light remove circuit and I / V transform amplifier circuit. Confirm not to change the output data at measuring AF input condition (1 to 4), when you shorten intervals between stationary ray hold and distance measurement integration beginning to MIN 26 µS. The value in this item is less than “max” value at any cases. Set AFOUT capacity, distance measurement integration time, and the number of integration under max value, because the “max” value in this item indicates a maximum of IC dynamic range. Establish optional system to be input current to IC less than standard value, because this item’s value indicates maximum input current to IC. Rev.1.00, Sep.16.2003, page 8 of 15 M61006FP Interface Table (Vcc = 3.0 V, Ta = 25°C) AF – IC side Limits Pin name Circuit diagram CONT CLALV Parameter Min Typ Max Unit ”H” input voltage — — — –64 7.0 0.3 1.0 –44 V ”L” input voltage 1.1 0 — –84 ”H” input voltage — — V ”L” input voltage 0 — — — Vcc –0.3 0.3 1.0 Integration ON current (Ratio10:0) –13 –10 –7 ”L” output voltage — — 0.3 V IOL = 500 µA ”H” leak current — — 1.0 µA VIN = 5.5 V ”L” input voltage ”H” input voltage AFOUT Integration OFF current CMOUT Rev.1.00, Sep.16.2003, page 9 of 15 Test conditions and note µA µA VH = 5.5 V VF = 0 V VF = 0.5 V VF = 0.5 V M61006FP Controls (1) VCC (Vcc1+Vcc2) The power on reset circuit with a built in IC work by this pin turned on, and the whole IC including a part of logic circuit is done reset. Also the workings of power on reset circuit complete by less than 100 µS from rise edge of VCC1, 2 (VCC1, VCC2 greater than 2.2 V). Vcc1 Vcc2 H L H Power on reset L undifinition reset reset cancel max 100 µs Note: Regard as rising supply voltage in establishing the timing if uses of this IC is in connecting large capacitance with supply pin. (2) CLALV: Do reset the whole IC including the clamp level set and the part of logic. This IC include D / A converter for 4 bits, and it is possible to establish clamp level to 15 points by clock input after cancel of reset (including none clamp). And also, the whole IC including parts of logic is reset by 15th clump level setting pulse (at intervals of 16 click after this clamp) Values of each bit current are established as the right side. The number of input clock and clamp level are as follows. Clock value Clamp level(Typ.) 0 None clamp 1 0.130 nA 2 0.260 nA 3 0.390 nA 4 0.520 nA 5 0.650 nA 6 0.780 nA 7 0.910 nA 8 1.040 nA 9 1.170 nA 10 1.300 nA 11 1.430 nA bit 1 2 3 4 Set up current (Typ.) 0.130nA 0.260nA 0.520nA 1.040nA Clock value Clamp level(Typ.) 12 1.560 nA 13 1.690 nA 14 1.820 nA 15 None clamp,Logic reset 16 0.130 nA 17 0.260 nA 18 0.390 nA 19 0.520 nA 20 0.650 nA Clamp level is established with fall edge of input clock. It repeats the same value after 15 clock. Rev.1.00, Sep.16.2003, page 10 of 15 M61006FP (3) CONT: By the clock input of the this terminal after canceling the IC reset, it begin to control the whole IC as following function without establishing clamp level. And it repeat to switch over stationary hold and distance measurement integration current after 7th clock a) ON / OFF of dielectric polarity countermeasure circuit integration capacitance b) ON / OFF of CH rapid charge c) ON / OFF of AFOUT pin reset d) ON / OFF of temperature correct integration e) ON / OFF of stationary light hold f) ON / OFF of distance measurement integration H 1 2 3 4 5 6 7 8 9 10 cont L H reset L reset cancel dielectric polarity countermeasure circuit ON temperature correct integration AFOUT pin reset stationary light hold distance measurement integration AFOUT pin reset a. The dielectric polarty contermeasure of integlation capacitance: The dielectric polarity contermeasure circuit of integration capacitance run between reset and rise edge of first CONT pin. b. CH rapid charge: After reset cancel, CH capacitance is charged rapidy between the fall edge of first clock and second ones. c. AFOUT pin reset: After reset cannel, accumulated chage at capacitance added to AFOUT pin is removed between the fall clock edges of 1 to 2 and 5 to 6. d. Temperrature correct integlation: After reset cannel, temperature correct integration is carried out betweeen the fall edge of 3rd clock and 4th clock. This voltage of temperature corrent integration mentioned above is maintained at AFOUT pin. This voltage is currected temperature (including time charge correct of AFOUT pin added capacotance) as compared with base voltage estabilished previously. e. Stationaly light hold: After 7th clock from reset cuncel (from 7th clock rise to 8th clock rise), stationary light hold is carried out over and over. f. Distance measurement integration: After 7th clock from reset cancel (from 7th clock fall to 8th clock rise ), distance measurement integration is carried out over and over. Rev.1.00, Sep.16.2003, page 11 of 15 M61006FP (4) AFOUT: After reset cancel, the voltage is outputted at intervals of temperature correct integration and distance measurement integration from about 0 V to above a D range of this pin. The output is carried out linearly by integration current or integration time. (5) CMOUT: After the CONT pin input 7th clock fall from reset cancel, the signal current at PSDF side is distinguished from the clamp level in terms of the values. The result is outputted at each discrimination as the follows. And after the CONT pin input 7th clock fall, the discrimination is carried out with the beginning of distance measurement start. After reset cancel, until CONT pin input 8th clock “H” is further outputted. 1 H CONT L H 6 • • • • 7 9 8 10 • discriminating point RESET • • • • • • • • • discriminating point L H CMOUT L reset cancel Notes: PSDF side signal current CMOUT output Greater than clamp level H Less than clamp level L 1. It is necessary to contact a control signal for IRED with the control signal mentioned above. 2. Connect NC terminals (4, 9, 12, 16 pin) to Vcc1 terminal or GND. Rev.1.00, Sep.16.2003, page 12 of 15 • M61006FP Sequential Time Chart Example Rev.1.00, Sep.16.2003, page 13 of 15 M61006FP Mask Option 1) Control terminal variation 1 Full spec (typical) C O N T C L A L V A F O U T C M O U T 6 8 1 7 This type uses CONT,CLALV,AFOUT ,CMOUT terminal as I/F terminal to the microcomputer. This is the typical type at M61006FP. MICROCOMPUTER 2 Most simplified type C O N T A F O U T 6 1 This type does not connect CLALV,CMOUT terminals to the microcomputer. When above mentioned terminals are not connected to the microcomputer without changing mask,connect each terminal to the ground. In this case,clamp level becomes 0 And Power on reset in IC is used as reset. MICROCOMPUTER 3 Explanation of the terminal that can be simplified. (a) CLALV • • In the typical type,15 ways clamp levels can be set by the outside control,but also the terminal can be simplified by mask option as follows. • • • (I) Clamp level fixation • • • • • (II) Clamp level 2 step changeover 0.125nA 0.25nA (b) CMOUT • • 0.5nA • • • 1.0nA Selects 1 point from 15 steps of clamp level and fixes it. • • • • • Selects 2 points from clamp level and switches it by changing CLALV terminal HIGH/LOW. However,as selecting 2 points, there is a following constraint. Fixes 3 parts of 4 switches corresponds to each bit in figure to ON or OFF,controls another part by CLALV terminal . When an infinity decision function shouldn't be necessary, it is possible that a CMOUT terminal is removed. Rev.1.00, Sep.16.2003, page 14 of 15 Rev.1.00, Sep.16.2003, page 15 of 15 G e Z1 E HE 1 16 z D b 8 9 Detail G y JEDEC Code − x M Weight(g) 0.06 Detail F A2 A Lead Material Alloy 42 L1 EIAJ Package Code SSOP16-P-225-0.65 c A1 F L A A1 A2 b c D E e HE L L1 z Z1 x y Symbol e1 b2 e1 I2 b2 Dimension in Millimeters Min Nom Max − − 1.45 0 0.1 0.2 − − 1.15 0.17 0.22 0.32 0.13 0.15 0.2 4.9 5.0 5.1 4.3 4.4 4.5 − − 0.65 6.2 6.4 6.6 0.3 0.5 0.7 − − 1.0 − 0.225 − − − 0.375 − − 0.13 − − 0.1 − 0° 10° − − 0.35 − − 5.8 − − 1.0 Recommended Mount Pad e Plastic 16pin 225mil SSOP I2 16P2E-A M61006FP Package Dimensions Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. 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