ETC P55N02

P55N02LD
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
NIKO-SEM
TO-252 (DPAK)
D
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
ID
25
10mΩ
55A
1. GATE
2. DRAIN
3. SOURCE
G
S
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
Gate-Source Voltage
TC = 25 °C
Continuous Drain Current
1
2
Repetitive Avalanche Energy
VGS
±20
V
55
36
140
IAR
20
L = 0.1mH
EAS
140
L = 0.05mH
EAR
5.6
TC = 25 °C
Power Dissipation
UNITS
IDM
Avalanche Current
Avalanche Energy
LIMITS
ID
TC = 100 °C
Pulsed Drain Current
SYMBOL
Operating Junction & Storage Temperature Range
1
Lead Temperature ( /16” from case for 10 sec.)
mJ
60
PD
TC = 100 °C
A
W
38
Tj, Tstg
-55 to 150
TL
275
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
TYPICAL
MAXIMUM
Junction-to-Case
RθJC
2.5
Junction-to-Ambient
RθJA
65
Case-to-Heatsink
RθCS
UNITS
°C / W
0.7
1
Pulse width limited by maximum junction temperature.
Duty cycle ≤ 1%
2
ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
LIMITS
UNIT
MIN TYP MAX
STATIC
V(BR)DSS
VGS = 0V, ID = 250µA
25
VGS(th)
VDS = VGS, ID = 250µA
1
Gate-Body Leakage
IGSS
VDS = 0V, VGS = ±20V
±250
Zero Gate Voltage Drain Current
IDSS
VDS = 20V, VGS = 0V
25
VDS = 20V, VGS = 0V, TJ = 125 °C
250
Drain-Source Breakdown Voltage
Gate Threshold Voltage
1
V
1.5
3
nA
µA
MAY-24-2001
P55N02LD
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
NIKO-SEM
1
On-State Drain Current
ID(ON)
Drain-Source On-State
1
Resistance
RDS(ON)
1
Forward Transconductance
VDS = 10V, VGS = 10V
gfs
TO-252 (DPAK)
55
A
VGS = 7V, ID = 24A
11
14
VGS = 10V, ID = 30A
10
13
VDS = 15V, ID = 30A
16
mΩ
S
DYNAMIC
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
200
Qg
25
Total Gate Charge
2
2
Gate-Source Charge
2
Gate-Drain Charge
2
2700
VGS = 0V, VDS = 15V, f = 1MHz
Qgs
VDS = 0.5V(BR)DSS, VGS = 10V,
7
Qgd
ID = 30A
11
Turn-On Delay Time
td(on)
2
tr
VDS = 15V, RL = 1Ω
7
td(off)
ID ≅ 30A, VGS = 10V, RGS = 2.5Ω
24
Rise Time
2
Turn-Off Delay Time
2
Fall Time
pF
500
nC
7
tf
nS
6
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)
Continuous Current
Pulsed Current
3
1
Forward Voltage
Reverse Recovery Time
Peak Reverse Recovery Current
Reverse Recovery Charge
IS
55
ISM
150
VSD
IF = IS, VGS = 0V
trr
IRM(REC)
IF = IS, dlF/dt = 100A / µS
Qrr
1.3
A
V
37
nS
200
A
0.043
µC
Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%.
Independent of operating temperature.
3
Pulse width limited by maximum junction temperature.
1
2
REMARK: THE PRODUCT MARKED WITH “P55N02LD”, DATE CODE or LOT #
2
MAY-24-2001
P55N02LD
N-Channel Logic Level Enhancement
Mode Field Effect Transistor
NIKO-SEM
TO-252 (DPAK)
TO-252 (DPAK) MECHANICAL DATA
mm
mm
Dimension
Dimension
Min.
Typ.
Max.
Min.
Typ.
Max.
A
9.35
10.1
H
B
2.2
2.4
I
6.4
6.6
C
0.48
0.6
J
5.2
5.4
D
0.89
1.5
K
0.6
1
E
0.45
0.6
L
0.64
0.9
F
0.03
0.23
M
4.4
4.6
G
6
6.2
N
3
0.8
MAY-24-2001