74ACT11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS031C – JULY 1987 – REVISED APRIL 1996 D D D D D D D DB, DW, NT, OR PW PACKAGE (TOP VIEW) 3-State Outputs Drive Bus Lines Directly Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, and Standard Plastic 300-mil DIPs (NT) A1 A2 A3 A4 GND GND GND GND A5 A6 A7 A8 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 DIR B1 B2 B3 B4 VCC VCC B5 B6 B7 B8 OE description The octal bus transceiver is designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. The device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated. The 74ACT11245 is characterized for operation from –40°C to 85°C. FUNCTION TABLE OUTPUT ENABLE OE DIRECTION CONTROL DIR OUTPUT L L B data to A bus L H A data to B bus H X Isolation Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. Copyright 1996, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 74ACT11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS031C – JULY 1987 – REVISED APRIL 1996 logic symbol† OE DIR 13 G3 24 3 EN1 [BA] 3 EN2 [AB] A1 A2 A3 A4 A5 A6 A7 A8 1 23 1 2 2 22 3 21 4 20 9 17 10 16 11 15 12 14 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) DIR 24 13 A1 23 A2 B7 12 14 2 B6 11 15 A8 B5 10 16 A7 B4 9 17 A6 B3 4 20 A5 B2 3 21 A4 B1 2 22 A3 OE 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 B8 B1 B2 B3 B4 B5 B6 B7 B8 74ACT11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS031C – JULY 1987 – REVISED APRIL 1996 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DB package . . . . . . . . . . . . . . . . . . 0.65 W DW package . . . . . . . . . . . . . . . . . . 1.7 W NT package . . . . . . . . . . . . . . . . . . . 1.3 W PW package . . . . . . . . . . . . . . . . . . . 0.7 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils, except for the NT package, which has a trace length of zero. recommended operating conditions MIN MAX 4.5 5.5 VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage 0 VO IOH Output voltage 0 High-level input voltage 2 UNIT V V 0.8 V VCC VCC V High-level output current – 24 mA IOL Dt/Dv Low-level output current 24 mA 0 10 ns/V TA Operating free-air temperature –40 85 °C Input transition rise or fall rate POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 V 3 74ACT11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS031C – JULY 1987 – REVISED APRIL 1996 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC 4.5 V IOH = –50 50 mA VOH 24 mA IOH = –24 IOH = –75 mA{ IOL = 24 mA A or B ports‡ IOZ II OE or DIR IOL = 75 mA{ VO = VCC or GND ICC VI = VCC or GND VI = VCC or GND, DICC§ One input at 3.4 V, Ci TA = 25°C TYP MAX MIN 4.4 4.4 5.5 V 5.4 5.4 4.5 V 3.94 3.8 5.5 V 4.94 MAX UNIT V 4.8 5.5 V IOL = 50 mA VOL MIN 3.85 4.5 V 0.1 5.5 V 0.1 0.1 0.1 4.5 V 0.36 0.44 5.5 V 0.36 0.44 5.5 V V 1.65 5.5 V ±0.5 ±5 mA 5.5 V ±0.1 ±1 mA IO = 0 5.5 V 8 80 mA Other inputs at GND or VCC 5.5 V 0.9 1 mA VI = VCC or GND VO = VCC or GND 5V 4 pF Co 5V 12 † Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. ‡ For I/O ports, the parameter IOZ includes the input leakage current. § This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC. pF switching characteristics over recomended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A or B B or A tPZH tPZL OE A or B tPHZ tPLZ OE A or B TA = 25°C MIN TYP MAX MIN MAX 1.5 6.2 9.2 1.5 10 1.5 5.4 8.6 1.5 9.1 1.5 8.1 12 1.5 13.2 1.5 8.2 11.7 1.5 12.9 1.5 9.3 11.8 1.5 12.9 1.5 9.8 12.9 1.5 13.9 UNIT ns ns ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd d 4 Power dissipation capacitance per transceiver POST OFFICE BOX 655303 TEST CONDITIONS Outputs enabled Outputs disabled • DALLAS, TEXAS 75265 CL = 50 pF, pF f = 1 MHz TYP 66 19 UNIT pF 74ACT11245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCAS031C – JULY 1987 – REVISED APRIL 1996 PARAMETER MEASUREMENT INFORMATION 2 × VCC S1 500 Ω From Output Under Test Open GND LOAD CIRCUIT Output Control (low-level enabling) 3V 1.5 V 1.5 V 0V tPLH tPHL VOH Output S1 Open 2 × VCC GND 500 Ω CL = 50 pF (see Note A) Input TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH 50% VCC 50% VCC VOL 3V 0V tPZL [ VCC tPLZ Output Waveform 1 S1 at 2 × VCC (see Note B) Output Waveform 2 S1 at GND (see Note B) 1.5 V 1.5 V 50% VCC VOL tPHZ tPZH VOLTAGE WAVEFORMS 20% VCC 50% VCC 80% VCC VOH [0V VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1998, Texas Instruments Incorporated