TI SN74AHC4066N

SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 – JUNE 2003
D
D
D
D
D
D, DB, DGV, N, NS, OR PW PACKAGE
(TOP VIEW)
2-V to 5.5-V VCC Operation
Supports Mixed-Mode Voltage Operation on
All Ports
High On-Off Output-Voltage Ratio
Low Crosstalk Between Switches
Individual Switch Controls
Extremely Low Input Current
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
1A
1B
2B
2A
2C
3C
GND
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
1C
4C
4A
4B
3B
3A
RGY PACKAGE
(TOP VIEW)
1B
2B
2A
2C
3C
This switch is designed to handle both analog and
digital signals. Each switch permits signals with
amplitudes up to 5.5 V (peak) to be transmitted in
either direction.
VCC
This quadruple silicon-gate CMOS analog switch
is designed for 2-V to 5.5-V VCC operation.
1A
description/ordering information
1
14
2
13 1C
3
12 4C
4
11 4A
5
10 4B
9 3B
6
Each switch section has its own enable-input
control (C). A high-level voltage applied to C turns
on the associated switch section.
GND
7
Applications include signal gating, chopping,
modulation or demodulation (modem), and signal
multiplexing
for
analog-to-digital
and
digital-to-analog conversion systems.
8
3A
D
D
NC – No internal connection
ORDERING INFORMATION
TOP-SIDE
MARKING
PDIP – N
Tube
SN74AHC4066N
SN74AHC4066N
QFN – RGY
Tape and reel
SN74AHC4066RGYR
HA4066
Tube
SN74AHC4066D
Tape and reel
SN74AHC4066DR
Tube
SN74AHC4066NS
Tape and reel
SN74AHC4066NSR
Tube
SN74AHC4066DB
Tape and reel
SN74AHC4066DBR
Tube
SN74AHC4066PW
Tape and reel
SN74AHC4066PWR
SOIC – D
–40 C to 85
–40°C
85°C
C
ORDERABLE
PART NUMBER
PACKAGE†
TA
SOP – NS
SSOP – DB
TSSOP – PW
AHC4066
AHC4066
HA4066
HA4066
TVSOP – DGV
Tape and reel
SN74AHC4066DGVR
HA4066
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 – JUNE 2003
FUNCTION TABLE
(each switch)
INPUT
CONTROL
(C)
SWITCH
L
OFF
H
ON
logic diagram (positive logic)
A
VCC
VCC
B
C
One of Four Switches
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Switch I/O voltage range, VIO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Control-input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
I/O diode current, IIOK (VIO < 0 or VIO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
On-state switch current, IT (VIO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
(see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
(see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
(see Note 3): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
(see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
(see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
(see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. The package thermal impedance is calculated in accordance with JESD 51-5.
2
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SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 – JUNE 2003
recommended operating conditions (see Note 5)
VCC
VIH
VIL
VI
VIO
∆t/∆v
t/ v
MIN
2†
Supply voltage
VCC = 2 V
VCC = 2.3 V to 2.7 V
High-level input voltage, control inputs
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
V
0.5
VCC × 0.3
VCC × 0.3
0
Input/output voltage
0
VCC = 4.5 V to 5.5 V
V
VCC × 0.7
Control input voltage
Input transition rise or fall rate
UNIT
1.5
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
5.5
VCC × 0.7
VCC × 0.7
VCC = 2 V
VCC = 2.3 V to 2.7 V
Low-level input voltage, control inputs
MAX
VCC × 0.3
5.5
V
V
VCC
200
V
100
ns/V
20
TA
Operating free-air temperature
–40
85
°C
† With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. Only digital signals should be transmitted
at these low supply voltages.
NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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3
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 – JUNE 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VCC
MIN
TA = 25°C
TYP
MAX
MIN
MAX
UNIT
IT = –1 mA,
VI = VCC or GND,
VC = VIH
(see Figure 1)
2.3 V
38
180
225
3V
29
150
190
4.5 V
21
75
100
IT = –1 mA,
VI = VCC to GND,
VC = VIH
2.3 V
143
500
600
3V
57
180
225
4.5 V
31
100
125
Difference in
on-state resistance
between switches
IT = –1 mA,
VI = VCC to GND,
VC = VIH
2.3 V
6
30
40
3V
3
20
30
4.5 V
2
15
20
II
Control input current
0 to 5.5 V
±0.1
±1
µA
IS(off)
Off-state
switch leakage
current
VI = 5.5 V or GND
VI = VCC and
VO = GND, or
VI = GND and
VO = VCC,
VC = VIL
(see Figure 2)
5.5 V
±0.1
±1
µA
IS(on)
On-state
switch leakage
current
VI = VCC or GND,
VC = VIH
(see Figure 3)
5.5 V
±0.1
±1
µA
ICC
Supply current
VI = VCC or GND
5.5 V
20
µA
Cic
Control input
capacitance
1.5
pF
Cio
Switch input/output
capacitance
5.5
pF
CF
Feed-through
capacitance
0.5
pF
ron
ron(p)
∆rron
4
TEST CONDITIONS
On-state
switch resistance
Peak
on-state resistance
POST OFFICE BOX 655303
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Ω
Ω
Ω
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 – JUNE 2003
switching characteristics over recommended operating free-air temperature range,
VCC = 2.5 V ± 0.2 V (unless otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
MIN
TA = 25°C
TYP
MAX
MIN
MAX
UNIT
tPLH
tPHL
Propagation
delay time
A or B
B or A
CL = 15 pF,
(see Figure 4)
1.2
10
16
ns
tPZH
tPZL
Switch
turn-on time
C
A or B
CL = 15 pF,
RL = 1 kΩ
(see Figure 5)
3.3
15
20
ns
tPLZ
tPHZ
Switch
turn-off time
C
A or B
CL = 15 pF,
RL = 1 kΩ
(see Figure 5)
6
15
23
ns
tPLH
tPHL
Propagation
delay time
A or B
B or A
CL = 50 pF,
(see Figure 4)
2.6
12
18
ns
tPZH
tPZL
Switch
turn-on time
C
A or B
CL = 50 pF,
RL = 1 kΩ
(see Figure 5)
4.2
25
32
ns
tPLZ
tPHZ
Switch
turn-off time
C
A or B
CL = 50 pF,
RL = 1 kΩ
(see Figure 5)
9.6
25
32
ns
switching characteristics over recommended operating free-air temperature range,
VCC = 3.3 V ± 0.3 V (unless otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
TA = 25°C
MIN
TYP
MAX
MIN
MAX
UNIT
tPLH
tPHL
Propagation
delay time
A or B
B or A
CL = 15 pF,
(see Figure 4)
0.8
6
10
ns
tPZH
tPZL
Switch
turn-on time
C
A or B
CL = 15 pF,
RL = 1 kΩ
(see Figure 5)
2.3
11
15
ns
tPLZ
tPHZ
Switch
turn-off time
C
A or B
CL = 15 pF,
RL = 1 kΩ
(see Figure 5)
4.5
11
15
ns
tPLH
tPHL
Propagation
delay time
A or B
B or A
CL = 50 pF,
(see Figure 4)
1.5
9
12
ns
tPZH
tPZL
Switch
turn-on time
C
A or B
CL = 50 pF,
RL = 1 kΩ
(see Figure 5)
3
18
22
ns
tPLZ
tPHZ
Switch
turn-off time
C
A or B
CL = 50 pF,
RL = 1 kΩ
(see Figure 5)
7.2
18
22
ns
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• DALLAS, TEXAS 75265
5
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 – JUNE 2003
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V ± 0.5 V (unless otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
MIN
TA = 25°C
TYP
MAX
MIN
MAX
UNIT
tPLH
tPHL
Propagation
delay time
A or B
B or A
CL = 15 pF,
(see Figure 4)
0.3
4
7
ns
tPZH
tPZL
Switch
turn-on time
C
A or B
CL = 15 pF,
RL = 1 kΩ
(see Figure 5)
1.6
7
10
ns
tPLZ
tPHZ
Switch
turn-off time
C
A or B
CL = 15 pF,
RL = 1 kΩ
(see Figure 5)
3.2
7
10
ns
tPLH
tPHL
Propagation
delay time
A or B
B or A
CL = 50 pF,
(see Figure 4)
0.6
6
8
ns
tPZH
tPZL
Switch
turn-on time
C
A or B
CL = 50 pF,
RL = 1 kΩ
(see Figure 5)
2.1
12
16
ns
tPLZ
tPHZ
Switch
turn-off time
C
A or B
CL = 50 pF,
RL = 1 kΩ
(see Figure 5)
5.1
12
16
ns
analog switch characteristics over operating free-air temperature range (unless otherwise noted)
PARAMETER
Frequency response
(switch on)
Crosstalk
(between any switches)
Crosstalk
(control input to
signal output)
Feed-through attenuation
(switch off)
Sine-wave distortion
FROM
(INPUT)
A or B
A or B
C
A or B
A or B
TO
(OUTPUT
)
B or A
B or A
A or B
B or A
B or A
TEST
CONDITIONS
VCC
CL = 50 pF, RL = 600 Ω,
fin = 1 MHz (sine wave)
20log10(VO/VI) = –3 dB (see Figure 6)
CL = 50 pF, RL = 600 Ω,
fin = 1 MHz (sine wave) (see Figure 7)
CL = 50 pF, RL = 600 Ω,
fin = 1 MHz (square wave) (see Figure 8)
CL = 50 pF, RL = 600 Ω, fin = 1 MHz
(see Figure 9)
CL= 50 pF, RL = 10 kΩ,
fin = 1 kHz (sine wave)
(see Figure 10)
VI = 2 Vp-p
VI = 2.5 Vp-p
VI = 4 Vp-p
TA = 25°C
MIN
TYP
2.3 V
30
3V
35
4.5 V
50
2.3 V
–45
3V
–45
4.5 V
–45
2.3 V
15
3V
20
4.5 V
50
2.3 V
–40
3V
–40
4.5 V
–40
2.3 V
0.1
3V
0.1
4.5 V
0.1
UNIT
MAX
MHz
dB
mV
dB
%
operating characteristics, TA = 25°C
PARAMETER
Cpd
6
TEST CONDITIONS
Power dissipation capacitance
CL = 50 pF,
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
f = 10 MHz
TYP
UNIT
4.5
pF
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 – JUNE 2003
PARAMETER MEASUREMENT INFORMATION
VCC
VC = VIH
VCC
VI = VCC or GND
VO
(ON)
GND
r on
+ V 10– V
I
–3
O
W
1 mA
V
VI – VO
Figure 1. On-State Resistance Test Circuit
VCC
VC = VIL
VCC
VI
A
(OFF)
VO
GND
Condition 1: VI = 0, VO = VCC
Condition 2: VI = VCC, VO = 0
Figure 2. Off-State Switch Leakage-Current Test Circuit
VCC
VC = VIH
VCC
VI
A
(ON)
Open
GND
VI = VCC or GND
Figure 3. On-State Leakage-Current Test Circuit
POST OFFICE BOX 655303
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7
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 – JUNE 2003
PARAMETER MEASUREMENT INFORMATION
VCC
VC = VIH
VCC
VI
VO
(ON)
50 Ω
CL
GND
TEST CIRCUIT
tr
VI
A or B
tf
90%
50%
10%
VCC
90%
50%
10%
tPLH
0V
tPHL
VOH
VO
B or A
50%
50%
VOL
VOLTAGE WAVEFORMS
Figure 4. Propagation Delay Time, Signal Input to Signal Output
8
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 – JUNE 2003
PARAMETER MEASUREMENT INFORMATION
VCC
50 Ω
VC
VCC
VI
S1
VO
RL = 1 kΩ
S2
TEST
S1
S2
tPZL
tPZH
tPLZ
tPHZ
GND
VCC
GND
VCC
VCC
GND
VCC
GND
CL
GND
TEST CIRCUIT
VCC
VCC
VC
50%
50%
0V
0V
tPZL
tPZH
≈VCC
VO
VOL
VOH
50%
50%
≈0 V
(tPZL, tPZH)
VCC
VCC
VC
50%
50%
0V
0V
tPLZ
tPHZ
≈VCC
VO
VOL
VOH
VOL + 0.3 V
VOH – 0.3 V
≈0 V
(tPLZ, tPHZ)
VOLTAGE WAVEFORMS
Figure 5. Switching Time (tPZL, tPLZ, tPZH, tPHZ), Control to Signal Output
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9
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 – JUNE 2003
PARAMETER MEASUREMENT INFORMATION
VCC
VCC
0.1 µF
fin
VCC
(ON)
VI
VO
GND
50 Ω
RL = 600 Ω
CL = 50 pF
VCC/2
Figure 6. Frequency Response (Switch On)
VCC
VC = VCC
fin
50 Ω
VCC
(ON)
VI
0.1 µF 600 Ω
VO1
GND
RL = 600 Ω
CL = 50 pF
VCC/2
VI
VCC
VC = GND
VCC
(OFF)
600 Ω
VO2
GND
RL = 600 Ω
CL = 50 pF
VCC/2
Figure 7. Crosstalk Between Any Two Switches
VCC
50 Ω
VC
VCC
VO
GND
600 Ω
VCC/2
RL = 600 Ω
CL = 50 pF
VCC/2
Figure 8. Crosstalk (Control Input – Switch Output)
10
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74AHC4066
QUADRUPLE BILATERAL ANALOG SWITCH
SCLS511 – JUNE 2003
PARAMETER MEASUREMENT INFORMATION
VCC
VC = GND
0.1 µF
fin
50 Ω
VI
VCC
(OFF)
VO
GND
600 Ω
RL = 600 Ω
CL = 50 pF
VCC/2
VCC/2
Figure 9. Feed-Through Attenuation (Switch Off)
VCC
VC = VCC
10 µF
fin
600 Ω
VI
10 µF
VCC
(ON)
GND
VO
RL = 10 kΩ
CL = 50 pF
VCC/2
Figure 10. Sine-Wave Distortion
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11
PACKAGE OPTION ADDENDUM
www.ti.com
30-Mar-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
Lead/Ball Finish
MSL Peak Temp (3)
SN74AHC4066D
ACTIVE
SOIC
D
14
50
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74AHC4066DBR
ACTIVE
SSOP
DB
14
2000
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74AHC4066DGVR
ACTIVE
TVSOP
DGV
14
2000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
SN74AHC4066DR
ACTIVE
SOIC
D
14
2500
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74AHC4066N
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
Level-NC-NC-NC
SN74AHC4066NSR
ACTIVE
SO
NS
14
2000
Pb-Free
(RoHS)
CU NIPDAU
Level-2-260C-1 YEAR/
Level-1-235C-UNLIM
SN74AHC4066PW
ACTIVE
TSSOP
PW
14
90
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
SN74AHC4066PWR
ACTIVE
TSSOP
PW
14
2000
Pb-Free
(RoHS)
CU NIPDAU
Level-1-250C-UNLIM
SN74AHC4066RGYR
ACTIVE
QFN
RGY
14
1000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1YEAR
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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