CDC204 HEX INVERTER/CLOCK DRIVER SCAS098E – OCTOBER 1989– REVISED OCTOBER 1998 D D D D D D D D DW PACKAGE (TOP VIEW) CDC204 Replaces 74AC11204 Low-Skew Propagation Delay Specifications for Clock-Driver Applications CMOS-Compatible Inputs and Outputs Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Pin Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Package (DW)) 1Y 2Y 3Y GND GND GND GND 4Y 5Y 6Y 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 1A 2A 3A NC VCC VCC NC 4A 5A 6A NC – No internal connection description The CDC204 contains six independent inverters. The device performs the Boolean function Y = A. It is designed specifically for applications requiring low skew between switching outputs. The CDC204 is characterized for operation from TA = 25°C to 70°C. FUNCTION TABLE INPUT A OUTPUT Y H L L H logic symbol† 1A 2A 3A 4A 5A 6A 20 logic diagram (positive logic) 1 1 19 2 18 3 13 8 12 9 11 10 1Y 1A 20 1 19 2 18 3 13 8 12 9 11 10 1Y 2Y 3Y 2A 2Y 4Y 5Y 3A 3Y 6Y † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 4A 5A 6A 4Y 5Y 6Y Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. Copyright 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 CDC204 HEX INVERTER/CLOCK DRIVER SCAS098E – OCTOBER 1989– REVISED OCTOBER 1998 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±150 mA Maximum power dissipation at TA = 55°C (in still air) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils. For more information, refer to the Package Thermal Considerations application note in the 1994 ABT Advanced BiCMOS Technology Data Book, literature number SCBD002B. recommended operating conditions VCC Supply voltage VIH High level input voltage High-level VCC = 4.75 V VCC = 5.25 V VIL Low level input voltage Low-level VCC = 4.75 V VCC = 5.25 V VI Input voltage IOH High level output current High-level VCC = 4.75 V VCC = 5.25 V IOL Low level output current Low-level VCC = 4.75 V VCC = 5.25 V ∆t / ∆v Input transition rise or fall rate fclock TA Input clock frequency 2 MIN NOM MAX UNIT 4.75 5 5.25 V 3.3 1.4 1.6 0 24 24 25 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 VCC – 24 –24 0 Operating free-air temperature V 3.7 V V mA mA 10 ns / V 80 MHz 70 °C CDC204 HEX INVERTER/CLOCK DRIVER SCAS098E – OCTOBER 1989– REVISED OCTOBER 1998 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VCC = 4 4.75 75 V IOH = – 50 µA VCC = 5 5.25 25 V VOH High-level voltage output VCC = 4 4.75 75 V IOH = – 24 mA VCC = 5 5.25 25 V IOH = – 75 mA‡, VCC = 5.25 V VCC = 4 4.75 75 V IOL = 50 µA VCC = 5 5.25 25 V VOL TA† 25°C 4.65 Full range 4.65 25°C 5.15 Full range 5.15 TEST CONDITIONS Low-level voltage output 75 V VCC = 4 4.75 IOL = 24 mA VCC = 5 5.25 25 V IOL = 75 mA‡, VCC = 5.25 V II Input current VI = VCC or GND 25 V VCC = 5 5.25 ICC Supply current VI = VCC or GND,, IO = 0 VCC = 5.25 V, MIN 25°C 4.19 Full range 4.05 25°C 4.68 Full range 4.55 Full range 3.6 TYP MAX V 25°C 0.1 Full range 0.1 25°C 0.1 Full range 0.1 25°C 0.36 Full range 0.44 25°C 0.36 Full range 0.44 Full range 1.65 25°C ± 0.1 ±1 Full range 25°C 4 Full range 40 Ci Input capacitance VI = VCC or GND, VCC = 5 V 25°C † Full range is TA = 25°C to 70°C. ‡ Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. UNIT 4 V µA µA pF switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.25 V (see Note 3 and Figures 1 and 2) PARAMETER tPLH tPHL Propagation delay time, low-to-high level (see Figure 1) tsk(o) Output skew time (see Figure 2) Proagation delay time, high-to-low level (see Figure 1) FROM (INPUT) TO (OUTPUT) A Y A Y MIN MAX 3.7 5.7 2.9 5.7 1 UNIT ns ns NOTE 3: All specifications are valid only for all outputs switching simultaneously and in phase. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 CDC204 HEX INVERTER/CLOCK DRIVER SCAS098E – OCTOBER 1989– REVISED OCTOBER 1998 PARAMETER MEASUREMENT INFORMATION From Output Under Test CL = 50 pF (see Note A) 500 Ω LOAD CIRCUIT VCC Input (see Note B) 50% 50% 0 tPLH tPHL VOH 50% Output 50% VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. Input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CDC204 HEX INVERTER/CLOCK DRIVER SCAS098E – OCTOBER 1989– REVISED OCTOBER 1998 PARAMETER MEASUREMENT INFORMATION 50% 1A – 6A Y1 50% 50% 50% tPLH1 Y2 tPHL1 50% 50% tPLH2 Y3 tPHL2 50% 50% tPHL3 tPLH3 Y4 50% 50% tPLH4 Y5 tPHL4 50% 50% tPLH5 tPHL5 50% Y6 50% tPHL6 tPLH6 NOTE A: Output skew, tsk(o), is calculated as the greater of: – The difference between the fastest and slowest of tPHLn (n = 1, 2, . . . , 6) – The difference between the fastest and slowest of tPLHn (n = 1, 2, . . . , 6) Figure 2. Waveforms for Calculation of tsk(o) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 CDC204 HEX INVERTER/CLOCK DRIVER SCAS098E – OCTOBER 1989– REVISED OCTOBER 1998 MECHANICAL INFORMATION DW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 16 PIN SHOWN 0.050 (1,27) 0.020 (0,51) 0.014 (0,35) 16 0.010 (0,25) M 9 0.419 (10,65) 0.400 (10,15) 0.010 (0,25) NOM 0.299 (7,59) 0.293 (7,45) Gage Plane 0.010 (0,25) 1 8 0°– 8° A 0.050 (1,27) 0.016 (0,40) Seating Plane 0.104 (2,65) MAX 0.012 (0,30) 0.004 (0,10) 0.004 (0,10) PINS ** 16 20 24 A MAX 0.410 (10,41) 0.510 (12,95) 0.610 (15,49) A MIN 0.400 (10,16) 0.500 (12,70) 0.600 (15,24) DIM 4040000 / D 02/98 NOTES: A. B. C. D. 6 All linear dimensions are in inches (millimeters). This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). Falls within JEDEC MS-013 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1998, Texas Instruments Incorporated