NEC 2SK3354-S

DATA SHEET
MOS FIELD EFFECT TRANSISTOR
2SK3354
SWITCHING
N-CHANNEL POWER MOS FET
INDUSTRIAL USE
ORDERING INFORMATION
DESCRIPTION
The 2SK3354 is N-channel MOS Field Effect Transistor
PART NUMBER
PACKAGE
2SK3354
TO-220AB
2SK3354-S
TO-262
2SK3354-Z
TO-220SMD
designed for high current switching applications.
FEATURES
• Super low on-state resistance:
★
RDS(on)1 = 8.0 mΩ MAX. (VGS = 10 V, ID = 42 A)
★
RDS(on)2 = 12 mΩ MAX. (VGS = 4 V, ID = 42 A)
★ • Low Ciss: Ciss = 6300 pF TYP.
• Built-in gate protection diode
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage
VDSS
60
V
Gate to Source Voltage
VGSS(AC)
±20
V
ID(DC)
±83
A
ID(pulse)
±332
A
PT
100
W
Drain Current (DC)
Drain Current (pulse)
Note1
Total Power Dissipation (TC = 25°C)
Total Power Dissipation (TA = 25°C)
PT
1.5
W
Channel Temperature
Tch
150
°C
Tstg
–55 to +150
°C
Single Avalanche Current
Note2
IAS
55
A
Single Avalanche Energy
Note2
EAS
302
mJ
Storage Temperature
★
★
Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1 %
★
2. Starting Tch = 25 °C, RG = 25 Ω, VGS = 20 V → 0 V
THERMAL RESISTANCE
Channel to Case
Rth(ch-C)
1.25
°C/W
Channel to Ambient
Rth(ch-A)
83.3
°C/W
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No.
D14131EJ1V0DS00 (1st edition)
Date Published June 1999 NS CP(K)
Printed in Japan
The mark ★ shows major revised points.
©
1999
2SK3354
★ ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTICS
SYMBOL
Drain to Source On-state Resistance
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
RDS(on)1
VGS = 10 V, ID = 42 A
6.3
8.0
mΩ
RDS(on)2
VGS = 4 V, ID = 42 A
8.0
12
mΩ
VGS(off)
VDS = 10 V, ID = 1 mA
1.5
2.0
2.5
V
Forward Transfer Admittance
| yfs |
VDS = 10 V, ID = 42 A
35
59
Drain Leakage Current
IDSS
VDS = 60 V, VGS = 0 V
10
µA
Gate to Source Leakage Current
IGSS
VGS = ±20 V, VDS = 0 V
±10
µA
Input Capacitance
Ciss
VDS = 10 V, VGS = 0 V, f = 1 MHz
Output Capacitance
Gate to Source Cut-off Voltage
S
6300
pF
Coss
1000
pF
Reverse Transfer Capacitance
Crss
490
pF
Turn-on Delay Time
td(on)
ID = 42 A, VGS(on) = 10 V, VDD = 30 V,
100
ns
RG = 10 Ω
1500
ns
td(off)
300
ns
tf
440
ns
106
nC
Rise Time
tr
Turn-off Delay Time
Fall Time
Total Gate Charge
QG
Gate to Source Charge
QGS
20
nC
Gate to Drain Charge
QGD
30
nC
Body Diode Forward Voltage
ID = 83 A , VDD = 48 V, VGS = 10 V
VF(S-D)
IF = 83 A, VGS = 0 V
1.0
V
Reverse Recovery Time
trr
IF = 83 A, VGS = 0 V,
55
ns
Reverse Recovery Charge
Qrr
di/dt = 100 A/µs
100
nC
TEST CIRCUIT 1 AVALANCHE CAPABILITY
D.U.T.
RG = 25 Ω
PG.
VGS = 20 → 0 V
TEST CIRCUIT 2 SWITCHING TIME
D.U.T.
L
50 Ω
VGS
RL
RG
RG = 10 Ω
PG.
VDD
VGS
Wave Form
0
VGS(on)
10 %
90 %
VDD
ID
90 %
90 %
IAS
ID
VGS
0
BVDSS
ID
VDS
ID
τ
VDD
Starting Tch
τ = 1 µs
Duty Cycle ≤ 1 %
TEST CIRCUIT 3 GATE CHARGE
D.U.T.
IG = 2 mA
PG.
2
50 Ω
0
10 %
10 %
Wave Form
RL
VDD
Data Sheet D14131EJ1V0DS00
td(on)
tr
ton
td(off)
tf
toff
2SK3354
PACKAGE DRAWING (Unit: mm)
1) TO-220AB (MP-25)
2) TO-262 (MP-25 Fin Cut)
4.8 MAX.
φ 3.6±0.2
12.7 MIN.
6.0 MAX.
1.3±0.2
1.3±0.2
0.5±0.2
2.8±0.2
2.54 TYP.
0.75±0.3
2.54 TYP.
2
3
8.5±0.2
1
1 2 3
1.3±0.2
4.8 MAX.
4
15.5 MAX.
5.9 MIN.
(10)
4
0.75±0.1
2.54 TYP.
1.0±0.5
1.3±0.2
10.0
12.7 MIN.
3.0±0.3
10.6 MAX.
0.5±0.2
2.8±0.2
2.54 TYP.
1.Gate
2.Drain
3.Source
4.Fin (Drain)
1.Gate
2.Drain
3.Source
4.Fin (Drain)
3) TO-220SMD (MP-25Z)
EQUIVALENT CIRCUIT
4.8 MAX.
(10)
1.3±0.2
Drain
1.4±0.2
1.0±0.3
2
Remark
Body
Diode
Gate
)
.5R 8R)
.
0
(
(0
0.5±0.2
3 2.54 TYP.
2.8±0.2
2.54 TYP. 1
3.0±0.5
11±0.4
8.5±0.2
1.0±0.5
4
Gate
Protection
Diode
Source
1.Gate
2.Drain
3.Source
4.Fin (Drain)
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
Data Sheet D14131EJ1V0DS00
3
2SK3354
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confirm that this is the latest version.
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M7 98. 8