DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA2702GR SWITCHING N-CHANNEL POWER MOS FET DESCRIPTION PACKAGE DRAWING (Unit: mm) The µPA2702GR is N-Channel MOS Field Effect Transistor 8 designed for DC/DC converters and power management 5 1, 2, 3 ; Source 4 ; Gate 5, 6, 7, 8 ; Drain applications of notebook computers. FEATURES PART NUMBER PACKAGE µPA2702GR Power SOP8 4.4 5.37 MAX. 0.15 0.05 MIN. ORDERING INFORMATION 6.0 ±0.3 4 0.8 +0.10 –0.05 1.44 1 1.8 MAX. • Low on-state resistance RDS(on)1 = 9.5 mΩ MAX. (VGS = 10 V, ID = 7.0 A) RDS(on)2 = 15.1 mΩ MAX. (VGS = 4.5 V, ID = 7.0 A) • Low Ciss: Ciss = 900 pF TYP. (VDS = 10 V, VGS = 0 V) • Small and surface mount package (Power SOP8) 0.5 ±0.2 0.10 1.27 0.78 MAX. 0.40 +0.10 –0.05 0.12 M ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) VDSS 30 V Gate to Source Voltage (VDS = 0 V) VGSS ±20 V Drain Current (DC) ID(DC) ±13 A ID(pulse) ±52 A PT 2.0 W Tch 150 °C Tstg –55 to +150 °C IAS 13 A EAS 16.9 mJ Drain Current (pulse) Note1 Total Power Dissipation (TA = 25°C) Channel Temperature Storage Temperature Single Avalanche Current Note3 Single Avalanche Energy Note3 Note2 EQUIVALENT CIRCUIT Drain Body Diode Gate Gate Protection Diode Source Notes 1. PW ≤ 10 µs, Duty Cycle ≤ 1% 2 2. Mounted on ceramic substrate of 1200 mm x 2.2 mm 3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, L = 100 µH, VGS = 20 → 0 V ★ Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is extemally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. G15724EJ2V0DS00 (2nd edition) Date Published May 2002 NS CP(K) Printed in Japan The mark ★ shows major revised points. © 2002 µPA2702GR ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) CHARACTERISTICS ★ SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = 30 V, VGS = 0 V 10 µA Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10 µA 2.5 V Gate Cut-off Voltage Forward Transfer Admittance Drain to Source On-state Resistance VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.0 | yfs | VDS = 10 V, ID = 7.0 A 7 13 RDS(on)1 VGS = 10 V, ID = 7.0 A 7.6 9.5 mΩ RDS(on)2 VGS = 4.5 V, ID = 7.0 A 11.3 15.1 mΩ RDS(on)3 17.2 mΩ S VGS = 4.0 V, ID = 7.0 A 12.9 Input Capacitance Ciss VDS = 10 V 900 pF Output Capacitance Coss VGS = 0 V 380 pF Reverse Transfer Capacitance Crss f = 1 MHz 120 pF Turn-on Delay Time td(on) VDD = 15 V, ID = 7.0 A 9 ns tr VGS = 10 V 5 ns td(off) RG = 10 Ω 35 ns 8 ns Rise Time Turn-off Delay Time Fall Time tf Total Gate Charge QG VDD = 15 V 9 nC Gate to Source Charge QGS VGS = 5 V 3 nC Gate to Drain Charge QGD ID = 13 A 4 nC Body Diode Forward Voltage VF(S-D) IF = 13 A, VGS = 0 V 0.82 Reverse Recovery Time trr IF = 13 A, VGS = 0 V 28 ns Reverse Recovery Charge Qrr di/dt = 100 A/ µs 22 nC TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = −20 → 0 V V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω 1.2 VGS RL Wave Form RG PG. VDD VGS 0 VGS 10% 90% VDD VDS 90% BVDSS IAS VDS VDS ID Starting Tch τ τ = 1 µs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE 2 10% 0 10% Wave Form VDD PG. 90% VDS VGS 0 D.U.T. IG = 2 mA RL 50 Ω VDD Data Sheet G15724EJ2V0DS td(on) tr ton td(off) tf toff µPA2702GR TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA ★ TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE ★ PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 2.8 100 80 60 40 20 0 20 40 60 80 100 120 140 Mounted on ceramic substrate of 1200 mm 2 × 2.2 mm 2.4 2.0 1.6 1.2 0.8 0.4 0 160 0 20 TA - Ambient Temperature - ˚C 40 60 80 100 120 140 160 TA - Ambient Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA 10 ID(pulse) = 52 A d ite V) im 10 )L on S = ( S G RDat V ( PW ID(DC) = 13 A 10 0 1 = 1 m s m s 10 m s Po Lim we ite r Di d s sip at ion 0.1 TA = 25˚C Single Pulse 0.01 0.01 0.1 1 10 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 100 rth(t) - Transient Thermal Resistance - ˚C/W ID - Drain Current - A 100 Rth(ch-A) = 62.5˚C/W 10 1 0.1 0.001 Mounted on ceramic substrate of 1200 mm 2 × 2.2 mm Single Pulse Channel to Ambient 0.01 0.1 1 10 PW - Pulse Width - s Data Sheet G15724EJ2V0DS 100 1000 3 µPA2702GR DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 100 80 Pulsed 10 ID - Drain Current - A ID - Drain Current - A 70 TA = −25˚C 25˚C 75˚C 150˚C 1 0.1 60 50 4.5 V VGS = 10 V 40 4.0 V 30 20 10 0.01 1 2 VDS = 10 V 4 5 3 Pulsed 0 0 | yfs | - Forward Transfer Admittance - S FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 VDS = 10 V Pulsed 10 TA = 150˚C 75˚C 25˚C −25˚C 1 0.1 0.01 0.1 1 10 100 4 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 VDS - Drain to Source Voltage - V DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 40 Pulsed 30 20 ID = 7.0 A 10 0 0 2 4 6 8 10 12 14 16 18 20 VGS - Gate to Source Voltage - V DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE 20 3 Pulsed 15 VGS(off) - Gate Cut-off Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ VGS - Gate to Source Voltage - V VGS = 4.0 V 4.5 V 10 10 V 5 0 0.1 1 10 100 VDS = 10 V ID = 1 mA 2 1 0 −50 −25 ID - Drain Current - A 0 25 50 75 100 125 150 Tch - Channel Temperature - ˚C Data Sheet G15724EJ2V0DS µPA2702GR SOURCE TO DRAIN DIODE FORWARD VOLTAGE 25 100 Pulsed ISD - Diode Forward Current - A 20 VGS = 4 V 15 4.5 V 10 V 10 5 0 −50 −25 Pulsed VGS = 0 V 10 1 0.1 0.01 0 25 50 75 0 100 125 150 175 0.2 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 0.8 1.0 1.2 SWITCHING CHARACTERISTICS 1000 td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF 0.6 100 10000 Ciss Coss 100 Crss VGS = 0 V f = 1 MHz 10 0.1 1 10 td(off) tf 10 td(on) tr VDD = 15 V VGS = 10 V RG = 10 Ω 1 0.1 100 1 VDS - Drain to Source Voltage - V di/dt = 100 A/ µ s VGS = 0 V 100 10 1 0.1 1 10 100 DYNAMIC INPUT/OUTPUT CHARACTERISTICS 100 VDS - Drain to Source Voltage - V 1000 10 ID - Drain Current - A REVERSE RECOVERY TIME vs. DRAIN CURRENT trr - Reverse Recovery Time - ns 0.4 VSD - Source to Drain Voltage - V Tch - Channel Temperature - ˚C 40 8 35 7 VDD = 24 V 15 V 6V 30 25 6 VGS 5 20 4 15 3 10 2 5 1 VDS VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE ID = 13 A 0 0 IF - Drain Current - A 2 4 6 8 10 12 14 16 18 0 20 QG - Gate Charge - nC Data Sheet G15724EJ2V0DS 5 µPA2702GR [MEMO] 6 Data Sheet G15724EJ2V0DS µPA2702GR [MEMO] Data Sheet G15724EJ2V0DS 7 µPA2702GR • The information in this document is current as of May, 2002. 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