DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA1730TP SWITCHING P-CHANNEL POWER MOS FET PACKAGE DRAWING (Unit: mm) The µ PA1730TP which has a heat spreader is a P-Channel MOS Field Effect Transistor designed for power management applications of notebook computers and Li-ion battery protection circuit. 1.44 TYP. • Low on-state resistance RDS(on)1 = 9.5 mΩ MAX. (VGS = –10 V, ID = –6.5 A) RDS(on)2 = 13.5 mΩ MAX. (VGS = –4.5 V, ID = –6.5 A) RDS(on)3 = 15.0 mΩ MAX. (VGS = –4.0 V, ID = –6.5 A) • Low Ciss: Ciss = 3800 pF TYP. • Built-in G-S protection diode • Small and surface mount package (Power HSOP8) 5 1, 2, 3 ; Source 4 ; Gate 5, 6, 7, 8, 9 ; Drain 1.49 ±0.21 FEATURES 8 1 0.8 ±0.2 0.05 ±0.05 +0.10 –0.05 4 8 0.12 M 1.1 ±0.2 1 2.9 MAX. PACKAGE Power HSOP8 0.10 S 1.27 TYP. 0.40 ORDERING INFORMATION µ PA1730TP 4.4 ±0.15 0.15 S 2.0 ±0.2 PART NUMBER 6.0 ±0.3 4 5.2 +0.17 –0.2 +0.10 –0.05 DESCRIPTION 9 4.1 MAX. 5 ABSOLUTE MAXIMUM RATINGS (TA = 25°C, Unless otherwise noted, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) VDSS –30 V Gate to Source Voltage (VDS = 0 V) VGSS !20 V Drain Current (DC) ID(DC)1 !28 A ID(DC)2 !15 A ID(pulse) !100 A PT1 40 W PT2 3 W Channel Temperature Tch 150 °C Storage Temperature Tstg –55 to +150 °C IAS −15 A EAS 22.5 mJ Drain Current (DC) Note1 Drain Current (pulse) Note2 Total Power Dissipation (TC = 25°C) Total Power Dissipation (TA = 25°C) Single Avalanche Current Note3 Single Avalanche Energy Note3 Note1 EQUIVALENT CIRCUIT Drain Body Diode Gate Gate Protection Diode Source Notes 1. Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm), PW = 10 sec. 2. PW ≤ 10 µs, Duty Cycle ≤ 1% 3. Starting Tch = 25°C, VDD = −15 V, RG = 25 Ω, VGS = −20 → 0 V Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. G15935EJ1V0DS00 (1st edition) Date Published March 2002 NS CP(K) Printed in Japan © 2002 µ PA1730TP ELECTRICAL CHARACTERISTICS (TA = 25 °C, Unless otherwise noted, All terminals are connected.) CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = –30 V, VGS = 0 V –1 µA Gate Leakage Current IGSS VGS = !20 V, VDS = 0 V !10 µA –2.5 V Gate Cut-off Voltage Forward Transfer Admittance Drain to Source On-state Resistance VGS(off) VDS = –10 V, ID = –1 mA –1.0 –1.6 | yfs | VDS = –10 V, ID = –6.5 A 11.0 23.0 RDS(on)1 VGS = –10 V, ID = –6.5 A 7.6 9.5 mΩ RDS(on)2 VGS = –4.5 V, ID = –6.5 A 10.3 13.5 mΩ RDS(on)3 VGS = –4.0 V, ID = –6.5 A 11.3 15.0 mΩ S Input Capacitance Ciss VDS = –10 V 3800 pF Output Capacitance Coss VGS = 0 V 1200 pF Reverse Transfer Capacitance Crss f = 1 MHz 500 pF Turn-on Delay Time td(on) VDD = –15 V, ID = –6.5 A 15 ns VGS = –10 V 20 ns RG = 10 Ω 130 ns 50 ns Rise Time tr Turn-off Delay Time td(off) Fall Time tf Total Gate Charge QG VDD = –24 V 70 nC Gate to Source Charge QGS VGS = –10 V 9 nC Gate to Drain Charge QGD ID = –13.0 A 17 nC Body Diode Forward Voltage VF(S-D) IF = 13 A, VGS = 0 V 0.80 V Reverse Recovery Time trr IF = 13 A, VGS = 0 V 53 ns Reverse Recovery Charge Qrr di/dt = 100 A/ µs 57 nC TEST CIRCUIT 1 AVALANCHE CAPABILITY TEST CIRCUIT 2 SWITCHING TIME D.U.T. RG = 25 Ω D.U.T. L RL PG 50 Ω VDD VGS = –20 → 0 V RG PG. VGS (−) VGS Wave Form 0 VGS 10% 90% VDD VDS (−) − IAS 90% BVDSS VDS ID VDS Wave Form τ VDD Starting Tch τ = 1 µs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE D.U.T. PG. 2 IG = −2 mA RL 50 Ω VDD 90% VDS VGS (−) 0 Data Sheet G15935EJ1V0DS 10% 10% 0 td(on) tr ton td(off) tf toff µ PA1730TP TYPICAL CHARACTERISTICS (TA = 25°C) TOTAL POWER DISSIPATION vs. CASE TEMPERATURE DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 2.8 100 80 60 40 20 0 0 20 40 60 80 2.4 2.0 1.6 1.2 0.8 0.4 0 100 120 140 160 0 20 TC - Case Temperature - ˚C 40 60 80 100 120 140 160 TC - Case Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA −100 −10 ID(pulse) PW d = P e W 1 it ) ID(DC) m = s Lim 10 V 1 ) 0 on − ( m = DS s R GS (V Power Dissipation Limited −1 PW = 100 ms TC = 25˚C Single Pulse −0.1 −0.01 −0.1 −1 −10 −100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - ˚C/W ID - Drain Current - A −1000 100 10 Rth(ch-C) = 31.3˚C/W 1 0.1 0.01 100 µ Single Pulse 1m 10 m 100 m 1 10 100 1000 PW - Pulse Width - s Data Sheet G15935EJ1V0DS 3 µ PA1730TP DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS −100 −60 VDS = −10 V −50 ID - Drain Current - A ID - Drain Current - A −10 TA = 150˚C 125˚C 75˚C 25˚C −25˚C −50˚C −1 −0.1 −0.01 −2 Pulsed −4 −3 −0.2 0 −0.4 −0.6 −0.8 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE VDS = −10 V Pulsed TA = −50˚C −25˚C 25˚C 75˚C 125˚C 150˚C 1 −10 −1 −100 RDS(on) - Drain to Source On-State Resistance - mΩ VDS - Drain to Source Voltage - V ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ −20 VGS - Gate to Source Voltage - V 0.1 −0.1 4 −30 0 30 20 10 0 Pulsed 25 20 VGS = −4.0 V −4.5 V 10 −10 V 5 0 −0.1 −1 −10 −100 −5 0 −10 −15 VGS - Gate to Source Voltage - V GATE TO SOURCE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE 30 15 Pulsed ID = −13.0 A −6.5 A DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT −1000 VGS(off) - Gate to Source Cut-off Voltage - V |yfs| - Forward Transfer Admittance - S −1 0 100 10 VGS = −10 V −4.5 V −4.0 V −40 −10 −0.001 −0.0001 Pulsed VDS = −10 V ID = −1 mA −2.0 −1.5 −1.0 −0.5 0 ID - Drain Current - A −50 0 50 100 Tch - Channel Temperature - ˚C Data Sheet G15935EJ1V0DS 150 DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE SOURCE TO DRAIN DIODE FORWARD VOLTAGE 100 Pulsed 20 18 VGS = −4.0 V 16 14 −4.5 V 12 −10 V 10 8 6 ID = −6.5 A −50 0 50 100 VGS = −4.0 V 0V 1 0.1 0.01 0.001 0 0.5 1.0 1.5 Tch - Channel Temperature - ˚C VSD - Source to Drain Voltage - V CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE SWITCHING CHARACTERISTICS td(on), tr, td(off), tf - Switching Time - ns 1000 Ciss 1000 Coss Crss 100 VGS = 0 V f = 1 MHz 10 −0.1 −1 −10 tf tr td(on) 10 VDD = −15 V VGS = −10 V RG = 10 Ω −1 −10 −100 VDS - Drain to Source Voltage - V ID - Drain Current - A REVERSE RECOVERY TIME vs. DIODE CURRENT DYNAMIC INPUT/OUTPUT CHARACTERISTICS 1000 di/dt = 100 A/ µ s VGS = 0 V 100 10 1 −0.1 td(off) 100 1 −0.1 −100 −1 −10 −100 −40 VDS - Drain to Source Voltage - V Ciss, Coss, Crss - Capacitance - pF 10 150 10000 trr - Reverse Recovery Time - ns Pulsed ID = −13.0 A −12 −30 VGS VDS = −24 V −15 V −6 V −20 −10 −8 −6 −4 −10 −2 VDS 0 0 IF - Diode Current - A 10 20 30 40 50 60 70 VGS - Gate to Source Voltage - V 4 ISD - Diode Forward Current - A RDS(on) - Drain to Source On-state Resistance - mΩ µ PA1730TP 0 QG - Gate Charge - nC Data Sheet G15935EJ1V0DS 5 µ PA1730TP [MEMO] 6 Data Sheet G15935EJ1V0DS µ PA1730TP [MEMO] Data Sheet G15935EJ1V0DS 7 µ PA1730TP • The information in this document is current as of March, 2002. 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