NTSC MITSUMI NTSC PAL Converter MM1130 PAL Converter Monolithic IC MM1130 Outline This is an NTSC/PAL signal switching IC. In PAL conversion mode, a frequency-converted (fc=4.43MHz) NTSC format chroma signal is phase converted (R-Y axis component is inverted) every 1 hour by shifting burst signal phase by 45°. Circuit configuration includes VCO (horizontal sync), VCXO (phase conversion carrier), phase conversion circuit, switches, amps, etc. Features 1. PAL conversion with phase conversion performed 2. Two possible phase conversion carriers : crystal oscillation and external input 3. No adjustments 4. Four possible mode selections by CTL and EXT pins Package SDIP-22A (MM1130XD) Applications 1. VCR Block Diagram NTSC MITSUMI PAL Converter MM1130 Pin Description Pin no. Pin name 1 chroma IN 2 CTL 3 C.SYNC IN Function Inputs chroma signal Mode setting pin Inputs composite sync signal 4 LP2 Time constant connection pin for H. SYNC APC loop LPF 5 R H. SYNC APC feedback pin 6 C2 Pin for connecting H. SYNC APC free run frequency setting capacitor 7 BGP ADJ Fine tuning of position for sampling burst signal. Use open. Internal equivalent circuit diagram NTSC MITSUMI Pin no. Pin name Function 8 OUT Amp output pin 9 EXT Mode setting pin 10 AMP IN 11 GND1 12 CONV.OUT Amp input pin GND pin Multiplication circuit output pin 13 VCC VCC pin. Inputs 5V. 14 XT1 Carrier (2fsc) oscillation circuit output pin 15 XT2 Carrier (2fsc) input pin PAL Converter MM1130 Internal equivalent circuit diagram NTSC MITSUMI Pin no. Pin name Function 16 C1 Carrier APC phase shift pin 17 LP1 Time constant connection pin for carrier APC loop LPF 18 PS IN2 Carrier APC input pin. Pin 18 input signal burst signal and carrier signal are phase locked.a 19 PS IN1 Burst signal phase input pin during PAL conversion. 20 S2 Phase shift circuit output pin. Signal is Pin 21 output inverted. 21 S1 Phase shift circuit output pin. Signal is Pin 20 output inverted. 22 GND2 GND pin PAL Converter MM1130 Internal equivalent circuit diagram NTSC MITSUMI Absolute Maximum Ratings PAL Converter MM1130 (Ta=25°C) Item Symbol Ratings Units Storage temperature TSTG -40~+125 °C Operating temperature TOPR -20~+75 °C Power supply voltage VCC max. 7 V Allowable loss Pd 600 mW Electrical Characteristics Item (Except where noted otherwise, Ta=25°C, VCC=5.0V, SW13 : b) Symbol Measurement circuit Measurement conditions Operating power supply voltage VCC Consumption current ICC 13 SW2, 9, 13 : a, no input Dynamic range D Slew mode (SW2 : b, SW9 : a, VIN1=SG1, VIN3=SG2) Gain Gt 8 1 Phase difference θt 8 2 PAL conversion mode Hn (SW2 : a, SW9 : a, VIN1=SG1, VIN3=SG2) 3 Burst gain G1bt 8 1 1 Red gain G1r 8 1 Green gain G1g 8 Blue gain G1b 8 1 Burst phase θ1bt 8 Red phase θ1r 8 Green phase θ1g 8 Blue phase θ1b 8 PAL conversion mode Hn+1 (SW2 : a, SW9 : a, VIN1=SG1, VIN3=SG2) 3 Burst gain G2bt 8 1 Red gain G2r 8 1 Green gain G2g 8 1 1 Blue gain G2b 8 Burst phase θ2bt 8 Red phase θ2r 8 Green phase θ2g 8 Blue phase θ2b 8 (SW2 : a, SW9 : a, VIN1=SG1, VIN3=SG2) 4 DC step V 8 BGP timing t1 8 5 5 BGP width t2 8 Hn/Hn+1 switching timing t3 8 5 VCO (SW2 : a, SW9 : a, VIN1 : N0) Free-running frequency fo1 6 VIN3 : GND Acquisition range fc1 6 VIN3 : SG3 6 VCXO (SW2 : b, SW9 : b) * * * * * * * * * * * * * * * * * Free-running frequency fo2 14 Acquisition range fc2 14 (SW2 : b, SW9 : b, VIN1=SG5, VIN3=SG3) Carrier leak VC1 12 Control pin input resistance (VIN1=SG1, VIN3=SG2) CTL pin switching voltage Vt1 3 EXT pin switching voltage Vt2 9 VIN1 : No, VIN3 : 5.0V VIN1 : SG4, VIN3 : SG2 *7 Min. Typ. Max. Units 4.7 0.8 5.0 5.3 V 29.0 40.0 mA VP-P -1.0 -5 0 0 1.0 5 dB deg -1.0 -1.0 -1.0 -1.0 130.0 98.5 235.6 342.6 0 0 0 0 135.0 103.5 240.6 347.6 1.0 1.0 1.0 1.0 140.0 108.5 245.6 352.6 dB dB dB dB deg deg deg deg -1.0 0 1.0 -1.0 0 1.0 -1.0 0 1.0 -1.0 0 1.0 -145.0 -135.0 -125.0 -113.5 -103.5 -93.5 -250.6 -240.6 -230.6 -357.6 -347.6 -337.6 dB dB dB dB deg deg deg deg 3.5 3.7 -0.6 4.3 4.5 0.2 mV µS µS µS 14.2 15.7 17.2 kHz 1.5 kHz 8.86 8.86 8.86 MHz 6438 7238 8038 400 Hz *8 Lower pin 3 from 5V. Voltage when pin 8 switches. Lower pin 9 from 5V. Voltage when pin 8 switches. 40 5.1 5.3 1.0 -20 dB 0.7 1.4 2.1 V 0.7 1.4 2.1 V NTSC MITSUMI PAL Converter MM1130 Input Signals SG1 Color bar chroma signal f=4.433619MHz V=630mVP-P SG2 C. SYNC signal 0V-5V SG3 15.74kHz pulse wave f : frequency variation 0V-5V SG4 Color bar chroma signal f : frequency variation V=630mVP-P SG5 Continuous sine wave f : 4.433619MHz V=630mVP-P SG3 5V SG4 4.7µS variable 630mVp-p 0V Carrier frequency variable Notes: 1 Gain is calculated by 20log (Pin 8 level/Pin 1 level). 2 Phase difference is difference between input and output phases (given B-Y axis as 0°.) 3 Hn output is 1 horizontal output after input signal burst is shifted +45°. Hn+1 output is 1 horizontal output after input signal burst is shifted +45°, and that signal is R-Y converted. 4 DC step difference is the total of burst sampling step different during PAL conversion and 1H switching step difference. * * * * 1H 1H burst sampling step difference 1H switching step difference burst sampling *5 BGP, Hn/Hn + 1 Switching Timing 4.7µS C.SYNC t1 t2 BGP Hn/Hn+1 switching timing t3 This is the smaller of frequency f and horizontal sync signal frequency (fH=15.73khz) difference when the *6 frequencies are separated sufficiently high and low, then brought closer, and the waveform locks. *7 This is the smaller of frequency f and carrier frequency (fC=4.433619MHz) difference when the frequencies are separated sufficiently high and low, then brought closer, and the waveform locks. 8 Carrier leak is the 8.86MHz component level at Pin 12. Vc1=20log (8.86MHz component/4.43MHz component) dB * NTSC MITSUMI PAL Converter MM1130 Mode Settings CTL EXT L L PAL conversion mode H L Through mode H H R-Y conversion mode L H Hn + 1 (PAL) output mode PAL conversion mode R-Y R-Y R-Y Burst Through mode Chroma Chroma B-Y Burst B-Y B-Y Chroma Burst (Hn+1) (Hn) Switching every 1H R-Y conversion output mode Hn + 1 (PAL) output mode R-Y R-Y Burst B-Y B-Y Chroma Measuring Circuit Burst Chroma NTSC MITSUMI PAL Converter MM1130 Application Circuits 1. For crystal oscillation of 2fsc 2. For external input of 2fsc 2fsc phase *1 Input burst phase Regarding 2fsc input Input 2fsc with input level of more than 500mVP-P and phase as shown in the figure at left.