E2C0011-27-Y4
¡ Semiconductor
MSC1164
¡ Semiconductor
This version: Nov.
1997
MSC1164
Previous version: Jul. 1996
20-Bit Grid/Anode Driver
GENERAL DESCRIPTION
The MSC1164 is a monolithic IC using the Bi-CMOS process technology for hybridizing CMOS
and bipolar transistors on the same chip. The logic portion such as the input stage, shift register
and latch is fabricated by CMOS and the output driver requiring a high withstand voltage is
fabricated by bipolar transistors.
Since a 32-pin plastic SSOP package is used, the display unit size can be reduced.
FEATURES
The MSC1164 is designed as a VFD grid/anode driver with emitter-follower force output with
20-bit active pull-down and built-in 20-bit shift register and latch.
• Logic Supply Voltage (VCC)
: 5V
: 65V
• Driver Supply Voltage (VHV)
• Driver Output Current
IOHVH1 :–40mA (Only one driver output: "H")
IOHVH2 :–2mA (All driver outputs: "H")
IOHVL :2mA
• 20-bit output (with latch circuit)
• 20-bit shift register
• Clock frequency
: 4MHz
• Package options:
32-pin plastic SSOP (SSOP32-P-430-1.00-K)
(Product name: MSC1164GS-K)
30-pin plastic shrink DIP (SDIP30-P-400-1.78) (Product name: MSC1164SS)
1/13
¡ Semiconductor
MSC1164
BLOCK DIAGRAM
DIN
LS
CHG
CL
V CC
V HV
D
HVO1
R-1
1
1
HVO2
R-2
2
2
20-Bit Latch
20-Bit Shift Register
CLK
HVO20
R-20
20
20
Q
DOUT
GND
2/13
¡ Semiconductor
MSC1164
INPUT AND OUTPUT CONFIGURATION
Schematic Diagrams of Logic Portion Input and Output Circuits
Input Pin
VCC
VCC
INPUT
GND
GND
Output Pin
VCC
VCC
DOUT
GND
GND
Schematic Diagram of Driver Output Circuit
VHV
VHV
HVO
GND
GND
3/13
¡ Semiconductor
MSC1164
PIN CONFIGURATION (TOP VIEW)
NC
1
32
NC
NC
2
31
CHG
DOUT
3
30
DIN
LS
4
29
CLK
CL
5
28
GND
VCC
6
27
VHV
HVO20
7
26
HVO1
HVO19
8
25
HVO2
HVO18
9
24
HVO3
HVO17
10
23
HVO4
HVO16
11
22
HVO5
HVO15
12
21
HVO6
HVO14
13
20
HVO7
HVO13
14
19
HVO8
HVO12
15
18
HVO9
HVO11
16
17
HVO10
NC: No-connection pin
32-Pin Plastic SSOP
NC 1
30 CHG
DOUT 2
29 DIN
LS 3
28 CLK
CL 4
27 GND
VCC 5
26 VHV
HVO20 6
25 HVO1
HVO19 7
24 HVO2
HVO18 8
23 HVO3
HVO17 9
22 HVO4
HVO16 10
21 HVO5
HVO15 11
20 HVO6
HVO14 12
19 HVO7
HVO13 13
18 HVO8
HVO12 14
17 HVO9
HVO11 15
16 HVO10
NC: No-connection pin
30-Pin Plastic Shrink DIP
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¡ Semiconductor
MSC1164
PIN DESCRIPTION
Function
Pin
Symbol
Driver Output
26 - 7
HVO1 HVO20
Driver Power Supply
27
VHV
Power supply pin for driver circuit.
Driver GND
Logic GND
28
GND
GND pin for the driver circuit.
GND pin for the logic circuit.
Clear Input
5
Description
Driver output pin, applicable to each bit of shift register.
CL
Clear input pin with pull-up resistor. Normally "H" level. In this
condition, the driver outputs "H" or "L" according to the
corresponding latch output level. Setting this pin to "L" enables
the driver output to be fixed at "L" irrespective of latch output.
Latch Strobe Input
4
LS
Latch strobe input pin with neither pull-up nor pull-down resistor.
When LS is "H", the output of the shift register becomes that of the
latch circuit.
When LS is "L", the latch circuit holds the contents of the shift
register that are immediately before LS goes "L".
Data Input
30
DIN
Shift register input pin with neither pull-up nor pull-down resistor.
Display data is input in synchronization with clock. (Positive Logic)
Logic Power Supply
6
VCC
Power supply pin for logic (except driver).
VCC should be 4.5V to 5.5V.
Data Output
3
DOUT
Clock Input
29
CLK
Clock input pin. Data of shift register is shifted from one stage to
the next at the rising edge of clock.
Test Input
31
CHG
Test input pin with a pull-down resistor. Normally "L". If CL = "H"
in this condition, the driver outputs "H" or "L" according to the
corresponding latch output.
Note:
Serial output pin for shift register.
Pin numbers shown are for 32-pin plastic SSOP.
5/13
¡ Semiconductor
MSC1164
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Condition
Rating
Unit
Note
Logic Supply Voltage
VCC
Applicable to logic supply
voltage pin
–0.3 to +65
V
1
Driver Supply Voltage
VHV
Applicable to driver supply
voltage pin
VCC to 70
V
1, 2
Input Voltage
VIN
Applicable to all input pins
–0.3 to VCC +0.3
V
1
Data Output Voltage
VOD
Applicable to data output pin
–0.3 to VCC +0.3
V
1
Driver Driving Frequency
fDRV
Duty cycle 50% max
0 to 15
kHz
—
PD
Ta £ 25°C
790
mW
—
Rj-a
—
158
°C/W
3
TSTG
—
–55 to +150
°C
—
Power Dissipation
Thermal Resistance of
Package
Storage Temperature
Notes: 1) Maximum Supply Voltage with respect to GND
2) Stresses beyond "Absolute Maximum Rating" may cause permanent damage to the
device.
3) Thermal resistance of the package (between junction and atmosphere)
The junction temperature (Tj) expressed by the equation below must not exceed
150˚C.
Tj=P ¥ Rj–a+Ta (P: Maximum power consumption)
6/13
¡ Semiconductor
MSC1164
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Condition
Min.
Max.
Unit
Logic Supply Voltage
VCC
Applicable to logic supply voltage pin
4.5
5.5
V
Driver Supply Voltage
VHV
Applicable to driver supply voltage pin
10
65
V
VCC=4.5V
3.6
—
V
VCC=5.5V
4.4
—
V
VCC=4.5V
—
0.9
V
VCC=5.5V
—
1.1
V
High Level Input Voltage
VIH
Applicable to all input pins
Low Level Input Voltage
VIL
Applicable to all input pins
High Level Driver Output
Current
IOHVH1
Only one driver output is High
Other driver outputs are High
—
–40
mA
High Level Driver Output
Current
IOHVH2
All driver output pins are High
—
–2
mA
Low Level Driver Output
Current
IOHVL
Applicable to all driver output pins
—
2
mA
CLK Frequency
ff
See timing diagram
—
4
MHz
tWCLK
See timing diagram
75
—
ns
Data in Setup Time
tDS
See timing diagram
50
—
ns
Data in Hold Time
tDH
See timing diagram
50
—
ns
LS Pulse Width
tWLS
See timing diagram
80
—
ns
CLK-LS Delay Time
tDCL
See timing diagram
50
—
ns
LS-CLK Delay Time
tDLC
See timing diagram
0
—
ns
LS-CHG Delay Time
tDLCG
See timing diagram
0
—
ms
LS-CL Delay Time
tDLCL
See timing diagram
0
—
ms
CHG Pulse Width
tWCHG
See timing diagram
2
—
ms
CL Pulse Width
tWCL
See timing diagram
2
—
ms
Operating Temperature
Top
—
–40
85
°C
CLK Pulse Width
7/13
¡ Semiconductor
MSC1164
ELECTRICAL CHARACTERISTICS
DC Characteristics
(VCC=5V±10%, VHV=10V to 65V, Ta=–40°C to +85°C)
Parameter
Symbol
ICC1
Logic Supply Current
ICC2
IHV1
Driver Supply Current
High Level Input Voltage
Condition
No load
VCC=5.5V
IHV2
No load
VCC=5.5V
VIH
—
2.3
3.4
—
0.5
1.0
All driver output: Low
—
—
1
mA
All driver output:
High, Ta=25°C
—
1.3
2.0
mA
VCC=4.5V
3.15
—
—
V
V
VCC=5.5V
3.85
—
—
—
—
1.35
V
VCC=5.5V
—
—
1.65
V
—
—
±1
mA
pF
Ta=25°C
Input Capacitance
CIN
Ta=25°C
Low Level Data Output
Voltage
VODL1
IO=20mA
mA
VCC=4.5V
IIN
IO=–20mA
Unit
—
Input Leakage Current
VODH1
Max.
All input: Low
VIL
High Level Data Output
Voltage
Typ.
All input: High, All
driver output: High, Ta=25°C
Low Level Input Voltage
—
Min.
—
15
—
VCC=4.5V
4.2
—
—
V
VCC=5.5V
5.2
—
—
V
VCC=4.5V
—
—
0.2
V
V
VCC=5.5V
—
—
0.2
VCC=4.5V
3.5
—
—
V
VCC=5.5V
4.5
—
—
V
VCC=4.5V
—
—
1.1
V
VCC=5.5V
—
—
1.1
V
High Level Data Output
Voltage
VODH2
IO=–0.1mA
Low Level Data Output
Voltage
VODL2
IO=0.1mA
High Level Driver Output
Voltage
VOHVH
IOHV=–40mA
VHV–4
—
—
V
Low Level Driver Output
Voltage
VOHVL
IOHV=2mA
—
—
3.0
V
AC Characteristics
(VCC=5V, VHV=65V, Ta=25°C)
Parameter
Symbol
Remarks
Min.
Typ.
Max.
Unit
CLK-DOUT Delay Time
tPD
See timing diagram and test circuit
—
100
150
ns
Delay Time Low to High
tDLH
See timing diagram and test circuit
—
0.3
1
ms
Transit Time Low to High
tTLH
See timing diagram and test circuit
—
2
5
ms
Delay Time High to Low
tDHL
See timing diagram and test circuit
—
0.3
1
ms
Transit Time High to Low
tTHL
See timing diagram and test circuit
—
2
5
ms
8/13
CLOCK
T1/2
tDS tDH
T3/4
T(19,20)
T1/2
tDS tDH
tWCLK
T3/4
tWCLK
¡ Semiconductor
TIMING DIAGRAM
1/f f
DIN
tWD
tPD
tPD
DOUT
tDCL tWLS
tDLC
LS
tDLCG
CHG
tWCHG
tDLCL
tWCHG
tWCL
tWCL
CL
tDLH
tDLH
tDHL
HVO (1, 2, 19, 20)
tDHL
90%
10%
tDLH
90%
10%
HVO (OTHERS)
tTLH
tTLH
tTHL
tTHL
tTLH
MSC1164
9/13
¡ Semiconductor
MSC1164
Test circuit
20pF
V CC
V HV
HVO1
1.5kW
HVO2
5.0V
GND
CL
CHG
DIN
LS
HVO20
CLK
65V
DOUT
30pF
10/13
¡ Semiconductor
MSC1164
FUNCTIONAL DESCRIPTION
Function Table
CLK
R-20
DOUT
R3n
R19n
R19n
R3n
R19n
R19n
DIN
R-1
R-2
R-3
R-4
H
H
R1n
R2n
L
L
R1n
R2n
CL
CHG
LS
R.X
HVO.X
L
X
X
X
L
H
H
X
X
H
H
L
H
H
H
H
L
H
L
L
H
L
L
X
NC
•••••••••••••••
L: Low Level, H: High Level, X: Don't Care, NC: Change
NOTES ON USE
1.
2.
The MSC1164 is designed as a grid/anode driver of VFD.
The data applied to the data input pin is read into the shift register at the rising edge of the
clock and shifted sequencially to the shift register synchronizing with the clock.
The shift register output drives the output driver, passing through the latch and the NOR
circuit.
Setting the CL pin to "L" makes all driver outputs go into "L". This function can be used for
setting display blanking.
The contents of the shift register are undefined after power is turned on.
Therefore, two or more driver outputs may go into "H" at the same time after power-on. (If
it happens, an overloading beyond the power dissipation limit may occur to cause a device
break-down.)
To avoid this, take the following procedure:
1) Turn on the power of the logic portion while holding the CL pin to "L".
2) Turn on the power of the driver portion.
3) Apply a "L" level signal to the DIN pin and send clock pulses by the specified number
of grids to reset ("L") the entire contents of the shift register.
4) Initialize the driver outputs to "L".
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¡ Semiconductor
MSC1164
PACKAGE DIMENSIONS
(Unit : mm)
SSOP32-P-430-1.00-K
Mirror finish
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
0.60 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
12/13
¡ Semiconductor
MSC1164
(Unit : mm)
SDIP30-P-400-1.78
Package material
Lead frame material
Pin treatment
Solder plate thickness
Package weight (g)
Epoxy resin
42 alloy
Solder plating
5 mm or more
1.80 TYP.
Notes for Mounting the Surface Mount Type Package
The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which
are very susceptible to heat in reflow mounting and humidity absorbed in storage.
Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the
product name, package name, pin number, package code and desired mounting conditions
(reflow method, temperature and times).
13/13