E2B0027-27-Y2 ¡ Semiconductor MSM5238 ¡ Semiconductor This version: Nov. 1997 MSM5238 Previous version: Mar. 1996 32-DOT LCD COMMON DRIVER GENERAL DESCRIPTION The MSM5238 is a dot matrix LCD common driver LSI which is fabricated using low power CMOS metal gate technology. The scanning signal in one matrix display frame can be divided into up to 1/32 duty. This LSI consists of 32-bit shift register, 32-bit level shifter and 32-bit 4-level driver. This LSI can drive a variety of LCD panels because the bias voltage, which determines the LCD driving voltage, can be optionally supplied from an external source. FEATURES • Supply voltage : 3 to 7V • LCD driving voltage : 3 to 16V • Applicable LCD duty : 1/32 to 1/64 (1/64 duty is available when MSM5238s are cascade-connected) • Bias voltage can be supplied externally. • Applicable segment driver: MSM5839B/C (40 outputs) • Package options: 44-pin plastic QFP (QFP44-P-910-0.80-K) (Product name: MSM5238GS-K) 44-pin plastic QFP (QFP44-P-910-0.80-L2) (Product name: MSM5238GS-L2) 44-pin plastic QFP (QFP44-P-910-0.80-2K) (Product name: MSM5238GS-2K) 1/12 ¡ Semiconductor MSM5238 BLOCK DIAGRAM O1 VDD V1 V2 V3 VEE(V4) O32 32-Bit 4-Level Driver VDD VEE 32-Bit Level Shifter VDD DF VSS DI CP 32-Bit Shift Register VSS DO 2/12 ¡ Semiconductor MSM5238 34 DO 35 VEE(V4) 36 V3 37 V2 38 V1 39 VDD 41 CP 42 DF 43 NC 44 DI (Top view) 40 VSS PIN CONFIGURATION (TOP VIEW) O24 O10 10 24 O23 O11 11 23 O22 22 O9 25 O21 O25 9 21 26 20 8 O20 O26 O8 O19 O27 27 19 28 7 O18 6 O7 18 O6 17 O28 O17 29 *(VDD) 5 O16 O29 O5 16 O30 30 15 31 4 14 3 O4 O15 O3 O14 O31 13 O32 32 O13 33 2 12 1 O2 O12 O1 NC: No connection O3 O4 O5 O6 O7 O8 O9 3 4 5 6 7 8 9 11 O11 O2 2 10 O10 O1 1 44-Pin Plastic QFP (Type K) DI 44 12 O12 NC 43 13 O13 DF 42 14 O14 CP 41 15 O15 25 24 23 O23 O22 O21 O24 DO 22 26 O20 34 O25 21 O26 35 27 O19 VEE(V4) 28 20 O27 36 29 O18 V3 O28 V2 19 30 O17 37 O29 18 31 38 O30 *(VDD) V1 32 O16 17 O31 16 39 33 40 O32 VSS VDD NC: No connection 44-Pin Plastic QFP (Type L) * Pin 17 is an auxiliary pin. It must be connected to the power supply or left open. Note : The figure for Type L shows the configuration viewed from the reverse side of the package. Pay attention to the difference in pin arrangement. 3/12 ¡ Semiconductor MSM5238 ABSOLUTE MAXIMUM RATINGS Symbol Condition Rating Unit Supply Voltage Parameter VDD Ta = 25°C –0.3 to +7 V Supply Voltage VLCD Ta = 25°C, VDD–VEE 0 to 16.5 V VI Ta = 25°C –0.3 to VDD V TSTG — –55 to +150 °C Input Voltage Storage Temperature RECOMMENDED OPERATING CONDITIONS Parameter Symbol Condition Range Unit Supply Voltage VDD — 3 to 7 V Supply Voltage VLCD VDD–VEE * 3 to 16 V Operating Temperature Top — –40 to +85 °C N MOS load 5 — Fan-Out * VDD ≥ V1 ≥ V2 ≥ V3 ≥VEE (V4) 4/12 ¡ Semiconductor MSM5238 ELECTRICAL CHARACTERISTICS DC Characteristics Parameter “H” Input Voltage “L” Input Voltage Input Current “H” Output Voltage “L” Output Voltage Symbol VDD (V) VSS (V) VEE (V) 5 0 0 to –9 7 0 5 0 7 0 0 to –7 IIH 7 0 –7 IIL 7 0 –7 5 0 0 to –9 7 0 5 7 *1 VIH1/VIH2 *1 VIL1/VIL2 7 ON Resistance 5 RON (V2, V3) OFF Leakage Current IOFF Supply Current IDD Input Capacitance CI 7 — 3.6/4.2 — — — 5.2/6.0 — — — — — 0.8/0.4 V 0 to –7 0 to –9 V — — VI = 7V — — 1 VI = 0V — — –1 IO = –40mA 4.2 — — 0 to –7 IO = –56mA 5.8 — — 0 0 to –9 IO = 0.2mA — — 0.4 0 0 to –7 IO = 0.3mA — — 0.4 VO: DRV output VO – V1 = 0.25V V1 = VEE to (VDD – 0.25V) VO – V4 = 0.25V V4 (VEE): 0V MAX — 500 2000 — 250 1000 — 350 1400 — 200 800 — 800 3200 — 450 1800 — 550 2200 VOL *2 RON (V1, VEE(V4)) Min. Typ. Max. Unit — VOH *2 5 Condition 0 0 0 –5 0 0 0 –7 0 0 0 –5 0 0 1.1/0.5 mA V V VN = V2 or V3 VO = DRV output VO – VN = 0.25V VN = VEE to (VDD – 0.25V) 0 –7 — 350 1400 5 0 –9 — — — ±5 7 0 –7 — — — ±5 5 0 –9 — — — 0.5 7 0 –7 — — — 1.0 — — — — – 5 — W W mA mA pF *1 VIH1 and VIL1 are input pins for DI and DF, while VIH2 and VIL2 are input pins for CP. *2 VOH and VOL are output pins for DO. 5/12 ¡ Semiconductor MSM5238 Switching Characteristics Parameter VDD (V) Condition Min. Typ. Max. 5 — — — 400 7 — — — 550 5 — 400 — — 7 — 300 — — 5 — 100 — — 7 — 50 — — 5 — 800 — — 7 — 500 — — tr (cp) 5 — — — 0.5 tf (cp) 7 — — — 0.1 Symbol Clock Frequency f (cp) Clock Pulse Width tw (cp) Data Setup Time (DATAIN ➝ CP) tSETUP Data Hold Time (DATAIN ➝ CP) tHOLD Clock Pulse Rise/Fall Time Unit kHz ns ns ns ms tf (cp) tr (cp) 90% CP 90% 50% 10% 50% 50% 10% tw (cp) tSETUP DI 50% tHOLD 50% 6/12 ¡ Semiconductor MSM5238 FUNCTIONAL DESCRIPTION Pin Functional Description • DI Shift register data input pin which inputs the data on scanning lines in synchronization with a clock (positive logic). This LSI can optionally divide the scanning signal up to 1/32 duty LCD panel because it consists of the 32-bit shift register. • CP Clock pulse input pin for the 32-bit shift register. The data is shifted to the 32-bit shift register at the falling edge of the clock pulse. A data set up time (tSETUP) and data hold time (tHOLD) are required between DI and CP. (Refer to Switching Characteristics.) A Schmitt circuit is included in the CP input circuit. • DF Synchronous signal input pin for alternate signal for LCD driving. • VDD, VSS VDD is a power supply pin, which is normally from 3.0V to 7.0V. VSS is a ground pin, which is 0V. • O1 - O32 Display data output pins which correspond to each data bit in the latch. One of V1, V2, V3 and VEE (V4) is selected as a display driving voltage source based on the combination of latched data level and DF signal. Refer to the Truth Table. O1 - O32 are connected to the common side of the LCD panel. 7/12 ¡ Semiconductor MSM5238 • V1, V2, V3, VEE (V4) Bias supply voltage pins to drive the LCD. Use an external bias voltage supply for driving the LCD. • DO Shift register output pin. The data which was input from DI is output from DO with 32 bits delay, synchronized with the clock pulse. The MSM5238 is used at 1/32 duty and also at 1/64 duty through cascade connection. Refer to Figure 1 below. ¥ 32 64 ¥ n LCD panel ¥ 32 Frame signal DI O1 DF Clock CP O32 DI O1 DO MSM5238 DF CP VDD V1 V2 V3 VEE(V4) Vss O32 DO MSM5238 VDD V1 V2 V3 VEE(V4) Vss GND DF +5V –V Bias Circuit Figure 1 Truth Table Latched data L H DF LCD driver output L V2 H V4 L V3 H V1 8/12 ¡ Semiconductor MSM5238 NOTES ON USE Note the following when turning power on and off: The LCD drivers of this IC require a high voltage. For this reason, if a high voltage is applied to the LCD drivers with the logic power supply floating, excess current flows. This may damage the IC. Be sure to carry out the following power-on and power-off sequences: When turning power on: First VDD ON, next VEE (V4), V3, V2, V1 ON. Or both ON at the same time. When turning power off: First VEE (V4), V3, V2, V1 OFF, next VDD OFF. Or both OFF at the same time. 9/12 ¡ Semiconductor MSM5238 PACKAGE DIMENSIONS (Unit : mm) QFP44-P-910-0.80-K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.35 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 10/12 ¡ Semiconductor MSM5238 (Unit : mm) QFP44-P-910-0.80-L2 Spherical surface Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.35 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 11/12 ¡ Semiconductor MSM5238 (Unit : mm) QFP44-P-910-0.80-2K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Epoxy resin 42 alloy Solder plating 5 mm or more Package weight (g) 0.41 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 12/12