E2C0019-27-Y5 ¡ Semiconductor MSC1208 ¡ Semiconductor This version: Nov. 1997 MSC1208 Previous version: Jul. 1996 23-bit ¥ 2 Duplex Controller/Driver with Digital Dimming and Keyscan Function GENERAL DESCRIPTION The MSC1208 is a Bi-CMOS display driver for 1/2-duty vacuum fluorescent display tube. It consists of 58-bit shift registers, latch circuits, a 10-bit digital dimming circuit, 4 ¥ 4 switch matrix, and a keyscan circuit for 2-channel, 3-contact rotary switch. With these features, the MSC1208 not only can display frequencies for audio systems used in automobile applications and various information, but also can accept keyboard entry. Thus the front panel functions can be carried out only by this IC. Since the MSC1208 has the data parity check function and the self-check functions, inspection at shipment and failure detection can easily be performed. In addition, since the MSC1208 uses serial interfacing, only two signal lines, DATA ENABLE and DATA I/O, are used for connection with a microcontroller. FEATURES • Power supply voltage : VDD=8 to 18V (Built-in 5V-regulator for logic) • Operating temperature range : –40 to 85°C • Directly drives 23 segments : IOH=–8.8mA, Max. at VOH=VDD–0.8V • Built-in 4 ¥ 4 switch matrix and key scan circuit for 2ch, 3-contact switching • Built-in digital dimming circuit with 10-bit resolution • Data parity check function • Self-check function (segment ON/OFF at intervals of about 1 second in test mode) • Built-in RC oscillator (capacitor is connected externally) • Built-in power-on reset circuit • Package: 42-pin plastic shrink DIP (SDIP42-P-600-1.78) : (Product name : MSC1208SS) ¥¥¥ indicates the code number. 1/14 ¡ Semiconductor MSC1208 BLOCK DIAGRAM SEG1 VDD SEG23 Segment Driver POR Regulator GND Parity Checker 5V 46Æ23 Segment Control Parity Generator PWMOUT bit 46 to 24 (Grid2) L DATA ENABLE DATAI/O 46 bit Latch bit56 to 1 56 2 bit 23 to 1 (Grid1) 56 57 bit56 bit47 bit46 D bit58, Parity Dimming data Display data 58 bit Shift Register C R bit1 bit56 to 47 10-bit Presetable Down Counter SI C S S 4 4 S S 4 4 GRID2 to PWM OUT PWM 58-bit Shift Register (26-bit presetable+32-bit¥"1") S GRID1 Grid Pre-driver Timing Generator OSC OSC out PE S 2 8 Parity Generator Vreg TEST L 4-bit L 4-bit 4 4 Latch Latch Timing Generator Row 4 3 2 1 4-bit 4-bit L Latch L Latch 4 4 L 3-bit Latch L 3-bit Latch 3 Col4 to 7 Rotary Direction Checker & Up/down Counter 3 Col1 to 3 Detector w/debounce Col 7 6 5 4 3 2 1 With100kW pull-up resistor 2/14 ¡ Semiconductor MSC1208 PIN CONFIGURATION (TOP VIEW) SEG18 1 42 VDD SEG19 2 41 SEG17 SEG20 3 40 SEG16 SEG21 4 39 SEG15 SEG22 5 38 SEG14 SEG23 6 37 SEG13 ROW1 7 36 SEG12 ROW2 8 35 SEG11 ROW3 9 34 SEG10 ROW4 10 33 SEG9 COL1 11 32 SEG8 COL2 12 31 SEG7 COL3 13 30 SEG6 COL4 14 29 SEG5 COL5 15 28 SEG4 COL6 16 27 SEG3 COL7 17 26 SEG2 DATA ENABLE 18 25 SEG1 DATAI/O 19 24 GRID2 GND 20 23 GRID1 OSC 21 22 TEST 42-Pin Plastic Shrink DIP 3/14 ¡ Semiconductor MSC1208 PIN DESCRIPTIONS Pin Symbol Type Description 42 VDD — Power Sypply Voltage. A 12V power supply is connected. 20 19 GND DATA — I/O Ground. 0V is applied. Serial data input-output. Enters the input mode when a "H" level signal is input to DATA ENABLE; enters the output mode when a "L" level signal is input to DATA ENABLE. 18 DATA ENABLE I Serial clock input. During the "H" level of clock pulse, the input data of the DATA I/O pin (display data or dimming data) is read, and during the "L" level of clock pulse, the output data (key swich data) is output to the DATA I/O pin. 11 to 17 COL1 to 7 I 7 to 10 ROW1 to 4 O Input for the key matrix. These pins are "L" active. When these keys are in the inactive state, these pins are at "H" level through the internal pull-up resistors. COL1 to COL3 are for the rotary switch and COL4 to COL7 are for the push-button switch. Signal outputs for scanning key matrix. Normally, ROW1 to ROW4 output a "I" level. Key scanning is executed only once when a transfer of the rotary switch contact or pressing down or release of the push-button switch is detected. Key scanning is continued if the rotary switch contact is in the open state after this one-time scanning. Then, scanning stops when the rotary switch contact makes connection with any of the selective contacts. After key scanning is stopped, ROW1 to ROW4 return to a "L" level. 21 OSC 25 to 41, SEG1 to 23 1 to 6 23 , 24 GRID1,2 I/O O RC oscillator connection. A capacitor is connected between GND and this pin. Segment signal output. O Inverted GRID signal output. This signal is connected to an external grid driver (e.g., PNP transistor) input. I Input for test. Since this pin has as internal a pull-up resistor, leave this pin open or pull it up for use. When a "L" level signal is input, all segment outputs go on and off at intervals of 1 second. 22 TEST 4/14 ¡ Semiconductor MSC1208 ABSOLUTE MAXIMUM RATINGS Condition Rating Unit Power Supply Voltage Input Voltage Parameter VDD — –0.3 to+20 V VIN Storage Temperature TSTG — — –0.3 to+6 –55 to+150 V °C PD Ta=85°C 400 mW Power Dissipation Symbol RECOMENDED OPERATING CONDITIONS Symbol Condition Min. Typ. Max. Unit Power Supply Voltage Operating Temperature Parameter VDD Top — — 8 –40 — — 18 85 V °C "H" Input Voltage (1) "H" Input Voltage (2) VIH1 DATA ENABLE, TEST 3.8 — 5.5 V VIH2 DATA I/O 4.0 — 5.5 V "L" Input Voltage (1) "L" Input Voltage (2) VIL1 DATA ENABLE, TEST 0 — 0.8 V VIL2 DATA I/O 0 — 1.2 V Oscillation Frequency fOSC C=68pF 256 512 768 kHz DATA ENABLE Frequency fE Refer to Fig. 1 — — 1.3 kHz DATA ENABLE Pulse Width tW tRE Refer to Fig. 1 Refer to Fig. 1 360 — — — — 20 ms ms tFE Refer to Fig. 1 — — 20 ms DATA ENABLE Rise Time DATA ENABLE Fall Time Data Delay Time Input Data Valid Time Output Data Valid Time Frame Frequency tX Refer to Fig. 1 — — 20 ms tDV1 Refer to Fig. 1 200 — — ms tDV2 Refer to Fig. 1 150 — — ms fFR Refer to Fig. 3 — 250 — Hz 5/14 ¡ Semiconductor MSC1208 ELECTRICAL CHARACTERISTICS DC Characteristics (Ta=–40 to+85°C,VDD=8 to 18V) Parameter Symbol Condition Min. Max. Unit "H" Input Voltage "H" Input Voltage (2) VIH1 VIH2 DATA ENABLE, TEST DATA I/O 3.8 4.0 — — V V "L" Input Voltage (1) "L" Input Voltage (2) VIL1 DATA ENABLE, TEST — 0.8 V VIL2 DATA I/O — 1.2 V "H" Input Current (1) "H" Input Current (2) IIH1 VIN=5V, DATA ENABLE, DATA I/O –5 5 mA IIH2 VIN=5V, COL1 to 7, TEST –30 30 mA "L" Input Current (1) IIL1 VIN=0V, DATA ENABLE, DATA I/O –5 5 mA "L" Input Current (2) "H" Output Voltage (1) IIL2 VIN=0V,COL1 to 7, TEST –15 –160 mA VOH1 IOH1=–3mA, SEG1 to 17, VDD=13.8V 13 — V "H" Output Voltage (2) VOH2 IOH2=–8mA, SEG18 to 23, VDD=13.8V 13 — V "L" Output Voltage (1) VOL1 VDD=13.8V, All SEG pins IOL=500mA IOL=200mA IOL=2mA — — — 2 1 0.3 V V V "L" Output Voltage (2) "L" Output Voltage (3) VOL2 VDD=13.8V, IOL=10mA, GRID1,2 — 0.8 V VOL3 — 0.8 V "L" Output Voltage (4) VOL4 VDD=13.8V, IOL=200mA, ROW1 to 4 VDD=13.8V, IOL=2mA, DATA I/O — 1.2 V Current Consumption IDD fosc=512kHz, No Load — 20 mA AC Characteristics (Ta=–40 to+85°C, VDD=8 to 18V) Parameter Symbol Condition Min. Max. Unit DATA ENABLE Frequency DATA ENABLE Pulse Width fE tW Refer to Fig. 1 Refer to Fig. 1 — 360 1.3 — kHz ms DATA ENABLE Rise Time DATA ENABLE Fall Time tRE Refer to Fig. 1 — 20 ms tFE Refer to Fig. 1 — 20 ms Data Delay Time Input Data Valid Time tX Refer to Fig. 1 — 20 ms tDV1 Refer to Fig. 1 200 — ms Output Data Valid Time tDV2 Refer to Fig. 1 150 — ms Output Data Active-to-High-Impedance Time tHZ Refer to Fig. 1 — 5 ms Output Through Rate (SEG, GRID) tR CL=100pF, t=20 to 80% or 80 to 20% of VDD — 5 ms DATA ENABLE Setup Time tSE Refer to Fig. 2 300 — ms Oscillation Frequency fOSC C=68pF 256 768 kHz Key Scan Characteristics Parameter Key Scan Time Key Scan Width Symbol Condition Min. Typ. Max. Unit tKS tSW Refer to Fig. 4 Refer to Fig. 4 164 41 250 62.5 500 125 ms ms 6/14 ¡ Semiconductor MSC1208 TIMING DIAGRAM fE tw tRE tw tFE DATA ENABLE tDV1 DATA I/O (INPUT) tx Hi-z Hi-z VALID VALID tDV2 tHZ tx Hi-z DATA I/O (OUTPUT) VALID Hi-z Figure 1. Data Input-Output Timing 8V VDD tSE DATA ENABLE Figure 2. Power-ON Reset Timing 7/14 ¡ Semiconductor MSC1208 1 Frame 2048-bit time (250Hz typ.) GRID1 8-bit time GRID2 1016-bit time max. 3-bit time SEG1-23 1019-bit time max. 5-bit time Figure 3. SEG and GRID Output Timing Note: 1. Shown above is the timing when the duty ratio of digital dimming is 1016/1024. 2. The grid and segment ON time is set by 10-bit digital dimming data. 3. 1-bit time=TOSC(=1/fOSC)=1.95 ms typ. Key Scan Time ROW1 Scan pulse width ROW2 ROW3 ROW4 Figure 4. Key Scan Timing 8/14 ¡ Semiconductor MSC1208 FUNCTIONAL DESCRIPTION Key Scan In the case of the push-button switch, key scanning is started only when depression or release of the key is detected for the purpose of minimizing noise caused by scanning signal. Then, after completion of 1-cycle scanning, all the ROW outputs return to a "L" level. The push-button switch input pins (COL4-COL7) are connected to a chattering absorption circuit that absorbs chattering with the chattering time about 25ms (typ.), so input signals shorter than 25ms are ignored. Because of this, key scanning is started about 25ms after key input. In the case of the rotary switch, key scanning is started only once when a transfer of the rotary switch contact or pressing down or release of the push-button switch is detected. Key scanning is continued if the rotary switch contact is in the open state after this one-time scanning. Then, scanning stops when the rotary switch contact makes connection with any of the selective contacts. After that, all "L" outputs return to a "L" level. The rotary switch input pins (COL1-COL3) have an internal chattering absorption circuit that absorbs chattering with the chattering time about 1ms (typ.), so input signals shorter than 1ms are ignored. Because of this, key scanning is started about 1ms after a change in switch status. The switch data is stored in the internal latch circuit, and then transferred to the output register at the rising edge of the first pulse of DATA ENABLE. The switch data consists of 16-push button switch data (S1-S16) and 2-rotary switch data (RS1 and RS2). The rotary switch data consists of 3 bits for contact-transfer count and 1-bit for rotating direction. Since the maximum transfer count is "111" in binary, a transfer is counted up to seven times. The rotating direction bit is "0" for the regular direction and "1" for the opposite direction. [Rotating direction] Regular direction : R11ÆR12ÆR13ÆR11 Opposite direction : R13ÆR12ÆR11ÆR13 (See figure below) ROW1 ROW2 ROW3 ROW4 COL1 COL2 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 S16 COL4 COL3 COL5 COL6 COL7 Figure 5. Key Matrix COL1 COL2 COL3 R11 ROW1 R12 R13 Figure 6. Rotary Switch Section (RS1) 9/14 ¡ Semiconductor MSC1208 Digital Dimming The segment and grid ON time can be controlled in the range of 0/1024 (=0%) to 1016/1024 (=99.2%) duty by 10-bit digital dimming data. (See Figure 3, "SEG and GRID Output Timing.") Data Transfer The input data (display data or dimming data) from DATA I/O is read into the internal register after the DATA ENABLE input level changes from "L" to "H". The output data (key switch data) is output to the DATA I/O pin after the DATA ENABLE input level changes from "H" to "L". Using this method, bidirectional serial communication using two signal lines, DATA ENABLE and DATA I/O, can be made. The transfer data consists of 58 bits including 2-bit parity bit. Data transfer is completed if no parity error occurs after the 58-bit data has been transferred to the internal register. If a parity error occurs, the previously transferred data (display data or dimming data) is remained. If an abnormality occurs in the DATA ENABLE line and no signal pulse is input for 10ms ±5ms or more, the data transfer is terminated even if it is in progress. Then, when the next pulse is input, it is identified as the first pulse. Diagnositc Function 1. Parity Bit 57 and bit 58 (PO and PI) of the input data are used for parity check. For the output data, parity is internally generated to add parity bit to bits 25 and 26. The parity value is, for both input and output, "P0, P1=1, 1" when a total number of "1"s (or "0"s) is even, and "P0, P1=0, 0" when it is odd. 2. Default mode This device enters the default mode if no pulse is input to DATA ENABLE for about 1 second or if a parity error keeps occurring for about 1 second. In this mode, at the state of keeping the contents of the dimming data before entering the default mode, the two segment outputs (SEG1, SEG2) only go ON. This state is reset if no parity error is detected after the data has been transferred. 3. Self test When the TEST pin is set to a "L" level, all segment outputs go on and off at intervals of about 1 second. At this time, the duty ratio for both segment and grid outputs becomes the maximum (99.2%). Power-On Reset When power is turned on, this device is initialized by the internal power-on reset circuit. Then, about 1second after the initialization, the device enters the default mode. At this time, the SEG1 and SEG2 segments go ON with the maximum duty ratio (99.2%). This state is reset if no parity error is detected after the data has been transferred. 10/14 ¡ Semiconductor MSC1208 Input-Output Configuration 1. Input data (58 bits) Bit 58 57 56 55 to 48 47 46 45 to 2 1 DATA P1 P0 10 9 2 1 46 45 to 2 1 PARITY to Dimming DATA First in Display DATA [Correspondence between input data (Display data) and SEG, GRID] Display DATA 1 to 23 24 to 26 SEG NO. GRID NO. SEG1 to SEG23 SEG1 to SEG23 GRID2 GRID1 [Correspondence between dimming data and duty] Dimming DATA (LSB) 1 2 3 4 5 6 7 8 9 10 (MSB) 0000000000 to 0001111111 to 1111111111 Duty (%) 0 to 99.2 * For dimming data greater than or equal to 0001111111, the duty is 99.2%. (LSB) (MSB) [Parity] When the total number of "1"s or "0"s in the display data and dimming data is even, add "P0, P1=1, 1" to input data, and when it is odd, add "P0, P1=0, 0". 2. Output data (58 bits) Bit DATA 58 to 27 26 25 24 to 9 8 7 6 5 4 3 2 1 ALL"1" P1 P0 S16 to S1 Q23 Q22 Q21 D2 Q13 Q12 Q11 D1 ALL"1" PARITY RS2 DATA 16 SWITCHES First out RS1 DATA [Direction bit (Rotary switch rotating direction)] D1, D2=Regular direction: 0, Opposite direction: 1 [Contact transfer count (rotary switch)] Q11(LSB) to 13(MSB), Q21(LSB) to 23(MSB) [Push-butter switch] DS1 to S16=Pressing switch down: 1, Release: 0 [Parity] When the total number of "1"s or "0"s in the key switch data is even, "P0, P1=1, 1" is added to the output, and when it is odd, "P0, P1=0, 0" is added. Note: "1" is output to every bit from bit 27 to bit 58. 11/14 ¡ Semiconductor MSC1208 APPLICATION CIRCUITS Example of a Basic Application Circuit *(Note) RS1 RS2 12V 5V 1 2 3 4 1 2 3 45 67 ROW COL VDD GRID1 GND Microcomputer 12V DATA I/O DATA ENABLE 12V MSC1208 GRID2 TEST OSC SEG1 SEG23 1/2-duty VF display tube Note: Connect a diode between the rotary switch common contact and selective contacts, as shown in the diagram above. 12/14 ¡ Semiconductor MSC1208 Example of Using a Single Rotary Switch * (Note) RS1 12V 5V 1 2 3 4 1 2 3 45 67 ROW COL 12V VDD GRID1 GND Microcomputer DATA I/O DATA ENABLE 12V MSC1208 GRID2 TEST OSC SEG1 SEG23 1/2-duty VF display Tube Note: When using a sigle rotary switch, connect the ROW that is not used (ROW1 or ROW2) and one of COL1 to COL3 via a diode. If no rotary switch is used, connect ROW1 and one of COL1 to COL3 via a diode, and also connect ROW2 and one of COL1 to COL3 via a diode. 13/14 ¡ Semiconductor MSC1208 PACKAGE DIMENSIONS (Unit : mm) SDIP42-P-600-1.78 Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 4.52 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 14/14