TISP61511D, TISP61512P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS Copyright © 1997, Power Innovations Limited, UK JULY 1995 - REVISED SEPTEMBER 1997 PROGRAMMABLE SLIC OVERVOLTAGE PROTECTION ● ● Dual Voltage-Programmable Protectors. - Wide 0 to -80 V Programming Range - Low 5 mA max. Triggering Current - High 150 mA min. Holding Current '61511D PACKAGE (TOP VIEW) 1 8 K1 (Tip) 2 7 A (Ground) NC 3 6 A (Ground) (Ring) K2 4 5 K2 (Ring) (Tip) Rated for International Surge Wave Shapes VOLTAGE WAVE SHAPE 2/10 µs STANDARD ITSP A TR-NWT-001089 170 1.2/50 µs ETS 300 047-1 90 0.5/700 µs RLM88/I3124 40 10/700 µs K17, K20, K21 40 10/1000 µs TR-NWT-001089 30 MD6XAL NC - No internal connection Terminal typical application names shown in parenthesis '61512P PACKAGE (TOP VIEW) (Tip) ● Functional Replacements for DEVICE TYPE PACKAGE TYPE LCP1511, LCP1511D, ATTL7591AS, MGSS150-1 ATTL7591AB, 1 8 K1 (Tip) 2 7 A (Ground) NC 3 6 A (Ground) (Ring) K2 4 5 K2 (Ring) FUNCTIONAL REPLACEMENT or order as TISP61511DR for Taped and Reeled LCP1512, LCP1512D, K1 (Gate) G TISP61511D 8-pin Small-Outline K1 (Gate) G MD6XAJ NC - No internal connection Terminal typical application names shown in parenthesis device symbol 8-pin Plastic DIP TISP61512P K1 G K2 MGSS150-2 description The TISP61511D and TISP61512P are dual forward-conducting buffered p-gate overvoltage protectors. They are designed to protect monolithic Subscriber Line Interface Circuits, SLICs, against overvoltages on the telephone line caused by lightning, ac power contact and induction. The TISP61511D and TISP61512P limit voltages that exceed the SLIC supply rail voltage. A SD6XAE Terminals K1, K2 and A correspond to the alternative line designators of T, R and G or A, B and C. The negative protection voltage is controlled by the voltage, VGG, applied to the G terminal. The SLIC line driver section is typically powered from 0 V (ground) and a negative voltage in the region of -10 V to -70 V. The protector gate is connected to this negative supply. This references the protection (clipping) voltage to the negative supply voltage. As the protection voltage will track the negative supply voltage the overvoltage stress on the SLIC is minimised. Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially clipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, then the protector will crowbar into a low voltage on-state condition. As the current subsides the high holding current of the crowbar prevents d.c. latchup. These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high reliability and in normal system operation they are virtually transparent. The buffered gate design reduces the loading on the SLIC supply during overvoltages caused by power cross and induction. PRODUCT INFORMATION Information is current as of publication date. Products conform to specifications in accordance with the terms of Power Innovations standard warranty. Production processing does not necessarily include testing of all parameters. 1 TISP61511D, TISP61512P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS JULY 1995 - REVISED SEPTEMBER 1997 absolute maximum ratings SYMBOL VALUE UNIT Repetitive peak off-state voltage, IG = 0, -40°C ≤ TJ ≤ 85°C RATING VDRM -100 V Repetitive peak gate-cathode voltage, V KA = 0, -40°C ≤ TJ ≤ 85°C VGKRM -85 V Non-repetitive peak on-state pulse current (see Notes 1 and 2) 10/1000 µs 30 5/310 µs 40 0.2/310 µs A 40 ITSP 90 1/20 µs 2/10 µs TJ = -40°C 120 TJ = 25, 85°C 170 Non-repetitive peak on-state current, 50 Hz (see Notes 1 and 2) full-sine-wave, 20 ms 5 ITSM 1s A 3.5 Non-repetitive peak gate current, half-sine-wave, 10 ms (see Notes 1 and 2) IGSM 2 A TJ -55 to +150 °C Tstg -55 to +150 °C Junction temperature Storage temperature range NOTES: 1. Initially the protector must be in thermal equilibrium with -40°C ≤ TJ ≤ 85°C, unless otherwise specified. The surge may be repeated after the device returns to its initial conditions. See the applications section for the details of the impulse generators. 2. The rated current values may be applied to either the R-G or T-G terminal pairs. Additionally, both terminal pairs may have their rated current values applied simultaneously (in this case the G terminal current will be twice the rated current value of an individual terminal pair). Above 85°C, derate linearly to zero at 150°C lead temperature. recommended operating conditions MIN CG Gate decoupling capacitor TYP MAX 220 UNIT nF electrical characteristics, TJ = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 5 µA TJ = 70°C 50 µA V ID Off-state current VD = -85 V, VGK = 0 V V(BO) Breakover voltage IT = 30 A, 10/1000 µs, 1 kV, RS = 33 Ω, di/dt(i) = 8 A/µs (see Note 3) -58 IT = 30 A, 10/700 µs, 1.5 kV, RS= 10 Ω, di/dt(i) = 14 A/µs (see Note 3) 10 IT = 30 A, 1.2/50 µs, 1.5 kV, RS= 10 Ω, di/dt(i) = 70 A/µs (see Note 3) 20 IT = 38 A, 2/10 µs, 2.5 kV, RS= 61 Ω, di/dt(i) = 40 A/µs (see Note 3) 25 VGK(BO) Gate-cathode voltage at breakover IT = 0.5 A, tw = 500 µs 3 IT = 3 A, tw = 500 µs 4 Forward voltage IF = 5 A, tw = 500 µs 3 IF = 30 A, 10/1000 µs, 1 kV, RS = 33 Ω, di/dt(i) = 8 A/µs (see Note 3) 5 Peak forward recovery IT = 30 A, 10/700 µs, 1.5 kV, RS= 10 Ω, di/dt(i) = 14 A/µs (see Note 3) 5 voltage IT = 30 A, 1.2/50 µs, 1.5 kV, RS= 10 Ω, di/dt(i) = 70 A/µs (see Note 3) 7 VT On-state voltage VF VFRM IT = 38 A, 2/10 µs, 2.5 kV, RS= 61 Ω, di/dt(i) = 40 A/µs (see Note 3) IH Holding current IT = 1 A, di/dt = -1A/ms, VGG = -48 V V V V V 12 150 mA TJ = 25°C 5 µA TJ = 70°C 50 µA 5 mA IGAS Gate reverse current IGT Gate trigger current IT = 3 A, tp(g) ≥ 20 µs, VGG = -48 V VGT Gate trigger voltage IT = 3 A, tp(g) ≥ 20 µs, VGG = -48 V NOTE 3: All tests have CG = 220 nF and VGG = -48 V. RS is the current limiting resistor between the output of the impulse generator and the R or T terminal. See the applications section for the details of the impulse generators. PRODUCT 2 VGG = -75 V, K and A terminals connected UNIT TJ = 25°C INFORMATION 0.2 2.5 V TISP61511D, TISP61512P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS JULY 1995 - REVISED SEPTEMBER 1997 electrical characteristics, TJ = 25°C (unless otherwise noted) (Continued) PARAMETER TEST CONDITIONS Anode-cathode off- CAK f = 1 MHz, Vd = 1 V, IG = 0, (see Note 4) state capacitance NOTE MAX UNIT VD = -3 V MIN TYP 100 pF V D = -48 V 50 pF 4: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured device terminals are a.c. connected to the guard terminal of the bridge. thermal characteristics PARAMETER RθJA TEST CONDITIONS Junction to free air thermal resistance MIN TYP MAX Ptot = 0.8 W, TA = 25°C D Package 170 5 cm2, FR4 PCB P Package 125 UNIT °C/W PARAMETER MEASUREMENT INFORMATION +i Quadrant I IFSP (= |ITSP|) Forward Conduction Characteristic IFSM (= |ITSM|) IF VF VGK(BO) VGG -v VD ID I(BO) IH IS V(BO) +v VT VS IT ITSM Quadrant III ITSP Switching Characteristic -i PM6XAAA Figure 1. VOLTAGE-CURRENT CHARACTERISTIC PRODUCT INFORMATION 3 TISP61511D, TISP61512P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS JULY 1995 - REVISED SEPTEMBER 1997 THERMAL INFORMATION MAXIMUM NON-RECURRING 50 Hz CURRENT vs CURRENT DURATION ITRMS - Maximum Non-Recurrent 50 Hz Current - A TI6LAA VGEN = 250 Vrms RGEN = 10 to 150 Ω 10 TISP61512P TISP61511D 1 0·1 1 10 100 1000 t - Current Duration - s Figure 2. DEVICE PARAMETERS general Thyristor based overvoltage protectors, for telecommunications equipment, became popular in the late 1970s. These were fixed voltage breakover triggered devices, likened to solid state gas discharge tubes. As these were new forms of thyristor, the existing thyristor terminology did not cover their special characteristics. This resulted in the invention of new terms based on the application usage and device characteristic. Initially, there was a wide diversity of terms to describe the same thing, but today the number of terms have reduced and stabilised. Programmable, (gated), overvoltage protectors are relatively new and require additional parameters to specify their operation. Similarly to the fixed voltage protectors, the introduction of these devices has resulted in a wide diversity of terms to describe the same thing. To help promote an understanding of the terms and their alternatives, this section has a list of alternative terms and the parameter definitions used for this data sheet. In general, the Texas Instruments approach is to use terms related to the device internal structure, rather than its application usage as a single device may have many applications each using a different terminology for circuit connection. alternative symbol cross-reference guide This guide is intended to help the translation of alternative symbols to those used in this data sheet. As in some cases the alternative symbols have no substance in international standards and are not fully defined by the originators, users must confirm symbol equivalence. No liability will be assumed from the use of this guide. PRODUCT 4 INFORMATION TISP61511D, TISP61512P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS JULY 1995 - REVISED SEPTEMBER 1997 DATA SHEET ALTERNATIVE TISP61511D, TISP61512P PARAMETER SYMBOL Non-repetitive peak on-state pulse current ITSP Off-state current ID Gate reverse current (with A and K terminals connected) IGAS SYMBOL IPP IR IRM IRG VR ALTERNATIVE PARAMETER Peak pulse current Reverse leakage current LINE/GND Reverse leakage current GATE/LINE Reverse voltage LINE/GND Off-state voltage VD Peak forward recovery voltage VFRM VFP Peak forward voltage LINE/GND Breakover voltage V(BO) VSGL Dynamic switching voltage GND/LINE Gate voltage, (VGG is gate supply voltage referenced to the A terminal) VRM Vgate VG VGATE GATE/GND voltage VS Repetitive peak off-state voltage VDRM VMLG Maximum voltage LINE/GND Repetitive peak gate-cathode voltage VGKM VMGL Maximum voltage GATE/LINE Gate-cathode voltage VGK VGL GATE/LINE voltage Gate-cathode voltage at breakover VGK(BO) VDGL Dynamic switching voltage GATE/LINE Cathode-anode voltage VK VLG VGND/LINE LINE/GND voltage Anode-cathode capacitance CAK Coff Cathode 1 terminal K1 Tip Off-state capacitance LINE/GND Tip terminal Cathode 2 terminal K2 Ring Ring terminal Anode terminal A GND Ground terminal Gate terminal G Gate Gate terminal Thermal Resistance, junction to ambient RθJA Rth (j-a) Thermal Resistance, junction to ambient APPLICATIONS INFORMATION electrical characteristics The electrical characteristics of a thyristor overvoltage protector are strongly dependent on junction temperature, TJ. Hence a characteristic value will depend on the junction temperature at the instant of measurement. The values given in this data sheet were measured on commercial testers, which generally minimise the temperature rise caused by testing. application circuit Figure 3 shows a typical TISP6151xx SLIC card protection circuit. The incoming line wires, R and T, connect to the relay matrix via the series over-current protection. Fusible resistors, fuses and positive temperature coefficient (PTC) resistors can be used for over-current protection. Resistors will reduce the prospective current from the surge generator for both the TISP6151xx and the ring/test protector. The TISP7xxxF3 protector has the same protection voltage for any terminal pair. This protector is used when the ring generator configuration maybe ground or battery-backed. For dedicated ground-backed ringing generators, the TISP3xxxF3 gives better protection as its inter-wire protection voltage is twice the wire to ground value. Relay contacts 3a and 3b connect the line wires to the SLIC via the TISP6151xx protector. The protector gate reference voltage comes from the SLIC negative supply (VBAT). A 220 nF gate capacitor sources the high gate current pulses caused by fast rising impulses. PRODUCT INFORMATION 5 TISP61511D, TISP61512P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS JULY 1995 - REVISED SEPTEMBER 1997 OVERCURRENT PROTECTION TIP WIRE RING/TEST PROTECTION TEST RELAY RING RELAY SLIC RELAY Th1 R1a SLIC PROTECTOR S3a SLIC Th4 S2a S1a Th3 RING WIRE R1b Th5 Th2 TISP 3xxxF3 OR 7xxxF3 S3b TISP 6151xx S2b S1b VBAT 220 nF TEST EQUIPMENT RING GENERATOR AI6XAA Figure 3. TYPICAL APPLICATION CIRCUIT impulse conditions Most lightning tests, used for equipment verification, specify a unidirectional sawtooth waveform which has an exponential rise and an exponential decay. Wave shapes are classified in terms of Peak Amplitude (voltage or current), rise time and a decay time to 50% of the maximum amplitude. The notation used for the wave shape is amplitude, rise time/decay time. A 38 A, 5/310 µs wave shape would have a peak current value of 38 A, a rise time of 5 µs and a decay time of 310 µs. There are three categories of surge generator type, single wave shape, combination wave shape and circuit defined. Single wave shape generators have essentially the same waveshape for the open circuit voltage and short circuit current (e.g. 10/1000 µs open circuit voltage and short circuit current). Combination generators have two wave shapes, one for the open circuit voltage and the other for the short circuit current (e.g. 1.2/50 µs open circuit voltage and 8/20 µs short circuit current). Circuit specified generators usually equate to a combination generator, although typically only the open circuit voltage waveshape is referenced (e.g. a 10/700 µs open circuit voltage generator typically produces a 5/310 µs short circuit current). If the combination or circuit defined generators operate into a finite resistance the wave shape produced is intermediate between the open circuit and short circuit values. When the TISP switches into the on-state it has a very low impedance. As a result, although the surge wave shape may be defined in terms of open circuit voltage, it is the current waveshape that must be used to assess the TISP surge requirement. As an example, the CCITT IX K17 1.5 kV, 10/700 µs surge is changed to a 38 A 5/310 µs waveshape when driving into a short circuit. The impulse generators used for rated values are tabulated below IMPULSE GENERATORS USED FOR RATED VALUES STANDARD TR-NWT-001089 PRODUCT 6 PEAK VOLTAGE GENERATOR EXTERNAL PEAK VOLTAGE WAVE FICTIVE SOURCE SERIES CURRENT SETTING FORM IMPEDANCE RESISTANCE V µs Ω Ω A µs 2500 2/10 5 10 170 2/10 INFORMATION CURRENT WAVE FORM TISP61511D, TISP61512P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS JULY 1995 - REVISED SEPTEMBER 1997 IMPULSE GENERATORS USED FOR RATED VALUES STANDARD ETS 300 047-1 PEAK VOLTAGE GENERATOR EXTERNAL PEAK VOLTAGE WAVE FICTIVE SOURCE SERIES CURRENT SETTING FORM IMPEDANCE RESISTANCE CURRENT WAVE FORM V µs Ω Ω A µs 3000 1.2/50 38 0 80 0.6/18 0.2/310 RLM88/I3124 1600 0.5/700 40 0 40 K17, K20, K21 1600 10/700 40 0 40 5/310 TR-NWT-001089 1000 10/1000 10 23 30 10/1000 Figures 4. and 5. show how the TISP6151xx limits negative and positive over-voltages. Negative overvoltages (Figure 4.) are initially clipped close to the SLIC negative supply rail value (VBAT). If sufficient current is available from the overvoltage, then the protector (Th5) will crowbar into a low voltage on-state condition. As the overvoltage subsides the high holding current of the crowbar prevents dc latchup. The protection voltage will be the sum of the gate supply (VBAT) and the peak gate-cathode voltage (VGK(BO)). The protection voltage will be increased if there is a long connection between the gate decoupling capacitor, C, and the gate terminal. During the initial rise of a fast impulse, the gate current (IG) is the same as the cathode current (IK). Rates of 70 A/µs can cause inductive voltages of 0.7 V in 2.5 cm of printed wiring track. To minimise this inductive voltage increase of protection voltage, the length of the capacitor to gate terminal tracking should be minimised. Inductive voltages in the protector cathode wiring can increase the protection voltage. These voltages can be minimised by routing the SLIC connection through the protector as shown in Figure 3. SLIC PROTECTOR IK IF Th5 TISP 6151xx C 220 nF SLIC PROTECTOR SLIC SLIC Th5 TISP 6151xx IG VBAT VBAT AI6XAB Figure 4. NEGATIVE OVERVOLTAGE CONDITION 220 nF AI6XAC Figure 5. POSITIVE OVERVOLTAGE CONDITION Positive overvoltages (Figure 5.) are clipped to ground by forward conduction of the diode section in protector (Th5). Fast rising impulses will cause short term overshoots in forward voltage (VFRM). The thyristor protection voltage, (V(BO)) increases under lightning surge conditions due to thyristor regeneration time. This increase is dependent on the rate of current rise, di/dt, when the TISP is clamping the voltage in its breakdown region. The diode protection voltage, known as the forward recovery voltage, (VFRM ) is dependent on the rate of current rise, di/dt. An estimate of the circuit di/dt can be made from the surge PRODUCT INFORMATION 7 TISP61511D, TISP61512P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS JULY 1995 - REVISED SEPTEMBER 1997 generator voltage rate of rise, dv/dt, and the circuit resistance. The impulse generators used for characterising the protection voltages are tabulated below IMPULSE GENERATORS USED FOR ELECTRICAL CHARACTERISTIC VALUES STANDARD VOLTAGE GENERATOR EXTERNAL PEAK VOLTAGE WAVE FICTIVE SOURCE SERIES CURRENT SETTING FORM IMPEDANCE RESISTANCE V µs Ω Ω A di/dt(i) INITIAL RATE OF RISE A/µs CURRENT WAVE FORM µs TR-NWT-001089 2500 2/10 5 61 38 40 2/10 ETS 300 047-1 1500 1.2/50 38 12 30 70 0.6/21 K17, K20, K21 1500 10/700 40 10 30 14 5/350 TR-NWT-001089 1000 10/1000 10 23 30 8 10/1000 PRODUCT 8 PEAK INFORMATION TISP61511D, TISP61512P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS JULY 1995 - REVISED SEPTEMBER 1997 MECHANICAL DATA D008 plastic small-outline package This small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. D008 Designation per JEDEC Std 30: PDSO-G8 5,00 (0.197) 4,80 (0.189) 8 7 6 5 1 2 3 4 6,20 (0.244) 5,80 (0.228) 4,00 (0.157) 3,81 (0.150) 7° NOM 3 Places 1,75 (0.069) 1,35 (0.053) 0,50 (0.020) x 45°NOM 0,25 (0.010) 0,203 (0.008) 0,102 (0.004) 0,79 (0.031) 0,28 (0.011) 7° NOM 4 Places 0,51 (0.020) 0,36 (0.014) 8 Places Pin Spacing 1,27 (0.050) (see Note A) 6 Places 5,21 (0.205) 4,60 (0.181) 0,229 (0.0090) 0,190 (0.0075) 4° ± 4° 1,12 (0.044) 0,51 (0.020) ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTES: A. B. C. D. Leads are within 0,25 (0.010) radius of true position at maximum material condition. Body dimensions do not include mold flash or protrusion. Mold flash or protrusion shall not exceed 0,15 (0.006). Lead tips to be planar within ±0,051 (0.002). PRODUCT MDXXAA INFORMATION 9 TISP61511D, TISP61512P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS JULY 1995 - REVISED SEPTEMBER 1997 MECHANICAL DATA P008 plastic dual-in-line package This dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions The package is intended for insertion in mounting-hole rows on 7,62 (0.300) centers. Once the leads are compressed and inserted, sufficient tension is provided to secure the package in the board during soldering. Leads require no additional cleaning or processing when used in soldered assembly. P008 Designation per JEDEC Std 30: PDIP-T8 10,2 (0.400) MAX 8 7 6 5 Index Dot C L 1 2 3 C L 7,87 (0.310) 7,37 (0.290) T.P. 4 6,60 (0.260) 6,10 (0.240) 1,78 (0.070) MAX 4 Places 5,08 (0.200) MAX Seating Plane 0,51 (0.020) MIN 3,17 (0.125) MIN 2,54 (0.100) T.P. 6 Places (see Note A) 0,533 (0.021) 0,381 (0.015) 8 Places 105° 90° 8 Places 0,36 (0.014) 0,20 (0.008) 8 Places ALL LINEAR DIMENSIONS ARE IN MILLIMETERS AND PARENTHETICALLY IN INCHES NOTE A: Each pin centerline is located within 0,25 (0.010) of its true longitudinal position PRODUCT 10 INFORMATION MDXXABA TISP61511D, TISP61512P DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS JULY 1995 - REVISED SEPTEMBER 1997 IMPORTANT NOTICE Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except as mandated by government requirements. PI accepts no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS. Copyright © 1997, Power Innovations Limited PRODUCT INFORMATION 11