RF2173 2 3V GSM POWER AMPLIFIER Typical Applications • Commercial and Consumer Systems • 3V Dual-Band/Triple-Band Handsets • Portable Battery-Powered Equipment 2 • GPRS Compatible Product Description The RF2173 is a high power, high efficiency power amplifier module offering high performance in GSM or GPRS applications. The device is manufactured on an advanced GaAs HBT process, and has been designed for use as the final RF amplifier in GSM hand-held digital cellular equipment and other applications in the 800MHz to 950MHz band. On-board power control provides over 70dB of control range with an analog voltage input, and provides power down with a logic "low" for standby operation. The device is self-contained with 50Ω input and the output can be easily matched to obtain optimum power and efficiency characteristics. The RF2173 can be used together with the RF2174 for dual-band operation. The device is packaged in an ultra-small plastic package, minimizing the required board space. Optimum Technology Matching® Applied Si BJT Si Bi-CMOS ü 1 2 0.45 0.28 3.75 GaAs HBT GaAs MESFET SiGe HBT Si CMOS 0.80 TYP 0.75 0.50 3.75 + 1 1.60 4.00 12° 1.50 SQ INDEX AREA 3 3.20 0.75 0.65 4.00 1.00 0.90 0.05 0.00 NOTES: 1 Shaded Pin is Lead 1. 2 Dimensions in mm. Dimension applies to plated terminal and is measured between 0.10 mm and 0.25 mm from terminal tip. The terminal #1 identifier and terminal numbering convention 3 shall conform to JESD 95-1 SPP-012. Details of terminal #1 identifier are optional, but must be located within the zone indicated. The identifier may be either a mold or marked feature. 4 5 Pins 1 and 9 are fused. Package Warpage: 0.05 max. Package Style: LCC, 16-Pin, 4x4 Features GND VCC2 VCC2 NC 2F0 • Single 2.7V to 4.8V Supply Voltage 1 16 15 14 13 • +36dBm Output Power at 3.5V • 32dB Gain with Analog Gain Control • 56% Efficiency GND2 2 12 RF OUT RF IN 3 11 RF OUT GND1 4 10 RF OUT • 800MHz to 950MHz Operation 9 GND 8 VCC 7 APC2 6 APC1 VCC1 5 Functional Block Diagram Rev A4 010914 • Supports GSM and E-GSM Ordering Information RF2173 RF2173 PCBA 3V GSM Power Amplifier Fully Assembled Evaluation Board RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com 2-221 POWER AMPLIFIERS • 3V GSM Cellular Handsets RF2173 Absolute Maximum Ratings Parameter POWER AMPLIFIERS 2 Supply Voltage Power Control Voltage (VAPC1,2) DC Supply Current Input RF Power Duty Cycle at Max Power Output Load VSWR Operating Case Temperature Storage Temperature Parameter Rating Unit -0.5 to +6.0 -0.5 to +3.0 2400 +13 50 10:1 -40 to +85 -55 to +150 VDC V mA dBm % Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). °C °C Specification Min. Typ. Max. Unit Overall Operating Frequency Range Usable Frequency Range Maximum Output Power Total Efficiency Input Power for Max Output Output Noise Power +35.0 +34.0 +34.0 +33.0 +32.5 50 +4 880 to 915 800 to 950 +36 +35.2 56 56 12 5 +6 -45 Second Harmonic Third Harmonic All Other Non-Harmonic Spurious Input Impedance Optimum Source Impedance Input VSWR -50 -65 Output Load Impedance 2-222 -81 dBm -40 -30 -38 -43 -36 dBm dBm dBc dBc dBm +34.0 Forward Isolation Output Load VSWR +8 -72 MHz MHz dBm dBm dBm dBm dBm % % % % dBm dBm Ω Ω 50 40+j10 2.5:1 4:1 10:1 1.5-j1.7 Ω Condition Temp=25°C, VCC =3.5V, VAPC1,2 =2.6V, PIN =+6dBm, Freq=880MHz to 915MHz, 25% Duty Cycle, pulse width=1154µs See evaluation board schematic. Temp=25°C, VCC =3.5V, VAPC1,2 =2.6V Temp=+25°C, VCC =3.2V, VAPC1,2 =2.6V Temp=+85°C, VCC =3.2V, VAPC1,2 =2.6V Temp=25°C, VCC =2.7V, VAPC1,2 =2.6V Temp=+85°C, VCC =2.7V, VAPC1,2 =2.6V At POUT,MAX, VCC =3.2V At POUT,MAX, VCC =3.0V POUT =+20dBm POUT =+10dBm RBW=100kHz, 925MHz to 935MHz, POUT,MIN <POUT <POUT,MAX, PIN,MIN <PIN <PIN,MAX, VCC =3.0V to 5.0V RBW=100kHz, 935MHz to 960MHz, POUT,MIN <POUT <POUT,MAX, PIN,MIN <PIN <PIN,MAX, VCC =3.0V to 5.0V VAPC1,2 =0.2V, PIN =+6dBm VAPC1,2 =0.2V, PIN =+8dBm For best noise performance POUT,MAX-5dB<POUT <POUT,MAX POUT <POUT,MAX-5dB Spurious<-36dBm, VAPC1,2 =0.2V to 2.6V, RBW=100kHz Load Impedance presented at RF OUT pad Rev A4 010914 RF2173 Parameter Specification Min. Typ. Max. Unit Condition V Maximum POUT, Voltage supplied to the input Minimum POUT, Voltage supplied to the input VAPC1,2 =0.2V to 2.6V POUT =-10dBm to +35dBm DC to 2MHz VAPC1,2 =2.6V VAPC1,2 =0V VAPC1,2 =0 to 2.6V Power Control VAPC1 VAPC2 2.6 Power Control “OFF” Power Control Range Gain Control Slope APC Input Capacitance APC Input Current 0.2 75 5 0.5 100 4.5 Turn On/Off Time 150 10 5 10 100 V dB dB/V pF mA µA ns 4.8 5.5 V V V 375 10 10 A mA µA µA Power Supply Power Supply Voltage 3.5 2.7 Power Supply Current 50 Rev A4 010914 2 200 1 1 Specifications Nominal operating limits, POUT <+35dBm With maximum output load VSWR 6:1, POUT <+35dBm DC Current at POUT,MAX Idle Current, PIN <-30dBm PIN <-30dBm, VAPC1,2 =0.2V PIN <-30dBm, VAPC1,2 =0.2V, Temp=+85°C 2-223 2 POWER AMPLIFIERS Power Control “ON” RF2173 POWER AMPLIFIERS 2 Pin 1 2 Function GND GND2 3 RF IN Description Interface Schematic Internally connected to the ground slug. Ground connection for the driver stage. To minimize the noise power at See pin 15. the output, it is recommended to connect this pin with a trace of about 40mil to the ground plane. This will slightly reduce the small signal gain, and lower the noise power. It is important for stability that this pin have it’s own vias to the ground plane, minimizing common inductance. RF Input. This is a 50Ω input, but the actual impedance depends on the interstage matching network connected to pin 5. An external DC blocking capacitor is required if this port is connected to a DC path to ground RF IN or a DC voltage. VCC1 From Bias GND1 Stages 4 GND1 5 VCC1 6 APC1 Ground connection for the pre-amplifier stage. Keep traces physically See pin 3. short and connect immediately to the ground plane for best performance. It is important for stability that this pin has it’s own vias to the groundplane, to minimize any common inductance. Power supply for the pre-amplifier stage and interstage matching. This See pin 3. pin forms the shunt inductance needed for proper tuning of the interstage match. Refer to the application schematic for proper configuration. Note that position and value of the components are important. APC Power Control for the driver stage and pre-amplifier. When this pin is "low," all circuits are shut off. A "low" is typically 0.5V or less at room temperature. A shunt bypass capacitor is required. During normal operation this pin is the power control. Control range varies from about 1.0V for -10dBm to 2.6V for +35dBm RF output power. The maximum power that can be achieved depends on the actual output matching; see the application information for more details. The maximum current into this pin is 5mA when VAPC1 =2.6V, and 0mA when VAPC =0V. VCC To RF Stages GND GND 7 8 9 10 APC2 VCC GND RF OUT Power Control for the output stage. See pin 6 for more details. See pin 6. Power supply for the bias circuits. See pin 6. Internally connected to the ground slug. RF Output and power supply for the output stage. Bias voltage for the final stage is provided through this wide output pin. An external matching network is required to provide the optimum load impedance. RF OUT From Bias GND Stages PCKG BASE 11 12 13 RF OUT RF OUT 2F0 14 15 NC VCC2 Same as pin 10. Same as pin 10. Same as pin 10. Same as pin 10. Connection for the second harmonic trap. This pin is internally connected to the RF OUT pins. The bonding wire together with an external capacitor form a series resonator that should be tuned to the second harmonic frequency in order to increase efficiency and reduce spurious outputs. Not connected. Same as pin 10. Power supply for the driver stage and interstage matching. This pin forms the shunt inductance needed for proper tuning of the interstage match. Please refer to the application schematic for proper configuration, and note that position and value of the components are important. VCC2 From Bias GND2 Stages 16 Pkg Base 2-224 VCC2 GND Same as pin 15. Same as pin 15. Ground connection for the output stage. This pad should be connected to the ground plane by vias directly under the device. A short path is required to obtain optimum performance, as well as to provide a good thermal path to the PCB for maximum heat dissipation. Rev A4 010914 RF2173 Theory of Operation and Application Information The amplifier operates in near Class C bias mode. The final stage is "deep AB", meaning the quiescent current is very low. As the RF drive is increased, the final stage self-biases, causing the bias point to shift up and, at full power, draws about 2000mA. The optimum load for the output stage is approximately 1.2Ω. This is the load at the output collector, and is created by the series inductance formed by the output bond wires, vias, and microstrip, and 2 shunt capacitors external to the part. The optimum load impedance at the RF Output pad is 1.5-j1.7Ω. With this match, a 50Ω terminal impedance is achieved. The input is internally matched to 50Ω with just a blocking capacitor needed. This data sheet defines the configuration for GSM operation. The input is DC coupled; thus, a blocking cap must be inserted in series. Also, the first stage bias may be adjusted by a resistive divider with high value resistors on this pin to VPC and ground. For nominal operation, however, no external adjustment is necessary as internal resistors set the bias point optimally. VCC1 and VCC2 provide supply voltage to the first and second stage, as well as provides some frequency selectivity to tune to the operating band. Essentially, the bias is fed to this pin through a short microstrip. A bypass capacitor sets the inductance seen by the part, so placement of the bypass cap can affect the frequency of the gain peak. This supply should be bypassed individually with 100pF capacitors before being combined with VCC for the output stage to prevent feedback and oscillations. Rev A4 010914 The RF OUT pin provides the output power. Bias for the final stage is fed to this output line, and the feed must be capable of supporting the approximately 2A of current required. Care should be taken to keep the losses low in the bias feed and output components. A narrow microstrip line is recommended because DC losses in a bias choke will degrade efficiency and power. While the part is safe under CW operation, maximum power and reliability will be achieved under pulsed conditions. The data shown in this data sheet is based on a 12.5% duty cycle and a 600µs pulse, unless specified otherwise. The part will operate over a 3.0V to 5.0V range. Under nominal conditions, the power at 3.5V will be greater than +34.5dBm at +90°C. As the voltage is increased, however, the output power will increase. Thus, in a system design, the ALC (Automatic Level Control) Loop will back down the power to the desired level. This must occur during operation, or the device may be damaged from too much power dissipation. At 5.0V, over +38dBm may be produced; however, this level of power is not recommended, and can cause damage to the device. The HBT breakdown voltage is >20V, so there are no issue with overvoltage. However, under worst-case conditions, with the RF drive at full power during transmit, and the output VSWR extremely high, a low load impedance at the collector of the output transistors can cause currents much higher than normal. Due to the bipolar nature of the devices, there is no limitation on the amount of current de device will sink, and the safe current densities could be exceeded. High current conditions are potentially dangerous to any RF device. High currents lead to high channel temperatures and may force early failures. The RF2173 includes temperature compensation circuits in the bias network to stabilize the RF transistors, thus limiting the current through the amplifier and protecting the devices from damage. The same mechanism works to compensate the currents due to ambient temperature variations. To avoid excessively high currents it is important to control the VAPC when operating at supply voltages higher than 4.0V, such that the maximum output power is not exceeded. 2-225 2 POWER AMPLIFIERS The RF2173 is a three-stage device with 32 dB gain at full power. Therefore, the drive required to fully saturate the output is +3dBm. Based upon HBT (Heterojunction Bipolar Transistor) technology, the part requires only a single positive 3V supply to operate to full specification. Power control is provided through a single pin interface, with a separate Power Down control pin. The final stage ground is achieved through the large pad in the middle of the backside of the package. First and second stage grounds are brought out through separate ground pins for isolation from the output. These grounds should be connected directly with vias to the PCB ground plane, and not connected with the output ground to form a so called “local ground plane” on the top layer of the PCB. The output is brought out through the wide output pad, and forms the RF output signal path. RF2173 Application Schematic VCC 120 pF 1 nF Very close to pin 15/16 2 POWER AMPLIFIERS 0.9 pF Instead of a stripline, an inductor of ~10 nH can be used VCC 1 16 15 14 Instead of a stripline, an inductor of 2.7 nH can be used 13 2 12 3 11 4 10 33 pF Quarter wave length .040" 1 nF RF IN 180 Ω 50 Ω µstrip 5 6 7 8 10 nH 33 pF 2-226 33 pF 33 pF RF OUT 9 pF 14 pF 6.2 pF 9 VCC VCC 33 pF Spacing between edge of device and capacitor 0.062" Distance center to center of capacitors 0.416" 33 pF APC Note: All capacitors are standard 0402 multi layer Rev A4 010914 RF2173 Internal Schematic VCC1 RF OUT 2 4.5 pF APC1 VCC APC2 POWER AMPLIFIERS 5Ω VCC2 VCC RF IN 1.0k Ω 5Ω 400 Ω 300 Ω APC1 PKG BASE Rev A4 010914 GND2 PKG BASE 2-227 RF2173 Evaluation Board Schematic (Download Bill of Materials from www.rfmd.com.) VCC 2 GND P1-3 3 VCC P1-4 4 VCC 5 GND POWER AMPLIFIERS 2 C19 3.3 uF C5 1 nF C7 3.3 uF C10 0.9 pF C21 120 pF CON5 1 50 Ω µstrip J1 RF IN VCC C1 1 nF R2 180 Ω 16 + 1 NC + P1 C8 1 nF 15 14 13 2 12 3 11 4 10 VCC C20 3.3 uF + C12 1 nF C11 33 pF L1 10 nH 5 6 7 8 9 C9 33 pF L2 8.8 nH C3 9 pF C2 33 pF C6 14 pF 50 Ω µstrip J2 RF OUT C4 6.2 pF 2173400C VAPC VCC C25 10 nF C16 1 nF C13 33 pF C14 33 pF C15 33 pF C22 1 nF C23 10 nF C18 + 3.3 uF C17 1 nF C24 10 nF 50 Ω µstrip J3 VAPC 2-228 Rev A4 010914 RF2173 Evaluation Board Layout Board Size 2.0” x 2.0” Board Thickness 0.032”; Board Material FR-4; Multi-Layer POWER AMPLIFIERS 2 Rev A4 010914 2-229 RF2173 Typical Test Setup Power Supply V- V+ S- S+ POWER AMPLIFIERS 2 RF Generator Spectrum Analyzer 3dB 10dB/5W Buffer x1 OpAmp Pulse Generator A buffer amplifier is recommended because the current into the VAPC changes with voltage. As an alternative, the voltage may be monitored with an oscilloscope. Notes about testing the RF2173 The test setup shown above includes two attenuators. The 3dB pad at the input is to minimize the effects that the switching of the input impedance of the PA has on the signal generator. When VAPC is switched quickly, the resulting input impedance change can cause the signal generator to vary its output signal, either in output level or in frequency. Instead of an attenuator an isolator may also be used. The attenuator at the output is to prevent damage to the spectrum analyzer, and should be able to handle the power. It is important not to exceed the rated supply current and output power. When testing the device at higher than nominal supply voltage, the VAPC should be adjusted to avoid the output power exceeding +36dBm. During load-pull testing at the output it is important to monitor the forward power through a directional coupler. The forward power should not exceed +36dBm, and VAPC needs to be adjusted accordingly. This simulates the behavior for the power control loop in this respect. To avoid damage, it is recommended to set the power supply to limiting the current during the burst, not to exceed the maximum current rating. 2-230 Rev A4 010914